tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge branch 'for-linus' of git://android.git.kernel.org/kernel/tegra
* 'for-linus' of git://android.git.kernel.org/kernel/tegra:
ARM: tegra: harmony: initialize the TPS65862 PMIC
ARM: tegra: update defconfig
ARM: tegra: harmony: update PCI-e initialization sequence
ARM: tegra: trimslice: enable MMC/SD slots
ARM: tegra: enable new drivers in defconfig
ARM: tegra: Add Toshiba AC100 support
ARM: tegra: harmony: Set WM8903 gpio_base
ARM: tegra: harmony: I2C-related portions of audio support
ARM: tegra: harmony: register i2c devices
ARM: tegra: seaboard: register i2c devices
ARM: tegra: harmony: Beginnings of audio support
ARM: tegra: create defines for SD-related GPIO names
ARM: tegra: add devices.c entries for audio
+788
-35
+26
-3
arch/arm/configs/tegra_defconfig
+26
-3
arch/arm/configs/tegra_defconfig
···
21
21
# CONFIG_IOSCHED_CFQ is not set
22
22
CONFIG_ARCH_TEGRA=y
23
23
CONFIG_MACH_HARMONY=y
24
+
CONFIG_MACH_KAEN=y
25
+
CONFIG_MACH_PAZ00=y
26
+
CONFIG_MACH_TRIMSLICE=y
27
+
CONFIG_MACH_WARIO=y
24
28
CONFIG_TEGRA_DEBUG_UARTD=y
25
29
CONFIG_ARM_ERRATA_742230=y
26
30
CONFIG_NO_HZ=y
···
44
40
CONFIG_UNIX=y
45
41
CONFIG_NET_KEY=y
46
42
CONFIG_INET=y
43
+
CONFIG_IP_PNP=y
44
+
CONFIG_IP_PNP_DHCP=y
45
+
CONFIG_IP_PNP_BOOTP=y
46
+
CONFIG_IP_PNP_RARP=y
47
47
CONFIG_INET_ESP=y
48
48
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
49
49
# CONFIG_INET_XFRM_MODE_BEET is not set
···
74
66
CONFIG_ISL29003=y
75
67
CONFIG_NETDEVICES=y
76
68
CONFIG_DUMMY=y
77
-
# CONFIG_NETDEV_1000 is not set
69
+
CONFIG_R8169=y
78
70
# CONFIG_NETDEV_10000 is not set
79
71
# CONFIG_WLAN is not set
80
72
# CONFIG_INPUT is not set
···
86
78
# CONFIG_LEGACY_PTYS is not set
87
79
# CONFIG_HW_RANDOM is not set
88
80
CONFIG_I2C=y
89
-
# CONFIG_HWMON is not set
90
-
# CONFIG_MFD_SUPPORT is not set
81
+
# CONFIG_I2C_COMPAT is not set
82
+
# CONFIG_I2C_HELPER_AUTO is not set
83
+
CONFIG_I2C_TEGRA=y
84
+
CONFIG_SENSORS_LM90=y
85
+
CONFIG_MFD_TPS6586X=y
86
+
CONFIG_REGULATOR=y
87
+
CONFIG_REGULATOR_TPS6586X=y
91
88
# CONFIG_USB_SUPPORT is not set
92
89
CONFIG_MMC=y
93
90
CONFIG_MMC_SDHCI=y
94
91
CONFIG_MMC_SDHCI_PLTFM=y
92
+
CONFIG_MMC_SDHCI_TEGRA=y
93
+
CONFIG_STAGING=y
94
+
# CONFIG_STAGING_EXCLUDE_BUILD is not set
95
+
CONFIG_IIO=y
96
+
CONFIG_SENSORS_ISL29018=y
97
+
CONFIG_SENSORS_AK8975=y
95
98
CONFIG_EXT2_FS=y
96
99
CONFIG_EXT2_FS_XATTR=y
97
100
CONFIG_EXT2_FS_POSIX_ACL=y
···
114
95
# CONFIG_DNOTIFY is not set
115
96
CONFIG_VFAT_FS=y
116
97
CONFIG_TMPFS=y
98
+
CONFIG_NFS_FS=y
99
+
CONFIG_ROOT_NFS=y
100
+
CONFIG_PARTITION_ADVANCED=y
101
+
CONFIG_EFI_PARTITION=y
117
102
CONFIG_NLS_CODEPAGE_437=y
118
103
CONFIG_NLS_ISO8859_1=y
119
104
CONFIG_PRINTK_TIME=y
+5
arch/arm/mach-tegra/Kconfig
+5
arch/arm/mach-tegra/Kconfig
+4
arch/arm/mach-tegra/Makefile
+4
arch/arm/mach-tegra/Makefile
···
22
22
obj-${CONFIG_MACH_HARMONY} += board-harmony.o
23
23
obj-${CONFIG_MACH_HARMONY} += board-harmony-pinmux.o
24
24
obj-${CONFIG_MACH_HARMONY} += board-harmony-pcie.o
25
+
obj-${CONFIG_MACH_HARMONY} += board-harmony-power.o
26
+
27
+
obj-${CONFIG_MACH_PAZ00} += board-paz00.o
28
+
obj-${CONFIG_MACH_PAZ00} += board-paz00-pinmux.o
25
29
26
30
obj-${CONFIG_MACH_SEABOARD} += board-seaboard.o
27
31
obj-${CONFIG_MACH_SEABOARD} += board-seaboard-pinmux.o
+23
-1
arch/arm/mach-tegra/board-harmony-pcie.c
+23
-1
arch/arm/mach-tegra/board-harmony-pcie.c
···
27
27
28
28
#ifdef CONFIG_TEGRA_PCI
29
29
30
+
/* GPIO 3 of the PMIC */
31
+
#define EN_VDD_1V05_GPIO (TEGRA_NR_GPIOS + 2)
32
+
30
33
static int __init harmony_pcie_init(void)
31
34
{
35
+
struct regulator *regulator = NULL;
32
36
int err;
33
37
34
38
if (!machine_is_harmony())
35
39
return 0;
40
+
41
+
err = gpio_request(EN_VDD_1V05_GPIO, "EN_VDD_1V05");
42
+
if (err)
43
+
return err;
44
+
45
+
gpio_direction_output(EN_VDD_1V05_GPIO, 1);
46
+
47
+
regulator = regulator_get(NULL, "pex_clk");
48
+
if (IS_ERR_OR_NULL(regulator))
49
+
goto err_reg;
50
+
51
+
regulator_enable(regulator);
36
52
37
53
tegra_pinmux_set_tristate(TEGRA_PINGROUP_GPV, TEGRA_TRI_NORMAL);
38
54
tegra_pinmux_set_tristate(TEGRA_PINGROUP_SLXA, TEGRA_TRI_NORMAL);
···
65
49
tegra_pinmux_set_tristate(TEGRA_PINGROUP_SLXA, TEGRA_TRI_TRISTATE);
66
50
tegra_pinmux_set_tristate(TEGRA_PINGROUP_SLXK, TEGRA_TRI_TRISTATE);
67
51
52
+
regulator_disable(regulator);
53
+
regulator_put(regulator);
54
+
err_reg:
55
+
gpio_free(EN_VDD_1V05_GPIO);
56
+
68
57
return err;
69
58
}
70
59
71
-
subsys_initcall(harmony_pcie_init);
60
+
/* PCI should be initialized after I2C, mfd and regulators */
61
+
subsys_initcall_sync(harmony_pcie_init);
72
62
73
63
#endif
+16
-12
arch/arm/mach-tegra/board-harmony-pinmux.c
+16
-12
arch/arm/mach-tegra/board-harmony-pinmux.c
···
27
27
{TEGRA_PINGROUP_ATC, TEGRA_MUX_NAND, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
28
28
{TEGRA_PINGROUP_ATD, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
29
29
{TEGRA_PINGROUP_ATE, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
30
-
{TEGRA_PINGROUP_CDEV1, TEGRA_MUX_OSC, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
30
+
{TEGRA_PINGROUP_CDEV1, TEGRA_MUX_PLLA_OUT, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
31
31
{TEGRA_PINGROUP_CDEV2, TEGRA_MUX_PLLP_OUT4, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
32
32
{TEGRA_PINGROUP_CRTP, TEGRA_MUX_CRT, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
33
33
{TEGRA_PINGROUP_CSUS, TEGRA_MUX_VI_SENSOR_CLK, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
34
-
{TEGRA_PINGROUP_DAP1, TEGRA_MUX_DAP1, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
34
+
{TEGRA_PINGROUP_DAP1, TEGRA_MUX_DAP1, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
35
35
{TEGRA_PINGROUP_DAP2, TEGRA_MUX_DAP2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
36
36
{TEGRA_PINGROUP_DAP3, TEGRA_MUX_DAP3, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
37
37
{TEGRA_PINGROUP_DAP4, TEGRA_MUX_DAP4, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
···
114
114
{TEGRA_PINGROUP_SLXK, TEGRA_MUX_PCIE, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
115
115
{TEGRA_PINGROUP_SPDI, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
116
116
{TEGRA_PINGROUP_SPDO, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
117
-
{TEGRA_PINGROUP_SPIA, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
118
-
{TEGRA_PINGROUP_SPIB, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
119
-
{TEGRA_PINGROUP_SPIC, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
117
+
{TEGRA_PINGROUP_SPIA, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
118
+
{TEGRA_PINGROUP_SPIB, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
119
+
{TEGRA_PINGROUP_SPIC, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
120
120
{TEGRA_PINGROUP_SPID, TEGRA_MUX_SPI1, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
121
121
{TEGRA_PINGROUP_SPIE, TEGRA_MUX_SPI1, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
122
122
{TEGRA_PINGROUP_SPIF, TEGRA_MUX_SPI1, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
123
-
{TEGRA_PINGROUP_SPIG, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
123
+
{TEGRA_PINGROUP_SPIG, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
124
124
{TEGRA_PINGROUP_SPIH, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
125
125
{TEGRA_PINGROUP_UAA, TEGRA_MUX_ULPI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
126
126
{TEGRA_PINGROUP_UAB, TEGRA_MUX_ULPI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
···
141
141
};
142
142
143
143
static struct tegra_gpio_table gpio_table[] = {
144
-
{ .gpio = TEGRA_GPIO_PI5, .enable = true }, /* mmc2 cd */
145
-
{ .gpio = TEGRA_GPIO_PH1, .enable = true }, /* mmc2 wp */
146
-
{ .gpio = TEGRA_GPIO_PT3, .enable = true }, /* mmc2 pwr */
147
-
{ .gpio = TEGRA_GPIO_PH2, .enable = true }, /* mmc4 cd */
148
-
{ .gpio = TEGRA_GPIO_PH3, .enable = true }, /* mmc4 wp */
149
-
{ .gpio = TEGRA_GPIO_PI6, .enable = true }, /* mmc4 pwr */
144
+
{ .gpio = TEGRA_GPIO_SD2_CD, .enable = true },
145
+
{ .gpio = TEGRA_GPIO_SD2_WP, .enable = true },
146
+
{ .gpio = TEGRA_GPIO_SD2_POWER, .enable = true },
147
+
{ .gpio = TEGRA_GPIO_SD4_CD, .enable = true },
148
+
{ .gpio = TEGRA_GPIO_SD4_WP, .enable = true },
149
+
{ .gpio = TEGRA_GPIO_SD4_POWER, .enable = true },
150
+
{ .gpio = TEGRA_GPIO_CDC_IRQ, .enable = true },
151
+
{ .gpio = TEGRA_GPIO_HP_DET, .enable = true },
152
+
{ .gpio = TEGRA_GPIO_INT_MIC_EN, .enable = true },
153
+
{ .gpio = TEGRA_GPIO_EXT_MIC_EN, .enable = true },
150
154
};
151
155
152
156
void harmony_pinmux_init(void)
+117
arch/arm/mach-tegra/board-harmony-power.c
+117
arch/arm/mach-tegra/board-harmony-power.c
···
1
+
/*
2
+
* Copyright (C) 2010 NVIDIA, Inc.
3
+
*
4
+
* This program is free software; you can redistribute it and/or modify
5
+
* it under the terms of the GNU General Public License version 2 as
6
+
* published by the Free Software Foundation.
7
+
*
8
+
* This program is distributed in the hope that it will be useful,
9
+
* but WITHOUT ANY WARRANTY; without even the implied warranty of
10
+
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11
+
* GNU General Public License for more details.
12
+
*
13
+
* You should have received a copy of the GNU General Public License
14
+
* along with this program; if not, write to the Free Software
15
+
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
16
+
* 02111-1307, USA
17
+
*/
18
+
#include <linux/i2c.h>
19
+
#include <linux/platform_device.h>
20
+
#include <linux/gpio.h>
21
+
22
+
#include <linux/regulator/machine.h>
23
+
#include <linux/mfd/tps6586x.h>
24
+
25
+
#include <mach/irqs.h>
26
+
27
+
#define PMC_CTRL 0x0
28
+
#define PMC_CTRL_INTR_LOW (1 << 17)
29
+
30
+
static struct regulator_consumer_supply tps658621_ldo0_supply[] = {
31
+
REGULATOR_SUPPLY("pex_clk", NULL),
32
+
};
33
+
34
+
static struct regulator_init_data ldo0_data = {
35
+
.constraints = {
36
+
.min_uV = 1250 * 1000,
37
+
.max_uV = 3300 * 1000,
38
+
.valid_modes_mask = (REGULATOR_MODE_NORMAL |
39
+
REGULATOR_MODE_STANDBY),
40
+
.valid_ops_mask = (REGULATOR_CHANGE_MODE |
41
+
REGULATOR_CHANGE_STATUS |
42
+
REGULATOR_CHANGE_VOLTAGE),
43
+
},
44
+
.num_consumer_supplies = ARRAY_SIZE(tps658621_ldo0_supply),
45
+
.consumer_supplies = tps658621_ldo0_supply,
46
+
};
47
+
48
+
#define HARMONY_REGULATOR_INIT(_id, _minmv, _maxmv) \
49
+
static struct regulator_init_data _id##_data = { \
50
+
.constraints = { \
51
+
.min_uV = (_minmv)*1000, \
52
+
.max_uV = (_maxmv)*1000, \
53
+
.valid_modes_mask = (REGULATOR_MODE_NORMAL | \
54
+
REGULATOR_MODE_STANDBY), \
55
+
.valid_ops_mask = (REGULATOR_CHANGE_MODE | \
56
+
REGULATOR_CHANGE_STATUS | \
57
+
REGULATOR_CHANGE_VOLTAGE), \
58
+
}, \
59
+
}
60
+
61
+
HARMONY_REGULATOR_INIT(sm0, 725, 1500);
62
+
HARMONY_REGULATOR_INIT(sm1, 725, 1500);
63
+
HARMONY_REGULATOR_INIT(sm2, 3000, 4550);
64
+
HARMONY_REGULATOR_INIT(ldo1, 725, 1500);
65
+
HARMONY_REGULATOR_INIT(ldo2, 725, 1500);
66
+
HARMONY_REGULATOR_INIT(ldo3, 1250, 3300);
67
+
HARMONY_REGULATOR_INIT(ldo4, 1700, 2475);
68
+
HARMONY_REGULATOR_INIT(ldo5, 1250, 3300);
69
+
HARMONY_REGULATOR_INIT(ldo6, 1250, 3300);
70
+
HARMONY_REGULATOR_INIT(ldo7, 1250, 3300);
71
+
HARMONY_REGULATOR_INIT(ldo8, 1250, 3300);
72
+
HARMONY_REGULATOR_INIT(ldo9, 1250, 3300);
73
+
74
+
#define TPS_REG(_id, _data) \
75
+
{ \
76
+
.id = TPS6586X_ID_##_id, \
77
+
.name = "tps6586x-regulator", \
78
+
.platform_data = _data, \
79
+
}
80
+
81
+
static struct tps6586x_subdev_info tps_devs[] = {
82
+
TPS_REG(SM_0, &sm0_data),
83
+
TPS_REG(SM_1, &sm1_data),
84
+
TPS_REG(SM_2, &sm2_data),
85
+
TPS_REG(LDO_0, &ldo0_data),
86
+
TPS_REG(LDO_1, &ldo1_data),
87
+
TPS_REG(LDO_2, &ldo2_data),
88
+
TPS_REG(LDO_3, &ldo3_data),
89
+
TPS_REG(LDO_4, &ldo4_data),
90
+
TPS_REG(LDO_5, &ldo5_data),
91
+
TPS_REG(LDO_6, &ldo6_data),
92
+
TPS_REG(LDO_7, &ldo7_data),
93
+
TPS_REG(LDO_8, &ldo8_data),
94
+
TPS_REG(LDO_9, &ldo9_data),
95
+
};
96
+
97
+
static struct tps6586x_platform_data tps_platform = {
98
+
.irq_base = TEGRA_NR_IRQS,
99
+
.num_subdevs = ARRAY_SIZE(tps_devs),
100
+
.subdevs = tps_devs,
101
+
.gpio_base = TEGRA_NR_GPIOS,
102
+
};
103
+
104
+
static struct i2c_board_info __initdata harmony_regulators[] = {
105
+
{
106
+
I2C_BOARD_INFO("tps6586x", 0x34),
107
+
.irq = INT_EXTERNAL_PMU,
108
+
.platform_data = &tps_platform,
109
+
},
110
+
};
111
+
112
+
int __init harmony_regulator_init(void)
113
+
{
114
+
i2c_register_board_info(3, harmony_regulators, 1);
115
+
116
+
return 0;
117
+
}
+89
-6
arch/arm/mach-tegra/board-harmony.c
+89
-6
arch/arm/mach-tegra/board-harmony.c
···
2
2
* arch/arm/mach-tegra/board-harmony.c
3
3
*
4
4
* Copyright (C) 2010 Google, Inc.
5
+
* Copyright (C) 2011 NVIDIA, Inc.
5
6
*
6
7
* This software is licensed under the terms of the GNU General Public
7
8
* License version 2, as published by the Free Software Foundation, and
···
23
22
#include <linux/dma-mapping.h>
24
23
#include <linux/pda_power.h>
25
24
#include <linux/io.h>
25
+
#include <linux/gpio.h>
26
+
#include <linux/i2c.h>
27
+
#include <linux/i2c-tegra.h>
28
+
29
+
#include <sound/wm8903.h>
26
30
27
31
#include <asm/mach-types.h>
28
32
#include <asm/mach/arch.h>
29
33
#include <asm/mach/time.h>
30
34
#include <asm/setup.h>
31
35
36
+
#include <mach/harmony_audio.h>
32
37
#include <mach/iomap.h>
33
38
#include <mach/irqs.h>
34
39
#include <mach/sdhci.h>
···
67
60
},
68
61
};
69
62
63
+
static struct harmony_audio_platform_data harmony_audio_pdata = {
64
+
.gpio_spkr_en = TEGRA_GPIO_SPKR_EN,
65
+
.gpio_hp_det = TEGRA_GPIO_HP_DET,
66
+
.gpio_int_mic_en = TEGRA_GPIO_INT_MIC_EN,
67
+
.gpio_ext_mic_en = TEGRA_GPIO_EXT_MIC_EN,
68
+
};
69
+
70
+
static struct platform_device harmony_audio_device = {
71
+
.name = "tegra-snd-harmony",
72
+
.id = 0,
73
+
.dev = {
74
+
.platform_data = &harmony_audio_pdata,
75
+
},
76
+
};
77
+
78
+
static struct tegra_i2c_platform_data harmony_i2c1_platform_data = {
79
+
.bus_clk_rate = 400000,
80
+
};
81
+
82
+
static struct tegra_i2c_platform_data harmony_i2c2_platform_data = {
83
+
.bus_clk_rate = 400000,
84
+
};
85
+
86
+
static struct tegra_i2c_platform_data harmony_i2c3_platform_data = {
87
+
.bus_clk_rate = 400000,
88
+
};
89
+
90
+
static struct tegra_i2c_platform_data harmony_dvc_platform_data = {
91
+
.bus_clk_rate = 400000,
92
+
};
93
+
94
+
static struct wm8903_platform_data harmony_wm8903_pdata = {
95
+
.irq_active_low = 0,
96
+
.micdet_cfg = 0,
97
+
.micdet_delay = 100,
98
+
.gpio_base = HARMONY_GPIO_WM8903(0),
99
+
.gpio_cfg = {
100
+
WM8903_GPIO_NO_CONFIG,
101
+
WM8903_GPIO_NO_CONFIG,
102
+
0,
103
+
WM8903_GPIO_NO_CONFIG,
104
+
WM8903_GPIO_NO_CONFIG,
105
+
},
106
+
};
107
+
108
+
static struct i2c_board_info __initdata wm8903_board_info = {
109
+
I2C_BOARD_INFO("wm8903", 0x1a),
110
+
.platform_data = &harmony_wm8903_pdata,
111
+
.irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_CDC_IRQ),
112
+
};
113
+
114
+
static void __init harmony_i2c_init(void)
115
+
{
116
+
tegra_i2c_device1.dev.platform_data = &harmony_i2c1_platform_data;
117
+
tegra_i2c_device2.dev.platform_data = &harmony_i2c2_platform_data;
118
+
tegra_i2c_device3.dev.platform_data = &harmony_i2c3_platform_data;
119
+
tegra_i2c_device4.dev.platform_data = &harmony_dvc_platform_data;
120
+
121
+
platform_device_register(&tegra_i2c_device1);
122
+
platform_device_register(&tegra_i2c_device2);
123
+
platform_device_register(&tegra_i2c_device3);
124
+
platform_device_register(&tegra_i2c_device4);
125
+
126
+
i2c_register_board_info(0, &wm8903_board_info, 1);
127
+
}
128
+
70
129
static struct platform_device *harmony_devices[] __initdata = {
71
130
&debug_uart,
72
131
&tegra_sdhci_device1,
73
132
&tegra_sdhci_device2,
74
133
&tegra_sdhci_device4,
134
+
&tegra_i2s_device1,
135
+
&tegra_das_device,
136
+
&tegra_pcm_device,
137
+
&harmony_audio_device,
75
138
};
76
139
77
140
static void __init tegra_harmony_fixup(struct machine_desc *desc,
···
157
80
static __initdata struct tegra_clk_init_table harmony_clk_init_table[] = {
158
81
/* name parent rate enabled */
159
82
{ "uartd", "pll_p", 216000000, true },
83
+
{ "pll_a", "pll_p_out1", 56448000, true },
84
+
{ "pll_a_out0", "pll_a", 11289600, true },
85
+
{ "cdev1", NULL, 0, true },
86
+
{ "i2s1", "pll_a_out0", 11289600, false},
160
87
{ NULL, NULL, 0, 0},
161
88
};
162
89
···
172
91
};
173
92
174
93
static struct tegra_sdhci_platform_data sdhci_pdata2 = {
175
-
.cd_gpio = TEGRA_GPIO_PI5,
176
-
.wp_gpio = TEGRA_GPIO_PH1,
177
-
.power_gpio = TEGRA_GPIO_PT3,
94
+
.cd_gpio = TEGRA_GPIO_SD2_CD,
95
+
.wp_gpio = TEGRA_GPIO_SD2_WP,
96
+
.power_gpio = TEGRA_GPIO_SD2_POWER,
178
97
};
179
98
180
99
static struct tegra_sdhci_platform_data sdhci_pdata4 = {
181
-
.cd_gpio = TEGRA_GPIO_PH2,
182
-
.wp_gpio = TEGRA_GPIO_PH3,
183
-
.power_gpio = TEGRA_GPIO_PI6,
100
+
.cd_gpio = TEGRA_GPIO_SD4_CD,
101
+
.wp_gpio = TEGRA_GPIO_SD4_WP,
102
+
.power_gpio = TEGRA_GPIO_SD4_POWER,
184
103
.is_8bit = 1,
185
104
};
186
105
···
195
114
tegra_sdhci_device4.dev.platform_data = &sdhci_pdata4;
196
115
197
116
platform_add_devices(harmony_devices, ARRAY_SIZE(harmony_devices));
117
+
harmony_i2c_init();
118
+
harmony_regulator_init();
198
119
}
199
120
200
121
MACHINE_START(HARMONY, "harmony")
+15
arch/arm/mach-tegra/board-harmony.h
+15
arch/arm/mach-tegra/board-harmony.h
···
17
17
#ifndef _MACH_TEGRA_BOARD_HARMONY_H
18
18
#define _MACH_TEGRA_BOARD_HARMONY_H
19
19
20
+
#define HARMONY_GPIO_WM8903(_x_) (TEGRA_NR_GPIOS + (_x_))
21
+
22
+
#define TEGRA_GPIO_SD2_CD TEGRA_GPIO_PI5
23
+
#define TEGRA_GPIO_SD2_WP TEGRA_GPIO_PH1
24
+
#define TEGRA_GPIO_SD2_POWER TEGRA_GPIO_PT3
25
+
#define TEGRA_GPIO_SD4_CD TEGRA_GPIO_PH2
26
+
#define TEGRA_GPIO_SD4_WP TEGRA_GPIO_PH3
27
+
#define TEGRA_GPIO_SD4_POWER TEGRA_GPIO_PI6
28
+
#define TEGRA_GPIO_CDC_IRQ TEGRA_GPIO_PX3
29
+
#define TEGRA_GPIO_SPKR_EN HARMONY_GPIO_WM8903(2)
30
+
#define TEGRA_GPIO_HP_DET TEGRA_GPIO_PW2
31
+
#define TEGRA_GPIO_INT_MIC_EN TEGRA_GPIO_PX0
32
+
#define TEGRA_GPIO_EXT_MIC_EN TEGRA_GPIO_PX1
33
+
20
34
void harmony_pinmux_init(void);
35
+
int harmony_regulator_init(void);
21
36
22
37
#endif
+157
arch/arm/mach-tegra/board-paz00-pinmux.c
+157
arch/arm/mach-tegra/board-paz00-pinmux.c
···
1
+
/*
2
+
* arch/arm/mach-tegra/board-paz00-pinmux.c
3
+
*
4
+
* Copyright (C) 2010 Marc Dietrich <marvin24@gmx.de>
5
+
*
6
+
* This software is licensed under the terms of the GNU General Public
7
+
* License version 2, as published by the Free Software Foundation, and
8
+
* may be copied, distributed, and modified under those terms.
9
+
*
10
+
* This program is distributed in the hope that it will be useful,
11
+
* but WITHOUT ANY WARRANTY; without even the implied warranty of
12
+
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13
+
* GNU General Public License for more details.
14
+
*
15
+
*/
16
+
17
+
#include <linux/kernel.h>
18
+
#include <linux/gpio.h>
19
+
#include <mach/pinmux.h>
20
+
21
+
#include "gpio-names.h"
22
+
#include "board-paz00.h"
23
+
24
+
static struct tegra_pingroup_config paz00_pinmux[] = {
25
+
{TEGRA_PINGROUP_ATA, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
26
+
{TEGRA_PINGROUP_ATB, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
27
+
{TEGRA_PINGROUP_ATC, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
28
+
{TEGRA_PINGROUP_ATD, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
29
+
{TEGRA_PINGROUP_ATE, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
30
+
{TEGRA_PINGROUP_CDEV1, TEGRA_MUX_PLLA_OUT, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
31
+
{TEGRA_PINGROUP_CDEV2, TEGRA_MUX_PLLP_OUT4, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
32
+
{TEGRA_PINGROUP_CRTP, TEGRA_MUX_CRT, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
33
+
{TEGRA_PINGROUP_CSUS, TEGRA_MUX_PLLC_OUT1, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
34
+
{TEGRA_PINGROUP_DAP1, TEGRA_MUX_DAP1, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
35
+
{TEGRA_PINGROUP_DAP2, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
36
+
{TEGRA_PINGROUP_DAP3, TEGRA_MUX_DAP3, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
37
+
{TEGRA_PINGROUP_DAP4, TEGRA_MUX_DAP4, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
38
+
{TEGRA_PINGROUP_DDC, TEGRA_MUX_I2C2, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
39
+
{TEGRA_PINGROUP_DTA, TEGRA_MUX_RSVD1, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
40
+
{TEGRA_PINGROUP_DTB, TEGRA_MUX_RSVD1, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
41
+
{TEGRA_PINGROUP_DTC, TEGRA_MUX_RSVD1, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
42
+
{TEGRA_PINGROUP_DTD, TEGRA_MUX_RSVD1, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
43
+
{TEGRA_PINGROUP_DTE, TEGRA_MUX_RSVD1, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
44
+
{TEGRA_PINGROUP_DTF, TEGRA_MUX_I2C3, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
45
+
{TEGRA_PINGROUP_GMA, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
46
+
{TEGRA_PINGROUP_GMB, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
47
+
{TEGRA_PINGROUP_GMC, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
48
+
{TEGRA_PINGROUP_GMD, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
49
+
{TEGRA_PINGROUP_GME, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
50
+
{TEGRA_PINGROUP_GPU, TEGRA_MUX_PWM, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
51
+
{TEGRA_PINGROUP_GPU7, TEGRA_MUX_RTCK, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
52
+
{TEGRA_PINGROUP_GPV, TEGRA_MUX_PCIE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
53
+
{TEGRA_PINGROUP_HDINT, TEGRA_MUX_HDMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
54
+
{TEGRA_PINGROUP_I2CP, TEGRA_MUX_I2C, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
55
+
{TEGRA_PINGROUP_IRRX, TEGRA_MUX_UARTA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
56
+
{TEGRA_PINGROUP_IRTX, TEGRA_MUX_UARTA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
57
+
{TEGRA_PINGROUP_KBCA, TEGRA_MUX_KBC, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
58
+
{TEGRA_PINGROUP_KBCB, TEGRA_MUX_SDIO2, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
59
+
{TEGRA_PINGROUP_KBCC, TEGRA_MUX_KBC, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
60
+
{TEGRA_PINGROUP_KBCD, TEGRA_MUX_SDIO2, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
61
+
{TEGRA_PINGROUP_KBCE, TEGRA_MUX_KBC, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
62
+
{TEGRA_PINGROUP_KBCF, TEGRA_MUX_KBC, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
63
+
{TEGRA_PINGROUP_LCSN, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
64
+
{TEGRA_PINGROUP_LD0, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
65
+
{TEGRA_PINGROUP_LD1, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
66
+
{TEGRA_PINGROUP_LD10, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
67
+
{TEGRA_PINGROUP_LD11, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
68
+
{TEGRA_PINGROUP_LD12, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
69
+
{TEGRA_PINGROUP_LD13, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
70
+
{TEGRA_PINGROUP_LD14, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
71
+
{TEGRA_PINGROUP_LD15, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
72
+
{TEGRA_PINGROUP_LD16, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
73
+
{TEGRA_PINGROUP_LD17, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
74
+
{TEGRA_PINGROUP_LD2, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
75
+
{TEGRA_PINGROUP_LD3, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
76
+
{TEGRA_PINGROUP_LD4, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
77
+
{TEGRA_PINGROUP_LD5, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
78
+
{TEGRA_PINGROUP_LD6, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
79
+
{TEGRA_PINGROUP_LD7, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
80
+
{TEGRA_PINGROUP_LD8, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
81
+
{TEGRA_PINGROUP_LD9, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
82
+
{TEGRA_PINGROUP_LDC, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
83
+
{TEGRA_PINGROUP_LDI, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},
84
+
{TEGRA_PINGROUP_LHP0, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
85
+
{TEGRA_PINGROUP_LHP1, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
86
+
{TEGRA_PINGROUP_LHP2, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
87
+
{TEGRA_PINGROUP_LHS, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
88
+
{TEGRA_PINGROUP_LM0, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
89
+
{TEGRA_PINGROUP_LM1, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
90
+
{TEGRA_PINGROUP_LPP, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
91
+
{TEGRA_PINGROUP_LPW0, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
92
+
{TEGRA_PINGROUP_LPW1, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
93
+
{TEGRA_PINGROUP_LPW2, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
94
+
{TEGRA_PINGROUP_LSC0, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
95
+
{TEGRA_PINGROUP_LSC1, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
96
+
{TEGRA_PINGROUP_LSCK, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
97
+
{TEGRA_PINGROUP_LSDA, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
98
+
{TEGRA_PINGROUP_LSDI, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
99
+
{TEGRA_PINGROUP_LSPI, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
100
+
{TEGRA_PINGROUP_LVP0, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
101
+
{TEGRA_PINGROUP_LVP1, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
102
+
{TEGRA_PINGROUP_LVS, TEGRA_MUX_DISPLAYA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
103
+
{TEGRA_PINGROUP_OWC, TEGRA_MUX_OWR, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
104
+
{TEGRA_PINGROUP_PMC, TEGRA_MUX_PWR_ON, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
105
+
{TEGRA_PINGROUP_PTA, TEGRA_MUX_HDMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
106
+
{TEGRA_PINGROUP_RM, TEGRA_MUX_I2C, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
107
+
{TEGRA_PINGROUP_SDB, TEGRA_MUX_PWM, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
108
+
{TEGRA_PINGROUP_SDC, TEGRA_MUX_TWC, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
109
+
{TEGRA_PINGROUP_SDD, TEGRA_MUX_PWM, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
110
+
{TEGRA_PINGROUP_SDIO1, TEGRA_MUX_SDIO1, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
111
+
{TEGRA_PINGROUP_SLXA, TEGRA_MUX_PCIE, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
112
+
{TEGRA_PINGROUP_SLXC, TEGRA_MUX_SPI4, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
113
+
{TEGRA_PINGROUP_SLXD, TEGRA_MUX_SPI4, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
114
+
{TEGRA_PINGROUP_SLXK, TEGRA_MUX_PCIE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
115
+
{TEGRA_PINGROUP_SPDI, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
116
+
{TEGRA_PINGROUP_SPDO, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
117
+
{TEGRA_PINGROUP_SPIA, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
118
+
{TEGRA_PINGROUP_SPIB, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
119
+
{TEGRA_PINGROUP_SPIC, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
120
+
{TEGRA_PINGROUP_SPID, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
121
+
{TEGRA_PINGROUP_SPIE, TEGRA_MUX_GMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
122
+
{TEGRA_PINGROUP_SPIF, TEGRA_MUX_RSVD4, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
123
+
{TEGRA_PINGROUP_SPIG, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
124
+
{TEGRA_PINGROUP_SPIH, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
125
+
{TEGRA_PINGROUP_UAA, TEGRA_MUX_ULPI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
126
+
{TEGRA_PINGROUP_UAB, TEGRA_MUX_ULPI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
127
+
{TEGRA_PINGROUP_UAC, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
128
+
{TEGRA_PINGROUP_UAD, TEGRA_MUX_SPDIF, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
129
+
{TEGRA_PINGROUP_UCA, TEGRA_MUX_UARTC, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
130
+
{TEGRA_PINGROUP_UCB, TEGRA_MUX_UARTC, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
131
+
{TEGRA_PINGROUP_UDA, TEGRA_MUX_ULPI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
132
+
{TEGRA_PINGROUP_CK32, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
133
+
{TEGRA_PINGROUP_DDRC, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
134
+
{TEGRA_PINGROUP_PMCA, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
135
+
{TEGRA_PINGROUP_PMCB, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
136
+
{TEGRA_PINGROUP_PMCC, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
137
+
{TEGRA_PINGROUP_PMCD, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
138
+
{TEGRA_PINGROUP_PMCE, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
139
+
{TEGRA_PINGROUP_XM2C, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
140
+
{TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
141
+
};
142
+
143
+
static struct tegra_gpio_table gpio_table[] = {
144
+
{ .gpio = TEGRA_GPIO_SD1_CD, .enable = true },
145
+
{ .gpio = TEGRA_GPIO_SD1_WP, .enable = true },
146
+
{ .gpio = TEGRA_GPIO_SD1_POWER, .enable = true },
147
+
{ .gpio = TEGRA_GPIO_SD4_CD, .enable = true },
148
+
{ .gpio = TEGRA_GPIO_SD4_WP, .enable = true },
149
+
{ .gpio = TEGRA_GPIO_SD4_POWER, .enable = true },
150
+
};
151
+
152
+
void paz00_pinmux_init(void)
153
+
{
154
+
tegra_pinmux_config_table(paz00_pinmux, ARRAY_SIZE(paz00_pinmux));
155
+
156
+
tegra_gpio_config(gpio_table, ARRAY_SIZE(gpio_table));
157
+
}
+128
arch/arm/mach-tegra/board-paz00.c
+128
arch/arm/mach-tegra/board-paz00.c
···
1
+
/*
2
+
* arch/arm/mach-tegra/board-paz00.c
3
+
*
4
+
* Copyright (C) 2011 Marc Dietrich <marvin24@gmx.de>
5
+
*
6
+
* Based on board-harmony.c
7
+
* Copyright (C) 2010 Google, Inc.
8
+
*
9
+
* This software is licensed under the terms of the GNU General Public
10
+
* License version 2, as published by the Free Software Foundation, and
11
+
* may be copied, distributed, and modified under those terms.
12
+
*
13
+
* This program is distributed in the hope that it will be useful,
14
+
* but WITHOUT ANY WARRANTY; without even the implied warranty of
15
+
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16
+
* GNU General Public License for more details.
17
+
*
18
+
*/
19
+
20
+
#include <linux/kernel.h>
21
+
#include <linux/init.h>
22
+
#include <linux/platform_device.h>
23
+
#include <linux/serial_8250.h>
24
+
#include <linux/clk.h>
25
+
#include <linux/dma-mapping.h>
26
+
#include <linux/pda_power.h>
27
+
#include <linux/io.h>
28
+
29
+
#include <asm/mach-types.h>
30
+
#include <asm/mach/arch.h>
31
+
#include <asm/mach/time.h>
32
+
#include <asm/setup.h>
33
+
34
+
#include <mach/iomap.h>
35
+
#include <mach/irqs.h>
36
+
#include <mach/sdhci.h>
37
+
38
+
#include "board.h"
39
+
#include "board-paz00.h"
40
+
#include "clock.h"
41
+
#include "devices.h"
42
+
#include "gpio-names.h"
43
+
44
+
static struct plat_serial8250_port debug_uart_platform_data[] = {
45
+
{
46
+
.membase = IO_ADDRESS(TEGRA_UARTD_BASE),
47
+
.mapbase = TEGRA_UARTD_BASE,
48
+
.irq = INT_UARTD,
49
+
.flags = UPF_BOOT_AUTOCONF,
50
+
.iotype = UPIO_MEM,
51
+
.regshift = 2,
52
+
.uartclk = 216000000,
53
+
}, {
54
+
.flags = 0
55
+
}
56
+
};
57
+
58
+
static struct platform_device debug_uart = {
59
+
.name = "serial8250",
60
+
.id = PLAT8250_DEV_PLATFORM,
61
+
.dev = {
62
+
.platform_data = debug_uart_platform_data,
63
+
},
64
+
};
65
+
66
+
static struct platform_device *paz00_devices[] __initdata = {
67
+
&debug_uart,
68
+
&tegra_sdhci_device1,
69
+
&tegra_sdhci_device2,
70
+
&tegra_sdhci_device4,
71
+
};
72
+
73
+
static void __init tegra_paz00_fixup(struct machine_desc *desc,
74
+
struct tag *tags, char **cmdline, struct meminfo *mi)
75
+
{
76
+
mi->nr_banks = 1;
77
+
mi->bank[0].start = PHYS_OFFSET;
78
+
mi->bank[0].size = 448 * SZ_1M;
79
+
}
80
+
81
+
static __initdata struct tegra_clk_init_table paz00_clk_init_table[] = {
82
+
/* name parent rate enabled */
83
+
{ "uartd", "pll_p", 216000000, true },
84
+
{ NULL, NULL, 0, 0},
85
+
};
86
+
87
+
88
+
static struct tegra_sdhci_platform_data sdhci_pdata1 = {
89
+
.cd_gpio = TEGRA_GPIO_SD1_CD,
90
+
.wp_gpio = TEGRA_GPIO_SD1_WP,
91
+
.power_gpio = TEGRA_GPIO_SD1_POWER,
92
+
};
93
+
94
+
static struct tegra_sdhci_platform_data sdhci_pdata2 = {
95
+
.cd_gpio = -1,
96
+
.wp_gpio = -1,
97
+
.power_gpio = -1,
98
+
};
99
+
100
+
static struct tegra_sdhci_platform_data sdhci_pdata4 = {
101
+
.cd_gpio = TEGRA_GPIO_SD4_CD,
102
+
.wp_gpio = TEGRA_GPIO_SD4_WP,
103
+
.power_gpio = TEGRA_GPIO_SD4_POWER,
104
+
.is_8bit = 1,
105
+
};
106
+
107
+
static void __init tegra_paz00_init(void)
108
+
{
109
+
tegra_clk_init_from_table(paz00_clk_init_table);
110
+
111
+
paz00_pinmux_init();
112
+
113
+
tegra_sdhci_device1.dev.platform_data = &sdhci_pdata1;
114
+
tegra_sdhci_device2.dev.platform_data = &sdhci_pdata2;
115
+
tegra_sdhci_device4.dev.platform_data = &sdhci_pdata4;
116
+
117
+
platform_add_devices(paz00_devices, ARRAY_SIZE(paz00_devices));
118
+
}
119
+
120
+
MACHINE_START(PAZ00, "paz00")
121
+
.boot_params = 0x00000100,
122
+
.fixup = tegra_paz00_fixup,
123
+
.map_io = tegra_map_common_io,
124
+
.init_early = tegra_init_early,
125
+
.init_irq = tegra_init_irq,
126
+
.timer = &tegra_timer,
127
+
.init_machine = tegra_paz00_init,
128
+
MACHINE_END
+29
arch/arm/mach-tegra/board-paz00.h
+29
arch/arm/mach-tegra/board-paz00.h
···
1
+
/*
2
+
* arch/arm/mach-tegra/board-paz00.h
3
+
*
4
+
* Copyright (C) 2010 Marc Dietrich <marvin24@gmx.de>
5
+
*
6
+
* This software is licensed under the terms of the GNU General Public
7
+
* License version 2, as published by the Free Software Foundation, and
8
+
* may be copied, distributed, and modified under those terms.
9
+
*
10
+
* This program is distributed in the hope that it will be useful,
11
+
* but WITHOUT ANY WARRANTY; without even the implied warranty of
12
+
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13
+
* GNU General Public License for more details.
14
+
*
15
+
*/
16
+
17
+
#ifndef _MACH_TEGRA_BOARD_PAZ00_H
18
+
#define _MACH_TEGRA_BOARD_PAZ00_H
19
+
20
+
#define TEGRA_GPIO_SD1_CD TEGRA_GPIO_PV5
21
+
#define TEGRA_GPIO_SD1_WP TEGRA_GPIO_PH1
22
+
#define TEGRA_GPIO_SD1_POWER TEGRA_GPIO_PT3
23
+
#define TEGRA_GPIO_SD4_CD TEGRA_GPIO_PH2
24
+
#define TEGRA_GPIO_SD4_WP TEGRA_GPIO_PH3
25
+
#define TEGRA_GPIO_SD4_POWER TEGRA_GPIO_PI6
26
+
27
+
void paz00_pinmux_init(void);
28
+
29
+
#endif
+6
-5
arch/arm/mach-tegra/board-seaboard-pinmux.c
+6
-5
arch/arm/mach-tegra/board-seaboard-pinmux.c
···
161
161
162
162
163
163
static struct tegra_gpio_table gpio_table[] = {
164
-
{ .gpio = TEGRA_GPIO_PI5, .enable = true }, /* mmc2 cd */
165
-
{ .gpio = TEGRA_GPIO_PH1, .enable = true }, /* mmc2 wp */
166
-
{ .gpio = TEGRA_GPIO_PI6, .enable = true }, /* mmc2 pwr */
167
-
{ .gpio = TEGRA_GPIO_LIDSWITCH, .enable = true }, /* lid switch */
168
-
{ .gpio = TEGRA_GPIO_POWERKEY, .enable = true }, /* power key */
164
+
{ .gpio = TEGRA_GPIO_SD2_CD, .enable = true },
165
+
{ .gpio = TEGRA_GPIO_SD2_WP, .enable = true },
166
+
{ .gpio = TEGRA_GPIO_SD2_POWER, .enable = true },
167
+
{ .gpio = TEGRA_GPIO_LIDSWITCH, .enable = true },
168
+
{ .gpio = TEGRA_GPIO_POWERKEY, .enable = true },
169
+
{ .gpio = TEGRA_GPIO_ISL29018_IRQ, .enable = true },
169
170
};
170
171
171
172
void __init seaboard_pinmux_init(void)
+61
-7
arch/arm/mach-tegra/board-seaboard.c
+61
-7
arch/arm/mach-tegra/board-seaboard.c
···
18
18
#include <linux/init.h>
19
19
#include <linux/platform_device.h>
20
20
#include <linux/serial_8250.h>
21
+
#include <linux/i2c.h>
22
+
#include <linux/i2c-tegra.h>
21
23
#include <linux/delay.h>
22
24
#include <linux/input.h>
23
25
#include <linux/io.h>
26
+
#include <linux/gpio.h>
24
27
#include <linux/gpio_keys.h>
25
28
26
29
#include <mach/iomap.h>
···
66
63
{ NULL, NULL, 0, 0},
67
64
};
68
65
66
+
static struct tegra_i2c_platform_data seaboard_i2c1_platform_data = {
67
+
.bus_clk_rate = 400000.
68
+
};
69
+
70
+
static struct tegra_i2c_platform_data seaboard_i2c2_platform_data = {
71
+
.bus_clk_rate = 400000,
72
+
};
73
+
74
+
static struct tegra_i2c_platform_data seaboard_i2c3_platform_data = {
75
+
.bus_clk_rate = 400000,
76
+
};
77
+
78
+
static struct tegra_i2c_platform_data seaboard_dvc_platform_data = {
79
+
.bus_clk_rate = 400000,
80
+
};
81
+
69
82
static struct gpio_keys_button seaboard_gpio_keys_buttons[] = {
70
83
{
71
84
.code = SW_LID,
···
122
103
};
123
104
124
105
static struct tegra_sdhci_platform_data sdhci_pdata3 = {
125
-
.cd_gpio = TEGRA_GPIO_PI5,
126
-
.wp_gpio = TEGRA_GPIO_PH1,
127
-
.power_gpio = TEGRA_GPIO_PI6,
106
+
.cd_gpio = TEGRA_GPIO_SD2_CD,
107
+
.wp_gpio = TEGRA_GPIO_SD2_WP,
108
+
.power_gpio = TEGRA_GPIO_SD2_POWER,
128
109
};
129
110
130
111
static struct tegra_sdhci_platform_data sdhci_pdata4 = {
···
143
124
&seaboard_gpio_keys_device,
144
125
};
145
126
146
-
static void __init __tegra_seaboard_init(void)
127
+
static struct i2c_board_info __initdata isl29018_device = {
128
+
I2C_BOARD_INFO("isl29018", 0x44),
129
+
.irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_ISL29018_IRQ),
130
+
};
131
+
132
+
static struct i2c_board_info __initdata adt7461_device = {
133
+
I2C_BOARD_INFO("adt7461", 0x4c),
134
+
};
135
+
136
+
static void __init seaboard_i2c_init(void)
137
+
{
138
+
gpio_request(TEGRA_GPIO_ISL29018_IRQ, "isl29018");
139
+
gpio_direction_input(TEGRA_GPIO_ISL29018_IRQ);
140
+
141
+
i2c_register_board_info(0, &isl29018_device, 1);
142
+
143
+
i2c_register_board_info(4, &adt7461_device, 1);
144
+
145
+
tegra_i2c_device1.dev.platform_data = &seaboard_i2c1_platform_data;
146
+
tegra_i2c_device2.dev.platform_data = &seaboard_i2c2_platform_data;
147
+
tegra_i2c_device3.dev.platform_data = &seaboard_i2c3_platform_data;
148
+
tegra_i2c_device4.dev.platform_data = &seaboard_dvc_platform_data;
149
+
150
+
platform_device_register(&tegra_i2c_device1);
151
+
platform_device_register(&tegra_i2c_device2);
152
+
platform_device_register(&tegra_i2c_device3);
153
+
platform_device_register(&tegra_i2c_device4);
154
+
}
155
+
156
+
static void __init seaboard_common_init(void)
147
157
{
148
158
seaboard_pinmux_init();
149
159
···
192
144
debug_uart_platform_data[0].mapbase = TEGRA_UARTD_BASE;
193
145
debug_uart_platform_data[0].irq = INT_UARTD;
194
146
195
-
__tegra_seaboard_init();
147
+
seaboard_common_init();
148
+
149
+
seaboard_i2c_init();
196
150
}
197
151
198
152
static void __init tegra_kaen_init(void)
···
204
154
debug_uart_platform_data[0].mapbase = TEGRA_UARTB_BASE;
205
155
debug_uart_platform_data[0].irq = INT_UARTB;
206
156
207
-
__tegra_seaboard_init();
157
+
seaboard_common_init();
158
+
159
+
seaboard_i2c_init();
208
160
}
209
161
210
162
static void __init tegra_wario_init(void)
···
216
164
debug_uart_platform_data[0].mapbase = TEGRA_UARTB_BASE;
217
165
debug_uart_platform_data[0].irq = INT_UARTB;
218
166
219
-
__tegra_seaboard_init();
167
+
seaboard_common_init();
168
+
169
+
seaboard_i2c_init();
220
170
}
221
171
222
172
+3
arch/arm/mach-tegra/board-seaboard.h
+3
arch/arm/mach-tegra/board-seaboard.h
···
17
17
#ifndef _MACH_TEGRA_BOARD_SEABOARD_H
18
18
#define _MACH_TEGRA_BOARD_SEABOARD_H
19
19
20
+
#define TEGRA_GPIO_SD2_CD TEGRA_GPIO_PI5
21
+
#define TEGRA_GPIO_SD2_WP TEGRA_GPIO_PH1
22
+
#define TEGRA_GPIO_SD2_POWER TEGRA_GPIO_PI6
20
23
#define TEGRA_GPIO_LIDSWITCH TEGRA_GPIO_PC7
21
24
#define TEGRA_GPIO_USB1 TEGRA_GPIO_PD0
22
25
#define TEGRA_GPIO_POWERKEY TEGRA_GPIO_PV2
+10
-1
arch/arm/mach-tegra/board-trimslice-pinmux.c
+10
-1
arch/arm/mach-tegra/board-trimslice-pinmux.c
···
16
16
17
17
#include <linux/kernel.h>
18
18
#include <linux/init.h>
19
-
#include <mach/pinmux.h>
20
19
20
+
#include <mach/pinmux.h>
21
+
#include <mach/gpio.h>
22
+
23
+
#include "gpio-names.h"
21
24
#include "board-trimslice.h"
22
25
23
26
static __initdata struct tegra_pingroup_config trimslice_pinmux[] = {
···
142
139
{TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
143
140
};
144
141
142
+
static struct tegra_gpio_table gpio_table[] = {
143
+
{ .gpio = TRIMSLICE_GPIO_SD4_CD, .enable = true }, /* mmc4 cd */
144
+
{ .gpio = TRIMSLICE_GPIO_SD4_WP, .enable = true }, /* mmc4 wp */
145
+
};
146
+
145
147
void __init trimslice_pinmux_init(void)
146
148
{
147
149
tegra_pinmux_config_table(trimslice_pinmux, ARRAY_SIZE(trimslice_pinmux));
150
+
tegra_gpio_config(gpio_table, ARRAY_SIZE(gpio_table));
148
151
}
+19
arch/arm/mach-tegra/board-trimslice.c
+19
arch/arm/mach-tegra/board-trimslice.c
···
29
29
#include <asm/setup.h>
30
30
31
31
#include <mach/iomap.h>
32
+
#include <mach/sdhci.h>
32
33
33
34
#include "board.h"
34
35
#include "clock.h"
36
+
#include "devices.h"
37
+
#include "gpio-names.h"
35
38
36
39
#include "board-trimslice.h"
37
40
···
59
56
.platform_data = debug_uart_platform_data,
60
57
},
61
58
};
59
+
static struct tegra_sdhci_platform_data sdhci_pdata1 = {
60
+
.cd_gpio = -1,
61
+
.wp_gpio = -1,
62
+
.power_gpio = -1,
63
+
};
64
+
65
+
static struct tegra_sdhci_platform_data sdhci_pdata4 = {
66
+
.cd_gpio = TRIMSLICE_GPIO_SD4_CD,
67
+
.wp_gpio = TRIMSLICE_GPIO_SD4_WP,
68
+
.power_gpio = -1,
69
+
};
62
70
63
71
static struct platform_device *trimslice_devices[] __initdata = {
64
72
&debug_uart,
73
+
&tegra_sdhci_device1,
74
+
&tegra_sdhci_device4,
65
75
};
66
76
67
77
static void __init tegra_trimslice_fixup(struct machine_desc *desc,
···
107
91
tegra_clk_init_from_table(trimslice_clk_init_table);
108
92
109
93
trimslice_pinmux_init();
94
+
95
+
tegra_sdhci_device1.dev.platform_data = &sdhci_pdata1;
96
+
tegra_sdhci_device4.dev.platform_data = &sdhci_pdata4;
110
97
111
98
platform_add_devices(trimslice_devices, ARRAY_SIZE(trimslice_devices));
112
99
}
+3
arch/arm/mach-tegra/board-trimslice.h
+3
arch/arm/mach-tegra/board-trimslice.h
+70
arch/arm/mach-tegra/devices.c
+70
arch/arm/mach-tegra/devices.c
···
503
503
.coherent_dma_mask = DMA_BIT_MASK(32),
504
504
},
505
505
};
506
+
507
+
static struct resource i2s_resource1[] = {
508
+
[0] = {
509
+
.start = INT_I2S1,
510
+
.end = INT_I2S1,
511
+
.flags = IORESOURCE_IRQ
512
+
},
513
+
[1] = {
514
+
.start = TEGRA_DMA_REQ_SEL_I2S_1,
515
+
.end = TEGRA_DMA_REQ_SEL_I2S_1,
516
+
.flags = IORESOURCE_DMA
517
+
},
518
+
[2] = {
519
+
.start = TEGRA_I2S1_BASE,
520
+
.end = TEGRA_I2S1_BASE + TEGRA_I2S1_SIZE - 1,
521
+
.flags = IORESOURCE_MEM
522
+
}
523
+
};
524
+
525
+
static struct resource i2s_resource2[] = {
526
+
[0] = {
527
+
.start = INT_I2S2,
528
+
.end = INT_I2S2,
529
+
.flags = IORESOURCE_IRQ
530
+
},
531
+
[1] = {
532
+
.start = TEGRA_DMA_REQ_SEL_I2S2_1,
533
+
.end = TEGRA_DMA_REQ_SEL_I2S2_1,
534
+
.flags = IORESOURCE_DMA
535
+
},
536
+
[2] = {
537
+
.start = TEGRA_I2S2_BASE,
538
+
.end = TEGRA_I2S2_BASE + TEGRA_I2S2_SIZE - 1,
539
+
.flags = IORESOURCE_MEM
540
+
}
541
+
};
542
+
543
+
struct platform_device tegra_i2s_device1 = {
544
+
.name = "tegra-i2s",
545
+
.id = 0,
546
+
.resource = i2s_resource1,
547
+
.num_resources = ARRAY_SIZE(i2s_resource1),
548
+
};
549
+
550
+
struct platform_device tegra_i2s_device2 = {
551
+
.name = "tegra-i2s",
552
+
.id = 1,
553
+
.resource = i2s_resource2,
554
+
.num_resources = ARRAY_SIZE(i2s_resource2),
555
+
};
556
+
557
+
static struct resource tegra_das_resources[] = {
558
+
[0] = {
559
+
.start = TEGRA_APB_MISC_DAS_BASE,
560
+
.end = TEGRA_APB_MISC_DAS_BASE + TEGRA_APB_MISC_DAS_SIZE - 1,
561
+
.flags = IORESOURCE_MEM,
562
+
},
563
+
};
564
+
565
+
struct platform_device tegra_das_device = {
566
+
.name = "tegra-das",
567
+
.id = -1,
568
+
.num_resources = ARRAY_SIZE(tegra_das_resources),
569
+
.resource = tegra_das_resources,
570
+
};
571
+
572
+
struct platform_device tegra_pcm_device = {
573
+
.name = "tegra-pcm-audio",
574
+
.id = -1,
575
+
};
+4
arch/arm/mach-tegra/devices.h
+4
arch/arm/mach-tegra/devices.h
···
42
42
extern struct platform_device tegra_uartd_device;
43
43
extern struct platform_device tegra_uarte_device;
44
44
extern struct platform_device tegra_pmu_device;
45
+
extern struct platform_device tegra_i2s_device1;
46
+
extern struct platform_device tegra_i2s_device2;
47
+
extern struct platform_device tegra_das_device;
48
+
extern struct platform_device tegra_pcm_device;
45
49
46
50
#endif
+3
arch/arm/mach-tegra/include/mach/iomap.h
+3
arch/arm/mach-tegra/include/mach/iomap.h