drm/nouveau: will need to specify channel for vm-ful gpuobj allocations

Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git

kernel os linux

Abuses existing gpuobj_new() chan argument for this, which in turn forces
all NVOBJ_FLAG_VM allocations to be done from the global heap, not
suballocated from the channel's private heap. Not a problem though in
practise.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

Ben Skeggs 15 years ago 6e32fedc dd6a46cc

+19 -14

6 changed files

expand all

drivers

gpu

drm

nouveau

nouveau_drv.h

nouveau_object.c

nv04_instmem.c

nv50_instmem.c

nvc0_copy.c

nvc0_graph.c

+6 -3

drivers/gpu/drm/nouveau/nouveau_drv.h

··· 324 324 int (*suspend)(struct drm_device *dev); 325 325 void (*resume)(struct drm_device *dev); 326 326 327 - int (*get)(struct nouveau_gpuobj *, u32 size, u32 align); 327 + int (*get)(struct nouveau_gpuobj *, struct nouveau_channel *, 328 + u32 size, u32 align); 328 329 void (*put)(struct nouveau_gpuobj *); 329 330 int (*map)(struct nouveau_gpuobj *); 330 331 void (*unmap)(struct nouveau_gpuobj *); ··· 1184 1183 extern void nv04_instmem_takedown(struct drm_device *); 1185 1184 extern int nv04_instmem_suspend(struct drm_device *); 1186 1185 extern void nv04_instmem_resume(struct drm_device *); 1187 - extern int nv04_instmem_get(struct nouveau_gpuobj *, u32 size, u32 align); 1186 + extern int nv04_instmem_get(struct nouveau_gpuobj *, struct nouveau_channel *, 1187 + u32 size, u32 align); 1188 1188 extern void nv04_instmem_put(struct nouveau_gpuobj *); 1189 1189 extern int nv04_instmem_map(struct nouveau_gpuobj *); 1190 1190 extern void nv04_instmem_unmap(struct nouveau_gpuobj *); ··· 1196 1194 extern void nv50_instmem_takedown(struct drm_device *); 1197 1195 extern int nv50_instmem_suspend(struct drm_device *); 1198 1196 extern void nv50_instmem_resume(struct drm_device *); 1199 - extern int nv50_instmem_get(struct nouveau_gpuobj *, u32 size, u32 align); 1197 + extern int nv50_instmem_get(struct nouveau_gpuobj *, struct nouveau_channel *, 1198 + u32 size, u32 align); 1200 1199 extern void nv50_instmem_put(struct nouveau_gpuobj *); 1201 1200 extern int nv50_instmem_map(struct nouveau_gpuobj *); 1202 1201 extern void nv50_instmem_unmap(struct nouveau_gpuobj *);

+2 -2

drivers/gpu/drm/nouveau/nouveau_object.c

··· 191 191 list_add_tail(&gpuobj->list, &dev_priv->gpuobj_list); 192 192 spin_unlock(&dev_priv->ramin_lock); 193 193 194 - if (chan) { 194 + if (!(flags & NVOBJ_FLAG_VM) && chan) { 195 195 ramin = drm_mm_search_free(&chan->ramin_heap, size, align, 0); 196 196 if (ramin) 197 197 ramin = drm_mm_get_block(ramin, size, align); ··· 208 208 gpuobj->vinst = ramin->start + chan->ramin->vinst; 209 209 gpuobj->node = ramin; 210 210 } else { 211 - ret = instmem->get(gpuobj, size, align); 211 + ret = instmem->get(gpuobj, chan, size, align); 212 212 if (ret) { 213 213 nouveau_gpuobj_ref(NULL, &gpuobj); 214 214 return ret;

+2 -1

drivers/gpu/drm/nouveau/nv04_instmem.c

··· 112 112 } 113 113 114 114 int 115 - nv04_instmem_get(struct nouveau_gpuobj *gpuobj, u32 size, u32 align) 115 + nv04_instmem_get(struct nouveau_gpuobj *gpuobj, struct nouveau_channel *chan, 116 + u32 size, u32 align) 116 117 { 117 118 struct drm_nouveau_private *dev_priv = gpuobj->dev->dev_private; 118 119 struct drm_mm_node *ramin = NULL;

+3 -2

drivers/gpu/drm/nouveau/nv50_instmem.c

··· 306 306 }; 307 307 308 308 int 309 - nv50_instmem_get(struct nouveau_gpuobj *gpuobj, u32 size, u32 align) 309 + nv50_instmem_get(struct nouveau_gpuobj *gpuobj, struct nouveau_channel *chan, 310 + u32 size, u32 align) 310 311 { 311 312 struct drm_device *dev = gpuobj->dev; 312 313 struct drm_nouveau_private *dev_priv = dev->dev_private; ··· 336 335 if (!(gpuobj->flags & NVOBJ_FLAG_VM_USER)) 337 336 flags |= NV_MEM_ACCESS_SYS; 338 337 339 - ret = nouveau_vm_get(dev_priv->chan_vm, size, 12, flags, 338 + ret = nouveau_vm_get(chan->vm, size, 12, flags, 340 339 &node->chan_vma); 341 340 if (ret) { 342 341 vram->put(dev, &node->vram);

+1 -1

drivers/gpu/drm/nouveau/nvc0_copy.c

··· 48 48 struct nouveau_gpuobj *ctx = NULL; 49 49 int ret; 50 50 51 - ret = nouveau_gpuobj_new(dev, NULL, 256, 256, 51 + ret = nouveau_gpuobj_new(dev, chan, 256, 256, 52 52 NVOBJ_FLAG_VM | NVOBJ_FLAG_VM_USER | 53 53 NVOBJ_FLAG_ZERO_ALLOC, &ctx); 54 54 if (ret)

+5 -5

drivers/gpu/drm/nouveau/nvc0_graph.c

··· 157 157 int i = 0, gpc, tp, ret; 158 158 u32 magic; 159 159 160 - ret = nouveau_gpuobj_new(dev, NULL, 0x2000, 256, NVOBJ_FLAG_VM, 160 + ret = nouveau_gpuobj_new(dev, chan, 0x2000, 256, NVOBJ_FLAG_VM, 161 161 &grch->unk408004); 162 162 if (ret) 163 163 return ret; 164 164 165 - ret = nouveau_gpuobj_new(dev, NULL, 0x8000, 256, NVOBJ_FLAG_VM, 165 + ret = nouveau_gpuobj_new(dev, chan, 0x8000, 256, NVOBJ_FLAG_VM, 166 166 &grch->unk40800c); 167 167 if (ret) 168 168 return ret; 169 169 170 - ret = nouveau_gpuobj_new(dev, NULL, 384 * 1024, 4096, 170 + ret = nouveau_gpuobj_new(dev, chan, 384 * 1024, 4096, 171 171 NVOBJ_FLAG_VM | NVOBJ_FLAG_VM_USER, 172 172 &grch->unk418810); 173 173 if (ret) 174 174 return ret; 175 175 176 - ret = nouveau_gpuobj_new(dev, NULL, 0x1000, 0, NVOBJ_FLAG_VM, 176 + ret = nouveau_gpuobj_new(dev, chan, 0x1000, 0, NVOBJ_FLAG_VM, 177 177 &grch->mmio); 178 178 if (ret) 179 179 return ret; ··· 235 235 return -ENOMEM; 236 236 chan->engctx[NVOBJ_ENGINE_GR] = grch; 237 237 238 - ret = nouveau_gpuobj_new(dev, NULL, priv->grctx_size, 256, 238 + ret = nouveau_gpuobj_new(dev, chan, priv->grctx_size, 256, 239 239 NVOBJ_FLAG_VM | NVOBJ_FLAG_ZERO_ALLOC, 240 240 &grch->grctx); 241 241 if (ret)