Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'mvebu-dt64-4.14-2' of git://git.infradead.org/linux-mvebu into next/dt64

Pull "mvebu dt64 for 4.14 (part 2)" from Gregory CLEMENT:

- Enable uSD on ESPRESSObin (Armada 37xx based board)
- Add NAND support on Armada 7K/8K SoCs
- Enable USB host on Armada-7040-DB and Armada-8040-DB boards

* tag 'mvebu-dt64-4.14-2' of git://git.infradead.org/linux-mvebu:
ARM64: dts: marvell: enable USB host on Armada-8040-DB
ARM64: dts: marvell: enable USB host on Armada-7040-DB
ARM64: dts: marvell: add NAND support on the CP110
ARM64: dts: marvell: armada-37xx: Enable uSD on ESPRESSObin
arm64: dts: marvell: Fully re-order nodes in Marvell CP110 dtsi files

+177 -18
+25
arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts
··· 45 45 46 46 /dts-v1/; 47 47 48 + #include <dt-bindings/gpio/gpio.h> 48 49 #include "armada-372x.dtsi" 49 50 50 51 / { ··· 60 59 device_type = "memory"; 61 60 reg = <0x00000000 0x00000000 0x00000000 0x20000000>; 62 61 }; 62 + 63 + vcc_sd_reg1: regulator { 64 + compatible = "regulator-gpio"; 65 + regulator-name = "vcc_sd1"; 66 + regulator-min-microvolt = <1800000>; 67 + regulator-max-microvolt = <3300000>; 68 + regulator-boot-on; 69 + 70 + gpios = <&gpionb 4 GPIO_ACTIVE_HIGH>; 71 + gpios-states = <0>; 72 + states = <1800000 0x1 73 + 3300000 0x0>; 74 + enable-active-high; 75 + }; 63 76 }; 64 77 65 78 /* J9 */ ··· 83 68 84 69 /* J6 */ 85 70 &sata { 71 + status = "okay"; 72 + }; 73 + 74 + /* J1 */ 75 + &sdhci1 { 76 + wp-inverted; 77 + bus-width = <4>; 78 + cd-gpios = <&gpionb 3 GPIO_ACTIVE_LOW>; 79 + marvell,pad-type = "sd"; 80 + vqmmc-supply = <&vcc_sd_reg1>; 86 81 status = "okay"; 87 82 }; 88 83
+39
arch/arm64/boot/dts/marvell/armada-7040-db.dts
··· 44 44 * Device Tree file for Marvell Armada 7040 Development board platform 45 45 */ 46 46 47 + #include <dt-bindings/gpio/gpio.h> 47 48 #include "armada-7040.dtsi" 48 49 49 50 / { ··· 59 58 memory@00000000 { 60 59 device_type = "memory"; 61 60 reg = <0x0 0x0 0x0 0x80000000>; 61 + }; 62 + 63 + cpm_reg_usb3_0_vbus: cpm-usb3-0-vbus { 64 + compatible = "regulator-fixed"; 65 + regulator-name = "usb3h0-vbus"; 66 + regulator-min-microvolt = <5000000>; 67 + regulator-max-microvolt = <5000000>; 68 + enable-active-high; 69 + gpio = <&expander0 0 GPIO_ACTIVE_HIGH>; 70 + }; 71 + 72 + cpm_reg_usb3_1_vbus: cpm-usb3-1-vbus { 73 + compatible = "regulator-fixed"; 74 + regulator-name = "usb3h1-vbus"; 75 + regulator-min-microvolt = <5000000>; 76 + regulator-max-microvolt = <5000000>; 77 + enable-active-high; 78 + gpio = <&expander0 1 GPIO_ACTIVE_HIGH>; 79 + }; 80 + 81 + cpm_usb3_0_phy: cpm-usb3-0-phy { 82 + compatible = "usb-nop-xceiv"; 83 + vcc-supply = <&cpm_reg_usb3_0_vbus>; 84 + }; 85 + 86 + cpm_usb3_1_phy: cpm-usb3-1-phy { 87 + compatible = "usb-nop-xceiv"; 88 + vcc-supply = <&cpm_reg_usb3_1_vbus>; 62 89 }; 63 90 }; 64 91 ··· 134 105 &cpm_i2c0 { 135 106 status = "okay"; 136 107 clock-frequency = <100000>; 108 + 109 + expander0: pca9555@21 { 110 + compatible = "nxp,pca9555"; 111 + pinctrl-names = "default"; 112 + gpio-controller; 113 + #gpio-cells = <2>; 114 + reg = <0x21>; 115 + }; 137 116 }; 138 117 139 118 &cpm_spi1 { ··· 177 140 }; 178 141 179 142 &cpm_usb3_0 { 143 + usb-phy = <&cpm_usb3_0_phy>; 180 144 status = "okay"; 181 145 }; 182 146 183 147 &cpm_usb3_1 { 148 + usb-phy = <&cpm_usb3_1_phy>; 184 149 status = "okay"; 185 150 }; 186 151
+65
arch/arm64/boot/dts/marvell/armada-8040-db.dts
··· 44 44 * Device Tree file for Marvell Armada 8040 Development board platform 45 45 */ 46 46 47 + #include <dt-bindings/gpio/gpio.h> 47 48 #include "armada-8040.dtsi" 48 49 49 50 / { ··· 59 58 memory@00000000 { 60 59 device_type = "memory"; 61 60 reg = <0x0 0x0 0x0 0x80000000>; 61 + }; 62 + 63 + cpm_reg_usb3_0_vbus: cpm-usb3-0-vbus { 64 + compatible = "regulator-fixed"; 65 + regulator-name = "cpm-usb3h0-vbus"; 66 + regulator-min-microvolt = <5000000>; 67 + regulator-max-microvolt = <5000000>; 68 + enable-active-high; 69 + gpio = <&expander0 0 GPIO_ACTIVE_HIGH>; 70 + }; 71 + 72 + cpm_reg_usb3_1_vbus: cpm-usb3-1-vbus { 73 + compatible = "regulator-fixed"; 74 + regulator-name = "cpm-usb3h1-vbus"; 75 + regulator-min-microvolt = <5000000>; 76 + regulator-max-microvolt = <5000000>; 77 + enable-active-high; 78 + gpio = <&expander0 1 GPIO_ACTIVE_HIGH>; 79 + }; 80 + 81 + cpm_usb3_0_phy: cpm-usb3-0-phy { 82 + compatible = "usb-nop-xceiv"; 83 + vcc-supply = <&cpm_reg_usb3_0_vbus>; 84 + }; 85 + 86 + cpm_usb3_1_phy: cpm-usb3-1-phy { 87 + compatible = "usb-nop-xceiv"; 88 + vcc-supply = <&cpm_reg_usb3_1_vbus>; 89 + }; 90 + 91 + cps_reg_usb3_0_vbus: cps-usb3-0-vbus { 92 + compatible = "regulator-fixed"; 93 + regulator-name = "cps-usb3h0-vbus"; 94 + regulator-min-microvolt = <5000000>; 95 + regulator-max-microvolt = <5000000>; 96 + enable-active-high; 97 + gpio = <&expander1 0 GPIO_ACTIVE_HIGH>; 98 + }; 99 + 100 + cps_usb3_0_phy: cps-usb3-0-phy { 101 + compatible = "usb-nop-xceiv"; 102 + vcc-supply = <&cps_reg_usb3_0_vbus>; 62 103 }; 63 104 }; 64 105 ··· 150 107 &cpm_i2c0 { 151 108 status = "okay"; 152 109 clock-frequency = <100000>; 110 + 111 + /* U31 */ 112 + expander0: pca9555@21 { 113 + compatible = "nxp,pca9555"; 114 + pinctrl-names = "default"; 115 + gpio-controller; 116 + #gpio-cells = <2>; 117 + reg = <0x21>; 118 + }; 119 + 120 + /* U25 */ 121 + expander1: pca9555@25 { 122 + compatible = "nxp,pca9555"; 123 + pinctrl-names = "default"; 124 + gpio-controller; 125 + #gpio-cells = <2>; 126 + reg = <0x25>; 127 + }; 128 + 153 129 }; 154 130 155 131 /* CON4 on CP0 expansion */ ··· 178 116 179 117 /* CON9 on CP0 expansion */ 180 118 &cpm_usb3_0 { 119 + usb-phy = <&cpm_usb3_0_phy>; 181 120 status = "okay"; 182 121 }; 183 122 184 123 /* CON10 on CP0 expansion */ 185 124 &cpm_usb3_1 { 125 + usb-phy = <&cpm_usb3_1_phy>; 186 126 status = "okay"; 187 127 }; 188 128 ··· 223 159 224 160 /* CON9 on CP1 expansion */ 225 161 &cps_usb3_0 { 162 + usb-phy = <&cps_usb3_0_phy>; 226 163 status = "okay"; 227 164 }; 228 165
+24 -9
arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi
··· 162 162 }; 163 163 }; 164 164 165 - cpm_sata0: sata@540000 { 166 - compatible = "marvell,armada-8k-ahci", 167 - "generic-ahci"; 168 - reg = <0x540000 0x30000>; 169 - interrupts = <ICU_GRP_NSR 107 IRQ_TYPE_LEVEL_HIGH>; 170 - clocks = <&cpm_clk 1 15>; 171 - status = "disabled"; 172 - }; 173 - 174 165 cpm_usb3_0: usb3@500000 { 175 166 compatible = "marvell,armada-8k-xhci", 176 167 "generic-xhci"; ··· 179 188 dma-coherent; 180 189 interrupts = <ICU_GRP_NSR 105 IRQ_TYPE_LEVEL_HIGH>; 181 190 clocks = <&cpm_clk 1 23>; 191 + status = "disabled"; 192 + }; 193 + 194 + cpm_sata0: sata@540000 { 195 + compatible = "marvell,armada-8k-ahci", 196 + "generic-ahci"; 197 + reg = <0x540000 0x30000>; 198 + interrupts = <ICU_GRP_NSR 107 IRQ_TYPE_LEVEL_HIGH>; 199 + clocks = <&cpm_clk 1 15>; 182 200 status = "disabled"; 183 201 }; 184 202 ··· 246 246 #size-cells = <0>; 247 247 interrupts = <ICU_GRP_NSR 121 IRQ_TYPE_LEVEL_HIGH>; 248 248 clocks = <&cpm_clk 1 21>; 249 + status = "disabled"; 250 + }; 251 + 252 + cpm_nand: nand@720000 { 253 + /* 254 + * Due to the limiation of the pin available 255 + * this controller is only usable on the CPM 256 + * for A7K and on the CPS for A8K. 257 + */ 258 + compatible = "marvell,armada370-nand"; 259 + reg = <0x720000 0x54>; 260 + #address-cells = <1>; 261 + #size-cells = <1>; 262 + interrupts = <ICU_GRP_NSR 115 IRQ_TYPE_LEVEL_HIGH>; 263 + clocks = <&cpm_clk 1 2>; 249 264 status = "disabled"; 250 265 }; 251 266
+24 -9
arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi
··· 163 163 164 164 }; 165 165 166 - cps_sata0: sata@540000 { 167 - compatible = "marvell,armada-8k-ahci", 168 - "generic-ahci"; 169 - reg = <0x540000 0x30000>; 170 - interrupts = <ICU_GRP_NSR 107 IRQ_TYPE_LEVEL_HIGH>; 171 - clocks = <&cps_clk 1 15>; 172 - status = "disabled"; 173 - }; 174 - 175 166 cps_usb3_0: usb3@500000 { 176 167 compatible = "marvell,armada-8k-xhci", 177 168 "generic-xhci"; ··· 180 189 dma-coherent; 181 190 interrupts = <ICU_GRP_NSR 105 IRQ_TYPE_LEVEL_HIGH>; 182 191 clocks = <&cps_clk 1 23>; 192 + status = "disabled"; 193 + }; 194 + 195 + cps_sata0: sata@540000 { 196 + compatible = "marvell,armada-8k-ahci", 197 + "generic-ahci"; 198 + reg = <0x540000 0x30000>; 199 + interrupts = <ICU_GRP_NSR 107 IRQ_TYPE_LEVEL_HIGH>; 200 + clocks = <&cps_clk 1 15>; 183 201 status = "disabled"; 184 202 }; 185 203 ··· 247 247 #size-cells = <0>; 248 248 interrupts = <ICU_GRP_NSR 121 IRQ_TYPE_LEVEL_HIGH>; 249 249 clocks = <&cps_clk 1 21>; 250 + status = "disabled"; 251 + }; 252 + 253 + cps_nand: nand@720000 { 254 + /* 255 + * Due to the limiation of the pin available 256 + * this controller is only usable on the CPM 257 + * for A7K and on the CPS for A8K. 258 + */ 259 + compatible = "marvell,armada370-nand"; 260 + reg = <0x720000 0x54>; 261 + #address-cells = <1>; 262 + #size-cells = <1>; 263 + interrupts = <ICU_GRP_NSR 115 IRQ_TYPE_LEVEL_HIGH>; 264 + clocks = <&cps_clk 1 2>; 250 265 status = "disabled"; 251 266 }; 252 267