Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus

* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus:
[MIPS] Count timer interrupts correctly.
[MIPS] SMTC and non-SMTC kernel and modules are incompatible
[MIPS] EMMA2RH: Disable GEN_RTC, it can't possibly work.
[MIPS] Remove a duplicated local variable in test_and_clear_bit()
[MIPS] use compat_siginfo in rt_sigframe_n32
[MIPS] 20K: Handle WAIT related bugs according to errata information
[MIPS] AP/SP requires shadow registers, auto enable support.
[MIPS] Fix pb1500 reg B access
[MIPS] Alchemy: Fix wrong cast
[MIPS] remove "support for" from system type entry
[MIPS] add io_map_base to pci_controller on Cobalt
[MIPS] __ucmpdi2 arguments are unsigned long long.

+94 -76
+3 -2
arch/mips/Kconfig
··· 317 317 select SYS_SUPPORTS_LITTLE_ENDIAN 318 318 319 319 config PNX8550_STB810 320 - bool "Support for Philips PNX8550 based STB810 board" 320 + bool "Philips PNX8550 based STB810 board" 321 321 select PNX8550 322 322 select SYS_SUPPORTS_LITTLE_ENDIAN 323 323 ··· 392 392 can be found at http://www.linux-mips.org/wiki/Qemu. 393 393 394 394 config MARKEINS 395 - bool "Support for NEC EMMA2RH Mark-eins" 395 + bool "NEC EMMA2RH Mark-eins" 396 396 select DMA_NONCOHERENT 397 397 select HW_HAS_PCI 398 398 select IRQ_CPU ··· 1392 1392 depends on SYS_SUPPORTS_MULTITHREADING 1393 1393 select CPU_MIPSR2_IRQ_VI 1394 1394 select CPU_MIPSR2_IRQ_EI 1395 + select CPU_MIPSR2_SRS 1395 1396 select MIPS_MT 1396 1397 help 1397 1398 Includes a loader for loading an elf relocatable object
+1 -1
arch/mips/au1000/pb1100/init.c
··· 53 53 54 54 prom_argc = fw_arg0; 55 55 prom_argv = (char **) fw_arg1; 56 - prom_envp = (int *) fw_arg3; 56 + prom_envp = (char **) fw_arg3; 57 57 58 58 mips_machgroup = MACH_GROUP_ALCHEMY; 59 59 mips_machtype = MACH_PB1100;
+1 -1
arch/mips/au1000/pb1500/board_setup.c
··· 125 125 au_writel((au_readl(0xac000028) | 0x20), 0xac000028); 126 126 } 127 127 /* Put the clock in BCD mode */ 128 - if (readl(0xac00002C) & 0x4) { /* reg B */ 128 + if (au_readl(0xac00002C) & 0x4) { /* reg B */ 129 129 au_writel(au_readl(0xac00002c) & ~0x4, 0xac00002c); 130 130 au_sync(); 131 131 }
+1
arch/mips/cobalt/pci.c
··· 35 35 .mem_resource = &cobalt_mem_resource, 36 36 .io_resource = &cobalt_io_resource, 37 37 .io_offset = 0 - GT_DEF_PCI0_IO_BASE, 38 + .io_map_base = CKSEG1ADDR(GT_DEF_PCI0_IO_BASE), 38 39 }; 39 40 40 41 static int __init cobalt_pci_init(void)
+1 -2
arch/mips/configs/emma2rh_defconfig
··· 951 951 # CONFIG_WATCHDOG is not set 952 952 # CONFIG_HW_RANDOM is not set 953 953 CONFIG_RTC=m 954 - CONFIG_GEN_RTC=m 955 - CONFIG_GEN_RTC_X=y 954 + # CONFIG_GEN_RTC is not set 956 955 # CONFIG_DTLK is not set 957 956 # CONFIG_R3964 is not set 958 957 # CONFIG_APPLICOM is not set
+11 -1
arch/mips/kernel/cpu-probe.c
··· 137 137 case CPU_4KEC: 138 138 case CPU_4KSC: 139 139 case CPU_5KC: 140 - /* case CPU_20KC:*/ 141 140 case CPU_24K: 142 141 case CPU_25KF: 143 142 case CPU_34K: ··· 154 155 case CPU_AU1200: 155 156 if (allow_au1k_wait) 156 157 cpu_wait = au1k_wait; 158 + break; 159 + case CPU_20KC: 160 + /* 161 + * WAIT on Rev1.0 has E1, E2, E3 and E16. 162 + * WAIT on Rev2.0 and Rev3.0 has E16. 163 + * Rev3.1 WAIT is nop, why bother 164 + */ 165 + if ((c->processor_id & 0xff) <= 0x64) 166 + break; 167 + 168 + cpu_wait = r4k_wait; 157 169 break; 158 170 case CPU_RM9000: 159 171 if ((c->processor_id & 0x00ff) >= 0x40)
-62
arch/mips/kernel/signal32.c
··· 36 36 37 37 #include "signal-common.h" 38 38 39 - #define SI_PAD_SIZE32 ((SI_MAX_SIZE/sizeof(int)) - 3) 40 - 41 - typedef struct compat_siginfo { 42 - int si_signo; 43 - int si_code; 44 - int si_errno; 45 - 46 - union { 47 - int _pad[SI_PAD_SIZE32]; 48 - 49 - /* kill() */ 50 - struct { 51 - compat_pid_t _pid; /* sender's pid */ 52 - compat_uid_t _uid; /* sender's uid */ 53 - } _kill; 54 - 55 - /* SIGCHLD */ 56 - struct { 57 - compat_pid_t _pid; /* which child */ 58 - compat_uid_t _uid; /* sender's uid */ 59 - int _status; /* exit code */ 60 - compat_clock_t _utime; 61 - compat_clock_t _stime; 62 - } _sigchld; 63 - 64 - /* IRIX SIGCHLD */ 65 - struct { 66 - compat_pid_t _pid; /* which child */ 67 - compat_clock_t _utime; 68 - int _status; /* exit code */ 69 - compat_clock_t _stime; 70 - } _irix_sigchld; 71 - 72 - /* SIGILL, SIGFPE, SIGSEGV, SIGBUS */ 73 - struct { 74 - s32 _addr; /* faulting insn/memory ref. */ 75 - } _sigfault; 76 - 77 - /* SIGPOLL, SIGXFSZ (To do ...) */ 78 - struct { 79 - int _band; /* POLL_IN, POLL_OUT, POLL_MSG */ 80 - int _fd; 81 - } _sigpoll; 82 - 83 - /* POSIX.1b timers */ 84 - struct { 85 - timer_t _tid; /* timer id */ 86 - int _overrun; /* overrun count */ 87 - compat_sigval_t _sigval;/* same as below */ 88 - int _sys_private; /* not to be passed to user */ 89 - } _timer; 90 - 91 - /* POSIX.1b signals */ 92 - struct { 93 - compat_pid_t _pid; /* sender's pid */ 94 - compat_uid_t _uid; /* sender's uid */ 95 - compat_sigval_t _sigval; 96 - } _rt; 97 - 98 - } _sifields; 99 - } compat_siginfo_t; 100 - 101 39 /* 102 40 * Including <asm/unistd.h> would give use the 64-bit syscall numbers ... 103 41 */
+3 -3
arch/mips/kernel/signal_n32.c
··· 72 72 struct rt_sigframe_n32 { 73 73 u32 rs_ass[4]; /* argument save space for o32 */ 74 74 u32 rs_code[2]; /* signal trampoline */ 75 - struct siginfo rs_info; 75 + struct compat_siginfo rs_info; 76 76 struct ucontextn32 rs_uc; 77 77 }; 78 78 ··· 81 81 struct rt_sigframe_n32 { 82 82 u32 rs_ass[4]; /* argument save space for o32 */ 83 83 u32 rs_pad[2]; 84 - struct siginfo rs_info; 84 + struct compat_siginfo rs_info; 85 85 struct ucontextn32 rs_uc; 86 86 u32 rs_code[8] ____cacheline_aligned; /* signal trampoline */ 87 87 }; ··· 187 187 install_sigtramp(frame->rs_code, __NR_N32_rt_sigreturn); 188 188 189 189 /* Create siginfo. */ 190 - err |= copy_siginfo_to_user(&frame->rs_info, info); 190 + err |= copy_siginfo_to_user32(&frame->rs_info, info); 191 191 192 192 /* Create the ucontext. */ 193 193 err |= __put_user(0, &frame->rs_uc.uc_flags);
+1 -1
arch/mips/kernel/smtc.c
··· 822 822 switch (type_copy) { 823 823 case SMTC_CLOCK_TICK: 824 824 irq_enter(); 825 - kstat_this_cpu.irqs[MIPS_CPU_IRQ_BASE + cp0_perfcount_irq]++; 825 + kstat_this_cpu.irqs[MIPS_CPU_IRQ_BASE + cp0_compare_irq]++; 826 826 /* Invoke Clock "Interrupt" */ 827 827 ipi_timer_latch[dest_copy] = 0; 828 828 #ifdef CONFIG_SMTC_IDLE_HOOK_DEBUG
+1 -1
arch/mips/lib/ucmpdi2.c
··· 2 2 3 3 #include "libgcc.h" 4 4 5 - word_type __ucmpdi2 (unsigned long a, unsigned long b) 5 + word_type __ucmpdi2 (unsigned long long a, unsigned long long b) 6 6 { 7 7 const DWunion au = {.ll = a}; 8 8 const DWunion bu = {.ll = b};
+1 -1
include/asm-mips/bitops.h
··· 310 310 311 311 if (cpu_has_llsc && R10000_LLSC_WAR) { 312 312 unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG); 313 - unsigned long temp, res; 313 + unsigned long temp; 314 314 315 315 __asm__ __volatile__( 316 316 " .set mips3 \n"
+62
include/asm-mips/compat-signal.h
··· 10 10 11 11 #include <asm/uaccess.h> 12 12 13 + #define SI_PAD_SIZE32 ((SI_MAX_SIZE/sizeof(int)) - 3) 14 + 15 + typedef struct compat_siginfo { 16 + int si_signo; 17 + int si_code; 18 + int si_errno; 19 + 20 + union { 21 + int _pad[SI_PAD_SIZE32]; 22 + 23 + /* kill() */ 24 + struct { 25 + compat_pid_t _pid; /* sender's pid */ 26 + compat_uid_t _uid; /* sender's uid */ 27 + } _kill; 28 + 29 + /* SIGCHLD */ 30 + struct { 31 + compat_pid_t _pid; /* which child */ 32 + compat_uid_t _uid; /* sender's uid */ 33 + int _status; /* exit code */ 34 + compat_clock_t _utime; 35 + compat_clock_t _stime; 36 + } _sigchld; 37 + 38 + /* IRIX SIGCHLD */ 39 + struct { 40 + compat_pid_t _pid; /* which child */ 41 + compat_clock_t _utime; 42 + int _status; /* exit code */ 43 + compat_clock_t _stime; 44 + } _irix_sigchld; 45 + 46 + /* SIGILL, SIGFPE, SIGSEGV, SIGBUS */ 47 + struct { 48 + s32 _addr; /* faulting insn/memory ref. */ 49 + } _sigfault; 50 + 51 + /* SIGPOLL, SIGXFSZ (To do ...) */ 52 + struct { 53 + int _band; /* POLL_IN, POLL_OUT, POLL_MSG */ 54 + int _fd; 55 + } _sigpoll; 56 + 57 + /* POSIX.1b timers */ 58 + struct { 59 + timer_t _tid; /* timer id */ 60 + int _overrun; /* overrun count */ 61 + compat_sigval_t _sigval;/* same as below */ 62 + int _sys_private; /* not to be passed to user */ 63 + } _timer; 64 + 65 + /* POSIX.1b signals */ 66 + struct { 67 + compat_pid_t _pid; /* sender's pid */ 68 + compat_uid_t _uid; /* sender's uid */ 69 + compat_sigval_t _sigval; 70 + } _rt; 71 + 72 + } _sifields; 73 + } compat_siginfo_t; 74 + 13 75 static inline int __copy_conv_sigset_to_user(compat_sigset_t __user *d, 14 76 const sigset_t *s) 15 77 {
+8 -1
include/asm-mips/module.h
··· 122 122 #define MODULE_KERNEL_TYPE "64BIT " 123 123 #endif 124 124 125 - #define MODULE_ARCH_VERMAGIC MODULE_PROC_FAMILY MODULE_KERNEL_TYPE 125 + #ifdef CONFIG_MIPS_MT_SMTC 126 + #define MODULE_KERNEL_SMTC "MT_SMTC " 127 + #else 128 + #define MODULE_KERNEL_SMTC "" 129 + #endif 130 + 131 + #define MODULE_ARCH_VERMAGIC \ 132 + MODULE_PROC_FAMILY MODULE_KERNEL_TYPE MODULE_KERNEL_SMTC 126 133 127 134 #endif /* _ASM_MODULE_H */