Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'mmc-v3.16-1' of git://git.linaro.org/people/ulf.hansson/mmc into next

Pull MMC update from Ulf Hansson:
"These patches are mainly updates for the mmci driver and have been
tested in linux-next.

Some ARM SoC related patches are also included and those have been
acked from the corresponding maintainers to go through my mmc tree.

Updates for mmci driver:
- Put the device into low power state at system suspend.
- Convert to the common mmc DT parser.
- Add missing DT bindings needed for ux500.

Updates for ARM ux500|u300:
- Convert to the common mmc DT bindings.
- Remove redundant board file for mmci platform data"

* tag 'mmc-v3.16-1' of git://git.linaro.org/people/ulf.hansson/mmc: (22 commits)
mmc: mmci: Enforce DMA configuration through DT
mmc: mmci: Enforce max frequency configuration through DT
mmc: mmci: Enforce mmc capabilities through DT
mmc: mmci: Enforce DT for signal direction and feedback clock
ARM: ux500: Remove redundant board file for mmci platform data
ARM: ux500: Add a vmmc regulator through DT for the poped eMMC for href
ARM: ux500: Add the mmc capabilities flags to DT
mmc: mmci: Enable MMC_CAP_CMD23
mmc: mmci: Mark the DT bindings for highspeed mode as deprecated
ARM: u300: Convert to the common mmc DT bindings for highspeed mode
ARM: nomadik: Convert to the common mmc DT bindings for highspeed mode
ARM: ux500: Convert to the common mmc DT bindings for highspeed mode
ARM: ux500: Add mmci signal directions and feeback clock in DT for href
mmc: mmci: Use the common mmc DT parser
mmc: mmci: Add DT bindings for feedback clock pin
mmc: mmci: Add DT bindings for signal direction
mmc: mmci: Update DT documentation
mmc: mmci: Convert to devm functions
mmc: mmci: Convert to the mmc gpio API
mmc: mmci: Put the device into low power state at system suspend
...

+170 -484
+50 -4
Documentation/devicetree/bindings/mmc/mmci.txt
··· 4 4 reading and writing to MultiMedia and SD cards alike. 5 5 6 6 This file documents differences between the core properties described 7 - by mmc.txt and the properties used by the mmci driver. 7 + by mmc.txt and the properties used by the mmci driver. Using "st" as 8 + the prefix for a property, indicates support by the ST Micro variant. 8 9 9 10 Required properties: 10 11 - compatible : contains "arm,pl18x", "arm,primecell". 11 - - arm,primecell-periphid : contains the PrimeCell Peripheral ID. 12 + - vmmc-supply : phandle to the regulator device tree node, mentioned 13 + as the VCC/VDD supply in the eMMC/SD specs. 12 14 13 15 Optional properties: 14 - - mmc-cap-mmc-highspeed : indicates whether MMC is high speed capable 15 - - mmc-cap-sd-highspeed : indicates whether SD is high speed capable 16 + - arm,primecell-periphid : contains the PrimeCell Peripheral ID, it overrides 17 + the ID provided by the HW 18 + - vqmmc-supply : phandle to the regulator device tree node, mentioned 19 + as the VCCQ/VDD_IO supply in the eMMC/SD specs. 20 + - st,sig-dir-dat0 : bus signal direction pin used for DAT[0]. 21 + - st,sig-dir-dat2 : bus signal direction pin used for DAT[2]. 22 + - st,sig-dir-dat31 : bus signal direction pin used for DAT[3] and DAT[1]. 23 + - st,sig-dir-dat74 : bus signal direction pin used for DAT[4] to DAT[7]. 24 + - st,sig-dir-cmd : cmd signal direction pin used for CMD. 25 + - st,sig-pin-fbclk : feedback clock signal pin used. 26 + 27 + Deprecated properties: 28 + - mmc-cap-mmc-highspeed : indicates whether MMC is high speed capable. 29 + - mmc-cap-sd-highspeed : indicates whether SD is high speed capable. 30 + 31 + Example: 32 + 33 + sdi0_per1@80126000 { 34 + compatible = "arm,pl18x", "arm,primecell"; 35 + reg = <0x80126000 0x1000>; 36 + interrupts = <0 60 IRQ_TYPE_LEVEL_HIGH>; 37 + 38 + dmas = <&dma 29 0 0x2>, /* Logical - DevToMem */ 39 + <&dma 29 0 0x0>; /* Logical - MemToDev */ 40 + dma-names = "rx", "tx"; 41 + 42 + clocks = <&prcc_kclk 1 5>, <&prcc_pclk 1 5>; 43 + clock-names = "sdi", "apb_pclk"; 44 + 45 + max-frequency = <100000000>; 46 + bus-width = <4>; 47 + cap-sd-highspeed; 48 + cap-mmc-highspeed; 49 + cd-gpios = <&gpio2 31 0x4>; // 95 50 + st,sig-dir-dat0; 51 + st,sig-dir-dat2; 52 + st,sig-dir-cmd; 53 + st,sig-pin-fbclk; 54 + 55 + vmmc-supply = <&ab8500_ldo_aux3_reg>; 56 + vqmmc-supply = <&vmmci>; 57 + 58 + pinctrl-names = "default", "sleep"; 59 + pinctrl-0 = <&sdi0_default_mode>; 60 + pinctrl-1 = <&sdi0_sleep_mode>; 61 + };
+3 -3
arch/arm/boot/dts/ste-ccu9540.dts
··· 38 38 arm,primecell-periphid = <0x10480180>; 39 39 max-frequency = <100000000>; 40 40 bus-width = <4>; 41 - mmc-cap-sd-highspeed; 42 - mmc-cap-mmc-highspeed; 41 + cap-sd-highspeed; 42 + cap-mmc-highspeed; 43 43 vmmc-supply = <&ab8500_ldo_aux3_reg>; 44 44 45 45 cd-gpios = <&gpio7 6 0x4>; // 230 ··· 63 63 arm,primecell-periphid = <0x10480180>; 64 64 max-frequency = <100000000>; 65 65 bus-width = <8>; 66 - mmc-cap-mmc-highspeed; 66 + cap-mmc-highspeed; 67 67 vmmc-supply = <&ab8500_ldo_aux2_reg>; 68 68 69 69 status = "okay";
+15 -4
arch/arm/boot/dts/ste-href.dtsi
··· 116 116 arm,primecell-periphid = <0x10480180>; 117 117 max-frequency = <100000000>; 118 118 bus-width = <4>; 119 - mmc-cap-sd-highspeed; 120 - mmc-cap-mmc-highspeed; 119 + cap-sd-highspeed; 120 + cap-mmc-highspeed; 121 + sd-uhs-sdr12; 122 + sd-uhs-sdr25; 123 + full-pwr-cycle; 124 + st,sig-dir-dat0; 125 + st,sig-dir-dat2; 126 + st,sig-dir-cmd; 127 + st,sig-pin-fbclk; 121 128 vmmc-supply = <&ab8500_ldo_aux3_reg>; 122 129 vqmmc-supply = <&vmmci>; 123 130 pinctrl-names = "default", "sleep"; ··· 139 132 arm,primecell-periphid = <0x10480180>; 140 133 max-frequency = <100000000>; 141 134 bus-width = <4>; 135 + non-removable; 142 136 pinctrl-names = "default", "sleep"; 143 137 pinctrl-0 = <&sdi1_default_mode>; 144 138 pinctrl-1 = <&sdi1_sleep_mode>; ··· 152 144 arm,primecell-periphid = <0x10480180>; 153 145 max-frequency = <100000000>; 154 146 bus-width = <8>; 155 - mmc-cap-mmc-highspeed; 147 + cap-mmc-highspeed; 148 + non-removable; 149 + vmmc-supply = <&db8500_vsmps2_reg>; 156 150 pinctrl-names = "default", "sleep"; 157 151 pinctrl-0 = <&sdi2_default_mode>; 158 152 pinctrl-1 = <&sdi2_sleep_mode>; ··· 167 157 arm,primecell-periphid = <0x10480180>; 168 158 max-frequency = <100000000>; 169 159 bus-width = <8>; 170 - mmc-cap-mmc-highspeed; 160 + cap-mmc-highspeed; 161 + non-removable; 171 162 vmmc-supply = <&ab8500_ldo_aux2_reg>; 172 163 pinctrl-names = "default", "sleep"; 173 164 pinctrl-0 = <&sdi4_default_mode>;
+2 -2
arch/arm/boot/dts/ste-nomadik-stn8815.dtsi
··· 840 840 interrupts = <22>; 841 841 max-frequency = <48000000>; 842 842 bus-width = <4>; 843 - mmc-cap-mmc-highspeed; 844 - mmc-cap-sd-highspeed; 843 + cap-mmc-highspeed; 844 + cap-sd-highspeed; 845 845 cd-gpios = <&gpio3 15 0x1>; 846 846 cd-inverted; 847 847 pinctrl-names = "default";
+2 -2
arch/arm/boot/dts/ste-snowball.dts
··· 156 156 arm,primecell-periphid = <0x10480180>; 157 157 max-frequency = <100000000>; 158 158 bus-width = <4>; 159 - mmc-cap-mmc-highspeed; 159 + cap-mmc-highspeed; 160 160 vmmc-supply = <&ab8500_ldo_aux3_reg>; 161 161 vqmmc-supply = <&vmmci>; 162 162 pinctrl-names = "default", "sleep"; ··· 195 195 arm,primecell-periphid = <0x10480180>; 196 196 max-frequency = <100000000>; 197 197 bus-width = <8>; 198 - mmc-cap-mmc-highspeed; 198 + cap-mmc-highspeed; 199 199 vmmc-supply = <&ab8500_ldo_aux2_reg>; 200 200 pinctrl-names = "default", "sleep"; 201 201 pinctrl-0 = <&sdi4_default_mode>;
+2 -2
arch/arm/boot/dts/ste-u300.dts
··· 442 442 clock-names = "apb_pclk", "mclk"; 443 443 max-frequency = <24000000>; 444 444 bus-width = <4>; // SD-card slot 445 - mmc-cap-mmc-highspeed; 446 - mmc-cap-sd-highspeed; 445 + cap-mmc-highspeed; 446 + cap-sd-highspeed; 447 447 cd-gpios = <&gpio 12 0x4>; 448 448 cd-inverted; 449 449 vmmc-supply = <&ab3100_ldo_g_reg>;
-3
arch/arm/mach-lpc32xx/phy3250.c
··· 202 202 .ocr_mask = MMC_VDD_30_31 | MMC_VDD_31_32 | 203 203 MMC_VDD_32_33 | MMC_VDD_33_34, 204 204 .ios_handler = mmc_handle_ios, 205 - .dma_filter = NULL, 206 - /* No DMA for now since AMBA PL080 dmaengine driver only does scatter 207 - * gather, and the MMCI driver doesn't do it this way */ 208 205 }; 209 206 210 207 static struct lpc32xx_slc_platform_data lpc32xx_slc_data = {
+1 -2
arch/arm/mach-ux500/Makefile
··· 5 5 obj-y := cpu.o id.o timer.o pm.o 6 6 obj-$(CONFIG_CACHE_L2X0) += cache-l2x0.o 7 7 obj-$(CONFIG_UX500_SOC_DB8500) += cpu-db8500.o 8 - obj-$(CONFIG_MACH_MOP500) += board-mop500-sdi.o \ 9 - board-mop500-regulators.o \ 8 + obj-$(CONFIG_MACH_MOP500) += board-mop500-regulators.o \ 10 9 board-mop500-audio.o 11 10 obj-$(CONFIG_SMP) += platsmp.o headsmp.o 12 11 obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
-166
arch/arm/mach-ux500/board-mop500-sdi.c
··· 1 - /* 2 - * Copyright (C) ST-Ericsson SA 2010 3 - * 4 - * Author: Hanumath Prasad <hanumath.prasad@stericsson.com> 5 - * License terms: GNU General Public License (GPL) version 2 6 - */ 7 - 8 - #include <linux/kernel.h> 9 - #include <linux/gpio.h> 10 - #include <linux/amba/bus.h> 11 - #include <linux/amba/mmci.h> 12 - #include <linux/mmc/host.h> 13 - #include <linux/platform_device.h> 14 - #include <linux/platform_data/dma-ste-dma40.h> 15 - 16 - #include <asm/mach-types.h> 17 - 18 - #include "db8500-regs.h" 19 - #include "board-mop500.h" 20 - #include "ste-dma40-db8500.h" 21 - 22 - /* 23 - * v2 has a new version of this block that need to be forced, the number found 24 - * in hardware is incorrect 25 - */ 26 - #define U8500_SDI_V2_PERIPHID 0x10480180 27 - 28 - /* 29 - * SDI 0 (MicroSD slot) 30 - */ 31 - 32 - #ifdef CONFIG_STE_DMA40 33 - struct stedma40_chan_cfg mop500_sdi0_dma_cfg_rx = { 34 - .mode = STEDMA40_MODE_LOGICAL, 35 - .dir = DMA_DEV_TO_MEM, 36 - .dev_type = DB8500_DMA_DEV29_SD_MM0, 37 - }; 38 - 39 - static struct stedma40_chan_cfg mop500_sdi0_dma_cfg_tx = { 40 - .mode = STEDMA40_MODE_LOGICAL, 41 - .dir = DMA_MEM_TO_DEV, 42 - .dev_type = DB8500_DMA_DEV29_SD_MM0, 43 - }; 44 - #endif 45 - 46 - struct mmci_platform_data mop500_sdi0_data = { 47 - .f_max = 100000000, 48 - .capabilities = MMC_CAP_4_BIT_DATA | 49 - MMC_CAP_SD_HIGHSPEED | 50 - MMC_CAP_MMC_HIGHSPEED | 51 - MMC_CAP_ERASE | 52 - MMC_CAP_UHS_SDR12 | 53 - MMC_CAP_UHS_SDR25, 54 - .gpio_wp = -1, 55 - .sigdir = MCI_ST_FBCLKEN | 56 - MCI_ST_CMDDIREN | 57 - MCI_ST_DATA0DIREN | 58 - MCI_ST_DATA2DIREN, 59 - #ifdef CONFIG_STE_DMA40 60 - .dma_filter = stedma40_filter, 61 - .dma_rx_param = &mop500_sdi0_dma_cfg_rx, 62 - .dma_tx_param = &mop500_sdi0_dma_cfg_tx, 63 - #endif 64 - }; 65 - 66 - /* 67 - * SDI1 (SDIO WLAN) 68 - */ 69 - #ifdef CONFIG_STE_DMA40 70 - static struct stedma40_chan_cfg sdi1_dma_cfg_rx = { 71 - .mode = STEDMA40_MODE_LOGICAL, 72 - .dir = DMA_DEV_TO_MEM, 73 - .dev_type = DB8500_DMA_DEV32_SD_MM1, 74 - }; 75 - 76 - static struct stedma40_chan_cfg sdi1_dma_cfg_tx = { 77 - .mode = STEDMA40_MODE_LOGICAL, 78 - .dir = DMA_MEM_TO_DEV, 79 - .dev_type = DB8500_DMA_DEV32_SD_MM1, 80 - }; 81 - #endif 82 - 83 - struct mmci_platform_data mop500_sdi1_data = { 84 - .ocr_mask = MMC_VDD_29_30, 85 - .f_max = 100000000, 86 - .capabilities = MMC_CAP_4_BIT_DATA | 87 - MMC_CAP_NONREMOVABLE, 88 - .gpio_cd = -1, 89 - .gpio_wp = -1, 90 - #ifdef CONFIG_STE_DMA40 91 - .dma_filter = stedma40_filter, 92 - .dma_rx_param = &sdi1_dma_cfg_rx, 93 - .dma_tx_param = &sdi1_dma_cfg_tx, 94 - #endif 95 - }; 96 - 97 - /* 98 - * SDI 2 (POP eMMC, not on DB8500ed) 99 - */ 100 - 101 - #ifdef CONFIG_STE_DMA40 102 - struct stedma40_chan_cfg mop500_sdi2_dma_cfg_rx = { 103 - .mode = STEDMA40_MODE_LOGICAL, 104 - .dir = DMA_DEV_TO_MEM, 105 - .dev_type = DB8500_DMA_DEV28_SD_MM2, 106 - }; 107 - 108 - static struct stedma40_chan_cfg mop500_sdi2_dma_cfg_tx = { 109 - .mode = STEDMA40_MODE_LOGICAL, 110 - .dir = DMA_MEM_TO_DEV, 111 - .dev_type = DB8500_DMA_DEV28_SD_MM2, 112 - }; 113 - #endif 114 - 115 - struct mmci_platform_data mop500_sdi2_data = { 116 - .ocr_mask = MMC_VDD_165_195, 117 - .f_max = 100000000, 118 - .capabilities = MMC_CAP_4_BIT_DATA | 119 - MMC_CAP_8_BIT_DATA | 120 - MMC_CAP_NONREMOVABLE | 121 - MMC_CAP_MMC_HIGHSPEED | 122 - MMC_CAP_ERASE | 123 - MMC_CAP_CMD23, 124 - .gpio_cd = -1, 125 - .gpio_wp = -1, 126 - #ifdef CONFIG_STE_DMA40 127 - .dma_filter = stedma40_filter, 128 - .dma_rx_param = &mop500_sdi2_dma_cfg_rx, 129 - .dma_tx_param = &mop500_sdi2_dma_cfg_tx, 130 - #endif 131 - }; 132 - 133 - /* 134 - * SDI 4 (on-board eMMC) 135 - */ 136 - 137 - #ifdef CONFIG_STE_DMA40 138 - struct stedma40_chan_cfg mop500_sdi4_dma_cfg_rx = { 139 - .mode = STEDMA40_MODE_LOGICAL, 140 - .dir = DMA_DEV_TO_MEM, 141 - .dev_type = DB8500_DMA_DEV42_SD_MM4, 142 - }; 143 - 144 - static struct stedma40_chan_cfg mop500_sdi4_dma_cfg_tx = { 145 - .mode = STEDMA40_MODE_LOGICAL, 146 - .dir = DMA_MEM_TO_DEV, 147 - .dev_type = DB8500_DMA_DEV42_SD_MM4, 148 - }; 149 - #endif 150 - 151 - struct mmci_platform_data mop500_sdi4_data = { 152 - .f_max = 100000000, 153 - .capabilities = MMC_CAP_4_BIT_DATA | 154 - MMC_CAP_8_BIT_DATA | 155 - MMC_CAP_NONREMOVABLE | 156 - MMC_CAP_MMC_HIGHSPEED | 157 - MMC_CAP_ERASE | 158 - MMC_CAP_CMD23, 159 - .gpio_cd = -1, 160 - .gpio_wp = -1, 161 - #ifdef CONFIG_STE_DMA40 162 - .dma_filter = stedma40_filter, 163 - .dma_rx_param = &mop500_sdi4_dma_cfg_rx, 164 - .dma_tx_param = &mop500_sdi4_dma_cfg_tx, 165 - #endif 166 - };
-5
arch/arm/mach-ux500/board-mop500.h
··· 8 8 #define __BOARD_MOP500_H 9 9 10 10 #include <linux/platform_data/asoc-ux500-msp.h> 11 - #include <linux/amba/mmci.h> 12 11 13 - extern struct mmci_platform_data mop500_sdi0_data; 14 - extern struct mmci_platform_data mop500_sdi1_data; 15 - extern struct mmci_platform_data mop500_sdi2_data; 16 - extern struct mmci_platform_data mop500_sdi4_data; 17 12 extern struct msp_i2s_platform_data msp0_platform_data; 18 13 extern struct msp_i2s_platform_data msp1_platform_data; 19 14 extern struct msp_i2s_platform_data msp2_platform_data;
-4
arch/arm/mach-ux500/cpu-db8500.c
··· 146 146 /* Requires call-back bindings. */ 147 147 OF_DEV_AUXDATA("arm,cortex-a9-pmu", 0, "arm-pmu", &db8500_pmu_platdata), 148 148 /* Requires DMA bindings. */ 149 - OF_DEV_AUXDATA("arm,pl18x", 0x80126000, "sdi0", &mop500_sdi0_data), 150 - OF_DEV_AUXDATA("arm,pl18x", 0x80118000, "sdi1", &mop500_sdi1_data), 151 - OF_DEV_AUXDATA("arm,pl18x", 0x80005000, "sdi2", &mop500_sdi2_data), 152 - OF_DEV_AUXDATA("arm,pl18x", 0x80114000, "sdi4", &mop500_sdi4_data), 153 149 OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80123000, 154 150 "ux500-msp-i2s.0", &msp0_platform_data), 155 151 OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80124000,
+84 -242
drivers/mmc/host/mmci.c
··· 13 13 #include <linux/init.h> 14 14 #include <linux/ioport.h> 15 15 #include <linux/device.h> 16 + #include <linux/io.h> 16 17 #include <linux/interrupt.h> 17 18 #include <linux/kernel.h> 18 19 #include <linux/slab.h> ··· 24 23 #include <linux/mmc/pm.h> 25 24 #include <linux/mmc/host.h> 26 25 #include <linux/mmc/card.h> 26 + #include <linux/mmc/slot-gpio.h> 27 27 #include <linux/amba/bus.h> 28 28 #include <linux/clk.h> 29 29 #include <linux/scatterlist.h> ··· 366 364 #ifdef CONFIG_DMA_ENGINE 367 365 static void mmci_dma_setup(struct mmci_host *host) 368 366 { 369 - struct mmci_platform_data *plat = host->plat; 370 367 const char *rxname, *txname; 371 368 dma_cap_mask_t mask; 372 369 ··· 378 377 /* Try to acquire a generic DMA engine slave channel */ 379 378 dma_cap_zero(mask); 380 379 dma_cap_set(DMA_SLAVE, mask); 381 - 382 - if (plat && plat->dma_filter) { 383 - if (!host->dma_rx_channel && plat->dma_rx_param) { 384 - host->dma_rx_channel = dma_request_channel(mask, 385 - plat->dma_filter, 386 - plat->dma_rx_param); 387 - /* E.g if no DMA hardware is present */ 388 - if (!host->dma_rx_channel) 389 - dev_err(mmc_dev(host->mmc), "no RX DMA channel\n"); 390 - } 391 - 392 - if (!host->dma_tx_channel && plat->dma_tx_param) { 393 - host->dma_tx_channel = dma_request_channel(mask, 394 - plat->dma_filter, 395 - plat->dma_tx_param); 396 - if (!host->dma_tx_channel) 397 - dev_warn(mmc_dev(host->mmc), "no TX DMA channel\n"); 398 - } 399 - } 400 380 401 381 /* 402 382 * If only an RX channel is specified, the driver will ··· 426 444 */ 427 445 static inline void mmci_dma_release(struct mmci_host *host) 428 446 { 429 - struct mmci_platform_data *plat = host->plat; 430 - 431 447 if (host->dma_rx_channel) 432 448 dma_release_channel(host->dma_rx_channel); 433 - if (host->dma_tx_channel && plat->dma_tx_param) 449 + if (host->dma_tx_channel) 434 450 dma_release_channel(host->dma_tx_channel); 435 451 host->dma_rx_channel = host->dma_tx_channel = NULL; 436 452 } ··· 1265 1285 * indicating signal direction for the signals in 1266 1286 * the SD/MMC bus and feedback-clock usage. 1267 1287 */ 1268 - pwr |= host->plat->sigdir; 1288 + pwr |= host->pwr_reg_add; 1269 1289 1270 1290 if (ios->bus_width == MMC_BUS_WIDTH_4) 1271 1291 pwr &= ~MCI_ST_DATA74DIREN; ··· 1306 1326 pm_runtime_put_autosuspend(mmc_dev(mmc)); 1307 1327 } 1308 1328 1309 - static int mmci_get_ro(struct mmc_host *mmc) 1310 - { 1311 - struct mmci_host *host = mmc_priv(mmc); 1312 - 1313 - if (host->gpio_wp == -ENOSYS) 1314 - return -ENOSYS; 1315 - 1316 - return gpio_get_value_cansleep(host->gpio_wp); 1317 - } 1318 - 1319 1329 static int mmci_get_cd(struct mmc_host *mmc) 1320 1330 { 1321 1331 struct mmci_host *host = mmc_priv(mmc); 1322 1332 struct mmci_platform_data *plat = host->plat; 1323 - unsigned int status; 1333 + unsigned int status = mmc_gpio_get_cd(mmc); 1324 1334 1325 - if (host->gpio_cd == -ENOSYS) { 1335 + if (status == -ENOSYS) { 1326 1336 if (!plat->status) 1327 1337 return 1; /* Assume always present */ 1328 1338 1329 1339 status = plat->status(mmc_dev(host->mmc)); 1330 - } else 1331 - status = !!gpio_get_value_cansleep(host->gpio_cd) 1332 - ^ plat->cd_invert; 1333 - 1334 - /* 1335 - * Use positive logic throughout - status is zero for no card, 1336 - * non-zero for card inserted. 1337 - */ 1340 + } 1338 1341 return status; 1339 1342 } 1340 1343 ··· 1354 1391 return ret; 1355 1392 } 1356 1393 1357 - static irqreturn_t mmci_cd_irq(int irq, void *dev_id) 1358 - { 1359 - struct mmci_host *host = dev_id; 1360 - 1361 - mmc_detect_change(host->mmc, msecs_to_jiffies(500)); 1362 - 1363 - return IRQ_HANDLED; 1364 - } 1365 - 1366 1394 static struct mmc_host_ops mmci_ops = { 1367 1395 .request = mmci_request, 1368 1396 .pre_req = mmci_pre_request, 1369 1397 .post_req = mmci_post_request, 1370 1398 .set_ios = mmci_set_ios, 1371 - .get_ro = mmci_get_ro, 1399 + .get_ro = mmc_gpio_get_ro, 1372 1400 .get_cd = mmci_get_cd, 1373 1401 .start_signal_voltage_switch = mmci_sig_volt_switch, 1374 1402 }; 1375 1403 1376 - #ifdef CONFIG_OF 1377 - static void mmci_dt_populate_generic_pdata(struct device_node *np, 1378 - struct mmci_platform_data *pdata) 1404 + static int mmci_of_parse(struct device_node *np, struct mmc_host *mmc) 1379 1405 { 1380 - int bus_width = 0; 1406 + struct mmci_host *host = mmc_priv(mmc); 1407 + int ret = mmc_of_parse(mmc); 1381 1408 1382 - pdata->gpio_wp = of_get_named_gpio(np, "wp-gpios", 0); 1383 - pdata->gpio_cd = of_get_named_gpio(np, "cd-gpios", 0); 1409 + if (ret) 1410 + return ret; 1384 1411 1385 - if (of_get_property(np, "cd-inverted", NULL)) 1386 - pdata->cd_invert = true; 1387 - else 1388 - pdata->cd_invert = false; 1389 - 1390 - of_property_read_u32(np, "max-frequency", &pdata->f_max); 1391 - if (!pdata->f_max) 1392 - pr_warn("%s has no 'max-frequency' property\n", np->full_name); 1412 + if (of_get_property(np, "st,sig-dir-dat0", NULL)) 1413 + host->pwr_reg_add |= MCI_ST_DATA0DIREN; 1414 + if (of_get_property(np, "st,sig-dir-dat2", NULL)) 1415 + host->pwr_reg_add |= MCI_ST_DATA2DIREN; 1416 + if (of_get_property(np, "st,sig-dir-dat31", NULL)) 1417 + host->pwr_reg_add |= MCI_ST_DATA31DIREN; 1418 + if (of_get_property(np, "st,sig-dir-dat74", NULL)) 1419 + host->pwr_reg_add |= MCI_ST_DATA74DIREN; 1420 + if (of_get_property(np, "st,sig-dir-cmd", NULL)) 1421 + host->pwr_reg_add |= MCI_ST_CMDDIREN; 1422 + if (of_get_property(np, "st,sig-pin-fbclk", NULL)) 1423 + host->pwr_reg_add |= MCI_ST_FBCLKEN; 1393 1424 1394 1425 if (of_get_property(np, "mmc-cap-mmc-highspeed", NULL)) 1395 - pdata->capabilities |= MMC_CAP_MMC_HIGHSPEED; 1426 + mmc->caps |= MMC_CAP_MMC_HIGHSPEED; 1396 1427 if (of_get_property(np, "mmc-cap-sd-highspeed", NULL)) 1397 - pdata->capabilities |= MMC_CAP_SD_HIGHSPEED; 1428 + mmc->caps |= MMC_CAP_SD_HIGHSPEED; 1398 1429 1399 - of_property_read_u32(np, "bus-width", &bus_width); 1400 - switch (bus_width) { 1401 - case 0 : 1402 - /* No bus-width supplied. */ 1403 - break; 1404 - case 4 : 1405 - pdata->capabilities |= MMC_CAP_4_BIT_DATA; 1406 - break; 1407 - case 8 : 1408 - pdata->capabilities |= MMC_CAP_8_BIT_DATA; 1409 - break; 1410 - default : 1411 - pr_warn("%s: Unsupported bus width\n", np->full_name); 1412 - } 1430 + return 0; 1413 1431 } 1414 - #else 1415 - static void mmci_dt_populate_generic_pdata(struct device_node *np, 1416 - struct mmci_platform_data *pdata) 1417 - { 1418 - return; 1419 - } 1420 - #endif 1421 1432 1422 1433 static int mmci_probe(struct amba_device *dev, 1423 1434 const struct amba_id *id) ··· 1415 1478 return -ENOMEM; 1416 1479 } 1417 1480 1418 - if (np) 1419 - mmci_dt_populate_generic_pdata(np, plat); 1420 - 1421 - ret = amba_request_regions(dev, DRIVER_NAME); 1422 - if (ret) 1423 - goto out; 1424 - 1425 1481 mmc = mmc_alloc_host(sizeof(struct mmci_host), &dev->dev); 1426 - if (!mmc) { 1427 - ret = -ENOMEM; 1428 - goto rel_regions; 1429 - } 1482 + if (!mmc) 1483 + return -ENOMEM; 1484 + 1485 + ret = mmci_of_parse(np, mmc); 1486 + if (ret) 1487 + goto host_free; 1430 1488 1431 1489 host = mmc_priv(mmc); 1432 1490 host->mmc = mmc; 1433 - 1434 - host->gpio_wp = -ENOSYS; 1435 - host->gpio_cd = -ENOSYS; 1436 - host->gpio_cd_irq = -1; 1437 1491 1438 1492 host->hw_designer = amba_manf(dev); 1439 1493 host->hw_revision = amba_rev(dev); ··· 1457 1529 dev_dbg(mmc_dev(mmc), "eventual mclk rate: %u Hz\n", 1458 1530 host->mclk); 1459 1531 } 1532 + 1460 1533 host->phybase = dev->res.start; 1461 - host->base = ioremap(dev->res.start, resource_size(&dev->res)); 1462 - if (!host->base) { 1463 - ret = -ENOMEM; 1534 + host->base = devm_ioremap_resource(&dev->dev, &dev->res); 1535 + if (IS_ERR(host->base)) { 1536 + ret = PTR_ERR(host->base); 1464 1537 goto clk_disable; 1465 1538 } 1466 1539 ··· 1475 1546 else 1476 1547 mmc->f_min = DIV_ROUND_UP(host->mclk, 512); 1477 1548 /* 1478 - * If the platform data supplies a maximum operating 1479 - * frequency, this takes precedence. Else, we fall back 1480 - * to using the module parameter, which has a (low) 1481 - * default value in case it is not specified. Either 1482 - * value must not exceed the clock rate into the block, 1483 - * of course. 1549 + * If no maximum operating frequency is supplied, fall back to use 1550 + * the module parameter, which has a (low) default value in case it 1551 + * is not specified. Either value must not exceed the clock rate into 1552 + * the block, of course. 1484 1553 */ 1485 - if (plat->f_max) 1486 - mmc->f_max = min(host->mclk, plat->f_max); 1554 + if (mmc->f_max) 1555 + mmc->f_max = min(host->mclk, mmc->f_max); 1487 1556 else 1488 1557 mmc->f_max = min(host->mclk, fmax); 1489 1558 dev_dbg(mmc_dev(mmc), "clocking block at %u Hz\n", mmc->f_max); ··· 1493 1566 else if (plat->ocr_mask) 1494 1567 dev_warn(mmc_dev(mmc), "Platform OCR mask is ignored\n"); 1495 1568 1496 - mmc->caps = plat->capabilities; 1497 - mmc->caps2 = plat->capabilities2; 1569 + /* DT takes precedence over platform data. */ 1570 + if (!np) { 1571 + if (!plat->cd_invert) 1572 + mmc->caps2 |= MMC_CAP2_CD_ACTIVE_HIGH; 1573 + mmc->caps2 |= MMC_CAP2_RO_ACTIVE_HIGH; 1574 + } 1575 + 1576 + /* We support these capabilities. */ 1577 + mmc->caps |= MMC_CAP_CMD23; 1498 1578 1499 1579 if (variant->busy_detect) { 1500 1580 mmci_ops.card_busy = mmci_card_busy; ··· 1513 1579 mmc->ops = &mmci_ops; 1514 1580 1515 1581 /* We support these PM capabilities. */ 1516 - mmc->pm_caps = MMC_PM_KEEP_POWER; 1582 + mmc->pm_caps |= MMC_PM_KEEP_POWER; 1517 1583 1518 1584 /* 1519 1585 * We can do SGIO ··· 1550 1616 writel(0, host->base + MMCIMASK1); 1551 1617 writel(0xfff, host->base + MMCICLEAR); 1552 1618 1553 - if (plat->gpio_cd == -EPROBE_DEFER) { 1554 - ret = -EPROBE_DEFER; 1555 - goto err_gpio_cd; 1619 + /* If DT, cd/wp gpios must be supplied through it. */ 1620 + if (!np && gpio_is_valid(plat->gpio_cd)) { 1621 + ret = mmc_gpio_request_cd(mmc, plat->gpio_cd, 0); 1622 + if (ret) 1623 + goto clk_disable; 1556 1624 } 1557 - if (gpio_is_valid(plat->gpio_cd)) { 1558 - ret = gpio_request(plat->gpio_cd, DRIVER_NAME " (cd)"); 1559 - if (ret == 0) 1560 - ret = gpio_direction_input(plat->gpio_cd); 1561 - if (ret == 0) 1562 - host->gpio_cd = plat->gpio_cd; 1563 - else if (ret != -ENOSYS) 1564 - goto err_gpio_cd; 1565 - 1566 - /* 1567 - * A gpio pin that will detect cards when inserted and removed 1568 - * will most likely want to trigger on the edges if it is 1569 - * 0 when ejected and 1 when inserted (or mutatis mutandis 1570 - * for the inverted case) so we request triggers on both 1571 - * edges. 1572 - */ 1573 - ret = request_any_context_irq(gpio_to_irq(plat->gpio_cd), 1574 - mmci_cd_irq, 1575 - IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, 1576 - DRIVER_NAME " (cd)", host); 1577 - if (ret >= 0) 1578 - host->gpio_cd_irq = gpio_to_irq(plat->gpio_cd); 1579 - } 1580 - if (plat->gpio_wp == -EPROBE_DEFER) { 1581 - ret = -EPROBE_DEFER; 1582 - goto err_gpio_wp; 1583 - } 1584 - if (gpio_is_valid(plat->gpio_wp)) { 1585 - ret = gpio_request(plat->gpio_wp, DRIVER_NAME " (wp)"); 1586 - if (ret == 0) 1587 - ret = gpio_direction_input(plat->gpio_wp); 1588 - if (ret == 0) 1589 - host->gpio_wp = plat->gpio_wp; 1590 - else if (ret != -ENOSYS) 1591 - goto err_gpio_wp; 1625 + if (!np && gpio_is_valid(plat->gpio_wp)) { 1626 + ret = mmc_gpio_request_ro(mmc, plat->gpio_wp); 1627 + if (ret) 1628 + goto clk_disable; 1592 1629 } 1593 1630 1594 - if ((host->plat->status || host->gpio_cd != -ENOSYS) 1595 - && host->gpio_cd_irq < 0) 1596 - mmc->caps |= MMC_CAP_NEEDS_POLL; 1597 - 1598 - ret = request_irq(dev->irq[0], mmci_irq, IRQF_SHARED, DRIVER_NAME " (cmd)", host); 1631 + ret = devm_request_irq(&dev->dev, dev->irq[0], mmci_irq, IRQF_SHARED, 1632 + DRIVER_NAME " (cmd)", host); 1599 1633 if (ret) 1600 - goto unmap; 1634 + goto clk_disable; 1601 1635 1602 1636 if (!dev->irq[1]) 1603 1637 host->singleirq = true; 1604 1638 else { 1605 - ret = request_irq(dev->irq[1], mmci_pio_irq, IRQF_SHARED, 1606 - DRIVER_NAME " (pio)", host); 1639 + ret = devm_request_irq(&dev->dev, dev->irq[1], mmci_pio_irq, 1640 + IRQF_SHARED, DRIVER_NAME " (pio)", host); 1607 1641 if (ret) 1608 - goto irq0_free; 1642 + goto clk_disable; 1609 1643 } 1610 1644 1611 1645 writel(MCI_IRQENABLE, host->base + MMCIMASK0); ··· 1595 1693 1596 1694 return 0; 1597 1695 1598 - irq0_free: 1599 - free_irq(dev->irq[0], host); 1600 - unmap: 1601 - if (host->gpio_wp != -ENOSYS) 1602 - gpio_free(host->gpio_wp); 1603 - err_gpio_wp: 1604 - if (host->gpio_cd_irq >= 0) 1605 - free_irq(host->gpio_cd_irq, host); 1606 - if (host->gpio_cd != -ENOSYS) 1607 - gpio_free(host->gpio_cd); 1608 - err_gpio_cd: 1609 - iounmap(host->base); 1610 1696 clk_disable: 1611 1697 clk_disable_unprepare(host->clk); 1612 1698 host_free: 1613 1699 mmc_free_host(mmc); 1614 - rel_regions: 1615 - amba_release_regions(dev); 1616 - out: 1617 1700 return ret; 1618 1701 } 1619 1702 ··· 1624 1737 writel(0, host->base + MMCIDATACTRL); 1625 1738 1626 1739 mmci_dma_release(host); 1627 - free_irq(dev->irq[0], host); 1628 - if (!host->singleirq) 1629 - free_irq(dev->irq[1], host); 1630 - 1631 - if (host->gpio_wp != -ENOSYS) 1632 - gpio_free(host->gpio_wp); 1633 - if (host->gpio_cd_irq >= 0) 1634 - free_irq(host->gpio_cd_irq, host); 1635 - if (host->gpio_cd != -ENOSYS) 1636 - gpio_free(host->gpio_cd); 1637 - 1638 - iounmap(host->base); 1639 1740 clk_disable_unprepare(host->clk); 1640 - 1641 1741 mmc_free_host(mmc); 1642 - 1643 - amba_release_regions(dev); 1644 1742 } 1645 1743 1646 1744 return 0; 1647 1745 } 1648 1746 1649 - #ifdef CONFIG_SUSPEND 1650 - static int mmci_suspend(struct device *dev) 1651 - { 1652 - struct amba_device *adev = to_amba_device(dev); 1653 - struct mmc_host *mmc = amba_get_drvdata(adev); 1654 - 1655 - if (mmc) { 1656 - struct mmci_host *host = mmc_priv(mmc); 1657 - pm_runtime_get_sync(dev); 1658 - writel(0, host->base + MMCIMASK0); 1659 - } 1660 - 1661 - return 0; 1662 - } 1663 - 1664 - static int mmci_resume(struct device *dev) 1665 - { 1666 - struct amba_device *adev = to_amba_device(dev); 1667 - struct mmc_host *mmc = amba_get_drvdata(adev); 1668 - 1669 - if (mmc) { 1670 - struct mmci_host *host = mmc_priv(mmc); 1671 - writel(MCI_IRQENABLE, host->base + MMCIMASK0); 1672 - pm_runtime_put(dev); 1673 - } 1674 - 1675 - return 0; 1676 - } 1677 - #endif 1678 - 1679 - #ifdef CONFIG_PM_RUNTIME 1747 + #ifdef CONFIG_PM 1680 1748 static void mmci_save(struct mmci_host *host) 1681 1749 { 1682 1750 unsigned long flags; 1683 1751 1684 - if (host->variant->pwrreg_nopower) { 1685 - spin_lock_irqsave(&host->lock, flags); 1752 + spin_lock_irqsave(&host->lock, flags); 1686 1753 1687 - writel(0, host->base + MMCIMASK0); 1754 + writel(0, host->base + MMCIMASK0); 1755 + if (host->variant->pwrreg_nopower) { 1688 1756 writel(0, host->base + MMCIDATACTRL); 1689 1757 writel(0, host->base + MMCIPOWER); 1690 1758 writel(0, host->base + MMCICLOCK); 1691 - mmci_reg_delay(host); 1692 - 1693 - spin_unlock_irqrestore(&host->lock, flags); 1694 1759 } 1760 + mmci_reg_delay(host); 1695 1761 1762 + spin_unlock_irqrestore(&host->lock, flags); 1696 1763 } 1697 1764 1698 1765 static void mmci_restore(struct mmci_host *host) 1699 1766 { 1700 1767 unsigned long flags; 1701 1768 1702 - if (host->variant->pwrreg_nopower) { 1703 - spin_lock_irqsave(&host->lock, flags); 1769 + spin_lock_irqsave(&host->lock, flags); 1704 1770 1771 + if (host->variant->pwrreg_nopower) { 1705 1772 writel(host->clk_reg, host->base + MMCICLOCK); 1706 1773 writel(host->datactrl_reg, host->base + MMCIDATACTRL); 1707 1774 writel(host->pwr_reg, host->base + MMCIPOWER); 1708 - writel(MCI_IRQENABLE, host->base + MMCIMASK0); 1709 - mmci_reg_delay(host); 1710 - 1711 - spin_unlock_irqrestore(&host->lock, flags); 1712 1775 } 1776 + writel(MCI_IRQENABLE, host->base + MMCIMASK0); 1777 + mmci_reg_delay(host); 1778 + 1779 + spin_unlock_irqrestore(&host->lock, flags); 1713 1780 } 1714 1781 1715 1782 static int mmci_runtime_suspend(struct device *dev) ··· 1698 1857 #endif 1699 1858 1700 1859 static const struct dev_pm_ops mmci_dev_pm_ops = { 1701 - SET_SYSTEM_SLEEP_PM_OPS(mmci_suspend, mmci_resume) 1702 - SET_RUNTIME_PM_OPS(mmci_runtime_suspend, mmci_runtime_resume, NULL) 1860 + SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, 1861 + pm_runtime_force_resume) 1862 + SET_PM_RUNTIME_PM_OPS(mmci_runtime_suspend, mmci_runtime_resume, NULL) 1703 1863 }; 1704 1864 1705 1865 static struct amba_id mmci_ids[] = {
+11 -3
drivers/mmc/host/mmci.h
··· 13 13 #define MCI_PWR_ON 0x03 14 14 #define MCI_OD (1 << 6) 15 15 #define MCI_ROD (1 << 7) 16 + /* 17 + * The ST Micro version does not have ROD and reuse the voltage registers for 18 + * direction settings. 19 + */ 20 + #define MCI_ST_DATA2DIREN (1 << 2) 21 + #define MCI_ST_CMDDIREN (1 << 3) 22 + #define MCI_ST_DATA0DIREN (1 << 4) 23 + #define MCI_ST_DATA31DIREN (1 << 5) 24 + #define MCI_ST_FBCLKEN (1 << 7) 25 + #define MCI_ST_DATA74DIREN (1 << 8) 16 26 17 27 #define MMCICLOCK 0x004 18 28 #define MCI_CLK_ENABLE (1 << 8) ··· 186 176 struct mmc_data *data; 187 177 struct mmc_host *mmc; 188 178 struct clk *clk; 189 - int gpio_cd; 190 - int gpio_wp; 191 - int gpio_cd_irq; 192 179 bool singleirq; 193 180 194 181 spinlock_t lock; ··· 193 186 unsigned int mclk; 194 187 unsigned int cclk; 195 188 u32 pwr_reg; 189 + u32 pwr_reg_add; 196 190 u32 clk_reg; 197 191 u32 datactrl_reg; 198 192 u32 busy_status;
-42
include/linux/amba/mmci.h
··· 6 6 7 7 #include <linux/mmc/host.h> 8 8 9 - 10 - /* 11 - * These defines is places here due to access is needed from machine 12 - * configuration files. The ST Micro version does not have ROD and 13 - * reuse the voltage registers for direction settings. 14 - */ 15 - #define MCI_ST_DATA2DIREN (1 << 2) 16 - #define MCI_ST_CMDDIREN (1 << 3) 17 - #define MCI_ST_DATA0DIREN (1 << 4) 18 - #define MCI_ST_DATA31DIREN (1 << 5) 19 - #define MCI_ST_FBCLKEN (1 << 7) 20 - #define MCI_ST_DATA74DIREN (1 << 8) 21 - 22 - /* Just some dummy forwarding */ 23 - struct dma_chan; 24 - 25 9 /** 26 10 * struct mmci_platform_data - platform configuration for the MMCI 27 11 * (also known as PL180) block. 28 - * @f_max: the maximum operational frequency for this host in this 29 - * platform configuration. When this is specified it takes precedence 30 - * over the module parameter for the same frequency. 31 12 * @ocr_mask: available voltages on the 4 pins from the block, this 32 13 * is ignored if a regulator is used, see the MMC_VDD_* masks in 33 14 * mmc/host.h ··· 23 42 * @gpio_wp: read this GPIO pin to see if the card is write protected 24 43 * @gpio_cd: read this GPIO pin to detect card insertion 25 44 * @cd_invert: true if the gpio_cd pin value is active low 26 - * @capabilities: the capabilities of the block as implemented in 27 - * this platform, signify anything MMC_CAP_* from mmc/host.h 28 - * @capabilities2: more capabilities, MMC_CAP2_* from mmc/host.h 29 - * @sigdir: a bit field indicating for what bits in the MMC bus the host 30 - * should enable signal direction indication. 31 - * @dma_filter: function used to select an appropriate RX and TX 32 - * DMA channel to be used for DMA, if and only if you're deploying the 33 - * generic DMA engine 34 - * @dma_rx_param: parameter passed to the DMA allocation 35 - * filter in order to select an appropriate RX channel. If 36 - * there is a bidirectional RX+TX channel, then just specify 37 - * this and leave dma_tx_param set to NULL 38 - * @dma_tx_param: parameter passed to the DMA allocation 39 - * filter in order to select an appropriate TX channel. If this 40 - * is NULL the driver will attempt to use the RX channel as a 41 - * bidirectional channel 42 45 */ 43 46 struct mmci_platform_data { 44 - unsigned int f_max; 45 47 unsigned int ocr_mask; 46 48 int (*ios_handler)(struct device *, struct mmc_ios *); 47 49 unsigned int (*status)(struct device *); 48 50 int gpio_wp; 49 51 int gpio_cd; 50 52 bool cd_invert; 51 - unsigned long capabilities; 52 - unsigned long capabilities2; 53 - u32 sigdir; 54 - bool (*dma_filter)(struct dma_chan *chan, void *filter_param); 55 - void *dma_rx_param; 56 - void *dma_tx_param; 57 53 }; 58 54 59 55 #endif