PM / devfreq: tegra30: Disable clock on error in probe

This error path needs to call clk_disable_unprepare().

Fixes: 7296443b900e ("PM / devfreq: tegra30: Handle possible round-rate error")
Signed-off-by: Dan Carpenter <[e-mail]>
Reviewed-by: Dmitry Osipenko <[e-mail]>
Signed-off-by: Dan Carpenter <[e-mail]>
Signed-off-by: Chanwoo Choi <[e-mail]>

drivers/devfreq/tegra30-devfreq.c

···
 	rate = clk_round_rate(tegra->emc_clock, ULONG_MAX);
 	if (rate < 0) {
 		dev_err(&pdev->dev, "Failed to round clock rate: %ld\n", rate);
-		return rate;
+		err = rate;
+		goto disable_clk;
 	}
 
 	tegra->max_freq = rate / KHZ;
···
 	dev_pm_opp_remove_all_dynamic(&pdev->dev);
 
 	reset_control_reset(tegra->reset);
+disable_clk:
 	clk_disable_unprepare(tegra->clock);
 
 	return err;