Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

tools: add smp_* barrier variants to include infrastructure

Add the definition for smp_rmb(), smp_wmb(), and smp_mb() to the
tools include infrastructure: this patch adds the implementation
for x86-64 and arm64, and have it fall back as currently is for
other archs which do not have it implemented at this point. The
x86-64 one uses lock + add combination for smp_mb() with address
below red zone.

This is on top of 09d62154f613 ("tools, perf: add and use optimized
ring_buffer_{read_head, write_tail} helpers"), which didn't touch
smp_* barrier implementations. Magnus recently rightfully reported
however that the latter on x86-64 still wrongly falls back to sfence,
lfence and mfence respectively, thus fix that for applications under
tools making use of these to avoid such ugly surprises. The main
header under tools (include/asm/barrier.h) will in that case not
select the fallback implementation.

Reported-by: Magnus Karlsson <magnus.karlsson@intel.com>
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Signed-off-by: Alexei Starovoitov <ast@kernel.org>

authored by

Daniel Borkmann and committed by
Alexei Starovoitov
6b7a2114 94c59aab

+15 -2
+10
tools/arch/arm64/include/asm/barrier.h
··· 14 14 #define wmb() asm volatile("dmb ishst" ::: "memory") 15 15 #define rmb() asm volatile("dmb ishld" ::: "memory") 16 16 17 + /* 18 + * Kernel uses dmb variants on arm64 for smp_*() barriers. Pretty much the same 19 + * implementation as above mb()/wmb()/rmb(), though for the latter kernel uses 20 + * dsb. In any case, should above mb()/wmb()/rmb() change, make sure the below 21 + * smp_*() don't. 22 + */ 23 + #define smp_mb() asm volatile("dmb ish" ::: "memory") 24 + #define smp_wmb() asm volatile("dmb ishst" ::: "memory") 25 + #define smp_rmb() asm volatile("dmb ishld" ::: "memory") 26 + 17 27 #define smp_store_release(p, v) \ 18 28 do { \ 19 29 union { typeof(*p) __val; char __c[1]; } __u = \
+5 -2
tools/arch/x86/include/asm/barrier.h
··· 21 21 #define rmb() asm volatile("lock; addl $0,0(%%esp)" ::: "memory") 22 22 #define wmb() asm volatile("lock; addl $0,0(%%esp)" ::: "memory") 23 23 #elif defined(__x86_64__) 24 - #define mb() asm volatile("mfence":::"memory") 25 - #define rmb() asm volatile("lfence":::"memory") 24 + #define mb() asm volatile("mfence" ::: "memory") 25 + #define rmb() asm volatile("lfence" ::: "memory") 26 26 #define wmb() asm volatile("sfence" ::: "memory") 27 + #define smp_rmb() barrier() 28 + #define smp_wmb() barrier() 29 + #define smp_mb() asm volatile("lock; addl $0,-132(%%rsp)" ::: "memory", "cc") 27 30 #endif 28 31 29 32 #if defined(__x86_64__)