Merge tag 'docs-arm64-move' of git://git.lwn.net/linux

tjh.dev / kernel

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Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git

kernel os linux

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Merge tag 'docs-arm64-move' of git://git.lwn.net/linux

Pull arm64 documentation move from Jonathan Corbet:
"Move the arm64 architecture documentation under Documentation/arch/.

This brings some order to the documentation directory, declutters the
top-level directory, and makes the documentation organization more
closely match that of the source"

* tag 'docs-arm64-move' of git://git.lwn.net/linux:
perf arm-spe: Fix a dangling Documentation/arm64 reference
mm: Fix a dangling Documentation/arm64 reference
arm64: Fix dangling references to Documentation/arm64
dt-bindings: fix dangling Documentation/arm64 reference
docs: arm64: Move arm64 documentation under Documentation/arch/

Linus Torvalds 2 years ago 6aeadf78 582c161c

+128 -127

59 changed files

expand all collapse all

Documentation

ABI

testing

sysfs-devices-system-cpu

admin-guide

kernel-parameters.txt

sysctl

kernel.rst

arch

arm64

acpi_object_usage.rst

amu.rst

arm-acpi.rst

asymmetric-32bit.rst

booting.rst

cpu-feature-registers.rst

elf_hwcaps.rst

features.rst

hugetlbpage.rst

index.rst

kasan-offsets.sh

kdump.rst

legacy_instructions.rst

memory-tagging-extension.rst

memory.rst

perf.rst

pointer-authentication.rst

ptdump.rst

silicon-errata.rst

sme.rst

sve.rst

tagged-address-abi.rst

tagged-pointers.rst

index.rst

devicetree

bindings

cpu

idle-states.yaml

translations

zh_CN

arch

arm64

amu.rst

booting.txt

elf_hwcaps.rst

hugetlbpage.rst

index.rst

legacy_instructions.txt

memory.txt

perf.rst

silicon-errata.txt

tagged-pointers.txt

index.rst

zh_TW

arch

arm64

amu.rst

booting.txt

elf_hwcaps.rst

hugetlbpage.rst

index.rst

legacy_instructions.txt

memory.txt

perf.rst

silicon-errata.txt

tagged-pointers.txt

index.rst

virt

kvm

api.rst

MAINTAINERS

arch

arm64

Kconfig

include

asm

efi.h

image.h

uapi

asm

sigcontext.h

kernel

kexec_image.c

mremap.c

tools

perf

util

arm-spe-decoder

arm-spe-decoder.c

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Documentation/ABI/testing/sysfs-devices-system-cpu

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··· 670 670 "async" Prefer asynchronous mode 671 671 ================ ============================================== 672 672 673 673 - See also: Documentation/arm64/memory-tagging-extension.rst 673 673 + See also: Documentation/arch/arm64/memory-tagging-extension.rst 674 674 675 675 What: /sys/devices/system/cpu/nohz_full 676 676 Date: Apr 2015

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Documentation/admin-guide/kernel-parameters.txt

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··· 304 304 EL0 is indicated by /sys/devices/system/cpu/aarch32_el0 305 305 and hot-unplug operations may be restricted. 306 306 307 307 - See Documentation/arm64/asymmetric-32bit.rst for more 307 307 + See Documentation/arch/arm64/asymmetric-32bit.rst for more 308 308 information. 309 309 310 310 amd_iommu= [HW,X86-64]

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Documentation/admin-guide/sysctl/kernel.rst

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··· 949 949 950 950 The default value is 0 (access disabled). 951 951 952 952 - See Documentation/arm64/perf.rst for more information. 952 952 + See Documentation/arch/arm64/perf.rst for more information. 953 953 954 954 955 955 pid_max

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Documentation/arch/index.rst

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··· 11 11 12 12 arc/index 13 13 arm/index 14 14 - ../arm64/index 14 14 + arm64/index 15 15 ia64/index 16 16 ../loongarch/index 17 17 m68k/index

Documentation/arm64/acpi_object_usage.rst Documentation/arch/arm64/acpi_object_usage.rst

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Documentation/arm64/amu.rst Documentation/arch/arm64/amu.rst

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Documentation/arm64/arm-acpi.rst Documentation/arch/arm64/arm-acpi.rst

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··· 540 540 ACPI Objects 541 541 ------------ 542 542 Detailed expectations for ACPI tables and object are listed in the file 543 543 - Documentation/arm64/acpi_object_usage.rst. 543 543 + Documentation/arch/arm64/acpi_object_usage.rst. 544 544 545 545 546 546 References

Documentation/arm64/asymmetric-32bit.rst Documentation/arch/arm64/asymmetric-32bit.rst

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Documentation/arm64/booting.rst Documentation/arch/arm64/booting.rst

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Documentation/arm64/cpu-feature-registers.rst Documentation/arch/arm64/cpu-feature-registers.rst

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Documentation/arm64/elf_hwcaps.rst Documentation/arch/arm64/elf_hwcaps.rst

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··· 102 102 103 103 HWCAP_CPUID 104 104 EL0 access to certain ID registers is available, to the extent 105 105 - described by Documentation/arm64/cpu-feature-registers.rst. 105 105 + described by Documentation/arch/arm64/cpu-feature-registers.rst. 106 106 107 107 These ID registers may imply the availability of features. 108 108 ··· 163 163 HWCAP_PACA 164 164 Functionality implied by ID_AA64ISAR1_EL1.APA == 0b0001 or 165 165 ID_AA64ISAR1_EL1.API == 0b0001, as described by 166 166 - Documentation/arm64/pointer-authentication.rst. 166 166 + Documentation/arch/arm64/pointer-authentication.rst. 167 167 168 168 HWCAP_PACG 169 169 Functionality implied by ID_AA64ISAR1_EL1.GPA == 0b0001 or 170 170 ID_AA64ISAR1_EL1.GPI == 0b0001, as described by 171 171 - Documentation/arm64/pointer-authentication.rst. 171 171 + Documentation/arch/arm64/pointer-authentication.rst. 172 172 173 173 HWCAP2_DCPODP 174 174 Functionality implied by ID_AA64ISAR1_EL1.DPB == 0b0010. ··· 226 226 227 227 HWCAP2_MTE 228 228 Functionality implied by ID_AA64PFR1_EL1.MTE == 0b0010, as described 229 229 - by Documentation/arm64/memory-tagging-extension.rst. 229 229 + by Documentation/arch/arm64/memory-tagging-extension.rst. 230 230 231 231 HWCAP2_ECV 232 232 Functionality implied by ID_AA64MMFR0_EL1.ECV == 0b0001. ··· 239 239 240 240 HWCAP2_MTE3 241 241 Functionality implied by ID_AA64PFR1_EL1.MTE == 0b0011, as described 242 242 - by Documentation/arm64/memory-tagging-extension.rst. 242 242 + by Documentation/arch/arm64/memory-tagging-extension.rst. 243 243 244 244 HWCAP2_SME 245 245 Functionality implied by ID_AA64PFR1_EL1.SME == 0b0001, as described 246 246 - by Documentation/arm64/sme.rst. 246 246 + by Documentation/arch/arm64/sme.rst. 247 247 248 248 HWCAP2_SME_I16I64 249 249 Functionality implied by ID_AA64SMFR0_EL1.I16I64 == 0b1111.

Documentation/arm64/features.rst Documentation/arch/arm64/features.rst

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Documentation/arm64/hugetlbpage.rst Documentation/arch/arm64/hugetlbpage.rst

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Documentation/arm64/index.rst Documentation/arch/arm64/index.rst

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Documentation/arm64/kasan-offsets.sh Documentation/arch/arm64/kasan-offsets.sh

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Documentation/arm64/kdump.rst Documentation/arch/arm64/kdump.rst

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Documentation/arm64/legacy_instructions.rst Documentation/arch/arm64/legacy_instructions.rst

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Documentation/arm64/memory-tagging-extension.rst Documentation/arch/arm64/memory-tagging-extension.rst

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··· 221 221 ``NT_ARM_TAGGED_ADDR_CTRL`` allow ``ptrace()`` access to the tagged 222 222 address ABI control and MTE configuration of a process as per the 223 223 ``prctl()`` options described in 224 224 - Documentation/arm64/tagged-address-abi.rst and above. The corresponding 224 224 + Documentation/arch/arm64/tagged-address-abi.rst and above. The corresponding 225 225 ``regset`` is 1 element of 8 bytes (``sizeof(long))``). 226 226 227 227 Core dump support

Documentation/arm64/memory.rst Documentation/arch/arm64/memory.rst

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Documentation/arm64/perf.rst Documentation/arch/arm64/perf.rst

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Documentation/arm64/pointer-authentication.rst Documentation/arch/arm64/pointer-authentication.rst

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Documentation/arm64/ptdump.rst Documentation/arch/arm64/ptdump.rst

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Documentation/arm64/silicon-errata.rst Documentation/arch/arm64/silicon-errata.rst

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Documentation/arm64/sme.rst Documentation/arch/arm64/sme.rst

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··· 465 465 [2] arch/arm64/include/uapi/asm/ptrace.h 466 466 AArch64 Linux ptrace ABI definitions 467 467 468 468 - [3] Documentation/arm64/cpu-feature-registers.rst 468 468 + [3] Documentation/arch/arm64/cpu-feature-registers.rst

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Documentation/arm64/sve.rst Documentation/arch/arm64/sve.rst

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··· 606 606 [2] arch/arm64/include/uapi/asm/ptrace.h 607 607 AArch64 Linux ptrace ABI definitions 608 608 609 609 - [3] Documentation/arm64/cpu-feature-registers.rst 609 609 + [3] Documentation/arch/arm64/cpu-feature-registers.rst 610 610 611 611 [4] ARM IHI0055C 612 612 http://infocenter.arm.com/help/topic/com.arm.doc.ihi0055c/IHI0055C_beta_aapcs64.pdf

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Documentation/arm64/tagged-address-abi.rst Documentation/arch/arm64/tagged-address-abi.rst

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··· 107 107 108 108 109 109 A definition of the meaning of tagged pointers on AArch64 can be found 110 110 - in Documentation/arm64/tagged-pointers.rst. 110 110 + in Documentation/arch/arm64/tagged-pointers.rst. 111 111 112 112 3. AArch64 Tagged Address ABI Exceptions 113 113 -----------------------------------------

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Documentation/arm64/tagged-pointers.rst Documentation/arch/arm64/tagged-pointers.rst

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··· 22 22 All interpretation of userspace memory addresses by the kernel assumes 23 23 an address tag of 0x00, unless the application enables the AArch64 24 24 Tagged Address ABI explicitly 25 25 - (Documentation/arm64/tagged-address-abi.rst). 25 25 + (Documentation/arch/arm64/tagged-address-abi.rst). 26 26 27 27 This includes, but is not limited to, addresses found in: 28 28

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Documentation/devicetree/bindings/cpu/idle-states.yaml

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··· 259 259 http://infocenter.arm.com/help/index.jsp 260 260 261 261 [5] ARM Linux Kernel documentation - Booting AArch64 Linux 262 262 - Documentation/arm64/booting.rst 262 262 + Documentation/arch/arm64/booting.rst 263 263 264 264 [6] RISC-V Linux Kernel documentation - CPUs bindings 265 265 Documentation/devicetree/bindings/riscv/cpus.yaml

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Documentation/translations/zh_CN/arch/index.rst

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··· 9 9 :maxdepth: 2 10 10 11 11 ../mips/index 12 12 - ../arm64/index 12 12 + arm64/index 13 13 ../riscv/index 14 14 openrisc/index 15 15 parisc/index

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Documentation/translations/zh_CN/arm64/amu.rst Documentation/translations/zh_CN/arch/arm64/amu.rst

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··· 1 1 - .. include:: ../disclaimer-zh_CN.rst 1 1 + .. include:: ../../disclaimer-zh_CN.rst 2 2 3 3 - :Original: :ref:`Documentation/arm64/amu.rst <amu_index>` 3 3 + :Original: :ref:`Documentation/arch/arm64/amu.rst <amu_index>` 4 4 5 5 Translator: Bailu Lin <bailu.lin@vivo.com> 6 6

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Documentation/translations/zh_CN/arm64/booting.txt Documentation/translations/zh_CN/arch/arm64/booting.txt

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··· 1 1 - Chinese translated version of Documentation/arm64/booting.rst 1 1 + Chinese translated version of Documentation/arch/arm64/booting.rst 2 2 3 3 If you have any comment or update to the content, please contact the 4 4 original document maintainer directly. However, if you have a problem ··· 10 10 zh_CN: Fu Wei <wefu@redhat.com> 11 11 C: 55f058e7574c3615dea4615573a19bdb258696c6 12 12 --------------------------------------------------------------------- 13 13 - Documentation/arm64/booting.rst 的中文翻译 13 13 + Documentation/arch/arm64/booting.rst 的中文翻译 14 14 15 15 如果想评论或更新本文的内容，请直接联系原文档的维护者。如果你使用英文 16 16 交流有困难的话，也可以向中文版维护者求助。如果本翻译更新不及时或者翻

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Documentation/translations/zh_CN/arm64/elf_hwcaps.rst Documentation/translations/zh_TW/arch/arm64/elf_hwcaps.rst

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··· 1 1 - .. include:: ../disclaimer-zh_CN.rst 1 1 + .. SPDX-License-Identifier: GPL-2.0 2 2 3 3 - :Original: :ref:`Documentation/arm64/elf_hwcaps.rst <elf_hwcaps_index>` 3 3 + .. include:: ../../disclaimer-zh_TW.rst 4 4 + 5 5 + :Original: :ref:`Documentation/arch/arm64/elf_hwcaps.rst <elf_hwcaps_index>` 4 6 5 7 Translator: Bailu Lin <bailu.lin@vivo.com> 8 8 + Hu Haowen <src.res@email.cn> 6 9 7 10 ================ 8 11 ARM64 ELF hwcaps 9 12 ================ 10 13 11 11 - 这篇文档描述了 arm64 ELF hwcaps 的用法和语义。 14 14 + 這篇文檔描述了 arm64 ELF hwcaps 的用法和語義。 12 15 13 16 14 14 - 1. 简介 17 17 + 1. 簡介 15 18 ------- 16 19 17 17 - 有些硬件或软件功能仅在某些 CPU 实现上和/或在具体某个内核配置上可用，但 18 18 - 对于处于 EL0 的用户空间代码没有可用的架构发现机制。内核通过在辅助向量表 19 19 - 公开一组称为 hwcaps 的标志而把这些功能暴露给用户空间。 20 20 + 有些硬體或軟體功能僅在某些 CPU 實現上和/或在具體某個內核配置上可用，但 21 21 + 對於處於 EL0 的用戶空間代碼沒有可用的架構發現機制。內核通過在輔助向量表 22 22 + 公開一組稱爲 hwcaps 的標誌而把這些功能暴露給用戶空間。 20 23 21 21 - 用户空间软件可以通过获取辅助向量的 AT_HWCAP 或 AT_HWCAP2 条目来测试功能， 22 22 - 并测试是否设置了相关标志，例如:: 24 24 + 用戶空間軟體可以通過獲取輔助向量的 AT_HWCAP 或 AT_HWCAP2 條目來測試功能， 25 25 + 並測試是否設置了相關標誌，例如:: 23 26 24 27 bool floating_point_is_present(void) 25 28 { ··· 33 30 return false; 34 31 } 35 32 36 36 - 如果软件依赖于 hwcap 描述的功能，在尝试使用该功能前则应检查相关的 hwcap 37 37 - 标志以验证该功能是否存在。 33 33 + 如果軟體依賴於 hwcap 描述的功能，在嘗試使用該功能前則應檢查相關的 hwcap 34 34 + 標誌以驗證該功能是否存在。 38 35 39 39 - 不能通过其他方式探查这些功能。当一个功能不可用时，尝试使用它可能导致不可 40 40 - 预测的行为，并且无法保证能确切的知道该功能不可用，例如 SIGILL。 36 36 + 不能通過其他方式探查這些功能。當一個功能不可用時，嘗試使用它可能導致不可 37 37 + 預測的行爲，並且無法保證能確切的知道該功能不可用，例如 SIGILL。 41 38 42 39 43 43 - 2. Hwcaps 的说明 40 40 + 2. Hwcaps 的說明 44 41 ---------------- 45 42 46 46 - 大多数 hwcaps 旨在说明通过架构 ID 寄存器(处于 EL0 的用户空间代码无法访问) 47 47 - 描述的功能的存在。这些 hwcap 通过 ID 寄存器字段定义，并且应根据 ARM 体系 48 48 - 结构参考手册（ARM ARM）中定义的字段来解释说明。 43 43 + 大多數 hwcaps 旨在說明通過架構 ID 寄存器(處於 EL0 的用戶空間代碼無法訪問) 44 44 + 描述的功能的存在。這些 hwcap 通過 ID 寄存器欄位定義，並且應根據 ARM 體系 45 45 + 結構參考手冊（ARM ARM）中定義的欄位來解釋說明。 49 46 50 50 - 这些 hwcaps 以下面的形式描述:: 47 47 + 這些 hwcaps 以下面的形式描述:: 51 48 52 52 - idreg.field == val 表示有某个功能。 49 49 + idreg.field == val 表示有某個功能。 53 50 54 54 - 当 idreg.field 中有 val 时，hwcaps 表示 ARM ARM 定义的功能是有效的，但是 55 55 - 并不是说要完全和 val 相等，也不是说 idreg.field 描述的其他功能就是缺失的。 51 51 + 當 idreg.field 中有 val 時，hwcaps 表示 ARM ARM 定義的功能是有效的，但是 52 52 + 並不是說要完全和 val 相等，也不是說 idreg.field 描述的其他功能就是缺失的。 56 53 57 57 - 其他 hwcaps 可能表明无法仅由 ID 寄存器描述的功能的存在。这些 hwcaps 可能 58 58 - 没有被 ID 寄存器描述，需要参考其他文档。 54 54 + 其他 hwcaps 可能表明無法僅由 ID 寄存器描述的功能的存在。這些 hwcaps 可能 55 55 + 沒有被 ID 寄存器描述，需要參考其他文檔。 59 56 60 57 61 58 3. AT_HWCAP 中揭示的 hwcaps ··· 68 65 ID_AA64PFR0_EL1.AdvSIMD == 0b0000 表示有此功能。 69 66 70 67 HWCAP_EVTSTRM 71 71 - 通用计时器频率配置为大约100KHz以生成事件。 68 68 + 通用計時器頻率配置爲大約100KHz以生成事件。 72 69 73 70 HWCAP_AES 74 71 ID_AA64ISAR0_EL1.AES == 0b0001 表示有此功能。 ··· 95 92 ID_AA64PFR0_EL1.AdvSIMD == 0b0001 表示有此功能。 96 93 97 94 HWCAP_CPUID 98 98 - 根据 Documentation/arm64/cpu-feature-registers.rst 描述，EL0 可以访问 95 95 + 根據 Documentation/arch/arm64/cpu-feature-registers.rst 描述，EL0 可以訪問 99 96 某些 ID 寄存器。 100 97 101 101 - 这些 ID 寄存器可能表示功能的可用性。 98 98 + 這些 ID 寄存器可能表示功能的可用性。 102 99 103 100 HWCAP_ASIMDRDM 104 101 ID_AA64ISAR0_EL1.RDM == 0b0001 表示有此功能。 ··· 155 152 ID_AA64ISAR1_EL1.SB == 0b0001 表示有此功能。 156 153 157 154 HWCAP_PACA 158 158 - 如 Documentation/arm64/pointer-authentication.rst 所描述， 155 155 + 如 Documentation/arch/arm64/pointer-authentication.rst 所描述， 159 156 ID_AA64ISAR1_EL1.APA == 0b0001 或 ID_AA64ISAR1_EL1.API == 0b0001 160 157 表示有此功能。 161 158 162 159 HWCAP_PACG 163 163 - 如 Documentation/arm64/pointer-authentication.rst 所描述， 160 160 + 如 Documentation/arch/arm64/pointer-authentication.rst 所描述， 164 161 ID_AA64ISAR1_EL1.GPA == 0b0001 或 ID_AA64ISAR1_EL1.GPI == 0b0001 165 162 表示有此功能。 166 163 ··· 240 237 4. 未使用的 AT_HWCAP 位 241 238 ----------------------- 242 239 243 243 - 为了与用户空间交互，内核保证 AT_HWCAP 的第62、63位将始终返回0。 240 240 + 爲了與用戶空間交互，內核保證 AT_HWCAP 的第62、63位將始終返回0。 241 241 +

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Documentation/translations/zh_CN/arm64/hugetlbpage.rst Documentation/translations/zh_CN/arch/arm64/hugetlbpage.rst

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··· 1 1 - .. include:: ../disclaimer-zh_CN.rst 1 1 + .. include:: ../../disclaimer-zh_CN.rst 2 2 3 3 - :Original: :ref:`Documentation/arm64/hugetlbpage.rst <hugetlbpage_index>` 3 3 + :Original: :ref:`Documentation/arch/arm64/hugetlbpage.rst <hugetlbpage_index>` 4 4 5 5 Translator: Bailu Lin <bailu.lin@vivo.com> 6 6

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Documentation/translations/zh_CN/arm64/index.rst Documentation/translations/zh_CN/arch/arm64/index.rst

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··· 1 1 - .. include:: ../disclaimer-zh_CN.rst 1 1 + .. include:: ../../disclaimer-zh_CN.rst 2 2 3 3 - :Original: :ref:`Documentation/arm64/index.rst <arm64_index>` 3 3 + :Original: :ref:`Documentation/arch/arm64/index.rst <arm64_index>` 4 4 :Translator: Bailu Lin <bailu.lin@vivo.com> 5 5 6 6 .. _cn_arm64_index:

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Documentation/translations/zh_CN/arm64/legacy_instructions.txt Documentation/translations/zh_CN/arch/arm64/legacy_instructions.txt

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··· 1 1 - Chinese translated version of Documentation/arm64/legacy_instructions.rst 1 1 + Chinese translated version of Documentation/arch/arm64/legacy_instructions.rst 2 2 3 3 If you have any comment or update to the content, please contact the 4 4 original document maintainer directly. However, if you have a problem ··· 10 10 Suzuki K. Poulose <suzuki.poulose@arm.com> 11 11 Chinese maintainer: Fu Wei <wefu@redhat.com> 12 12 --------------------------------------------------------------------- 13 13 - Documentation/arm64/legacy_instructions.rst 的中文翻译 13 13 + Documentation/arch/arm64/legacy_instructions.rst 的中文翻译 14 14 15 15 如果想评论或更新本文的内容，请直接联系原文档的维护者。如果你使用英文 16 16 交流有困难的话，也可以向中文版维护者求助。如果本翻译更新不及时或者翻

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Documentation/translations/zh_CN/arm64/memory.txt Documentation/translations/zh_CN/arch/arm64/memory.txt

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··· 1 1 - Chinese translated version of Documentation/arm64/memory.rst 1 1 + Chinese translated version of Documentation/arch/arm64/memory.rst 2 2 3 3 If you have any comment or update to the content, please contact the 4 4 original document maintainer directly. However, if you have a problem ··· 9 9 Maintainer: Catalin Marinas <catalin.marinas@arm.com> 10 10 Chinese maintainer: Fu Wei <wefu@redhat.com> 11 11 --------------------------------------------------------------------- 12 12 - Documentation/arm64/memory.rst 的中文翻译 12 12 + Documentation/arch/arm64/memory.rst 的中文翻译 13 13 14 14 如果想评论或更新本文的内容，请直接联系原文档的维护者。如果你使用英文 15 15 交流有困难的话，也可以向中文版维护者求助。如果本翻译更新不及时或者翻

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Documentation/translations/zh_CN/arm64/perf.rst Documentation/translations/zh_CN/arch/arm64/perf.rst

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··· 1 1 .. SPDX-License-Identifier: GPL-2.0 2 2 3 3 - .. include:: ../disclaimer-zh_CN.rst 3 3 + .. include:: ../../disclaimer-zh_CN.rst 4 4 5 5 - :Original: :ref:`Documentation/arm64/perf.rst <perf_index>` 5 5 + :Original: :ref:`Documentation/arch/arm64/perf.rst <perf_index>` 6 6 7 7 Translator: Bailu Lin <bailu.lin@vivo.com> 8 8

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Documentation/translations/zh_CN/arm64/silicon-errata.txt Documentation/translations/zh_CN/arch/arm64/silicon-errata.txt

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··· 1 1 - Chinese translated version of Documentation/arm64/silicon-errata.rst 1 1 + Chinese translated version of Documentation/arch/arm64/silicon-errata.rst 2 2 3 3 If you have any comment or update to the content, please contact the 4 4 original document maintainer directly. However, if you have a problem ··· 10 10 zh_CN: Fu Wei <wefu@redhat.com> 11 11 C: 1926e54f115725a9248d0c4c65c22acaf94de4c4 12 12 --------------------------------------------------------------------- 13 13 - Documentation/arm64/silicon-errata.rst 的中文翻译 13 13 + Documentation/arch/arm64/silicon-errata.rst 的中文翻译 14 14 15 15 如果想评论或更新本文的内容，请直接联系原文档的维护者。如果你使用英文 16 16 交流有困难的话，也可以向中文版维护者求助。如果本翻译更新不及时或者翻

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Documentation/translations/zh_CN/arm64/tagged-pointers.txt Documentation/translations/zh_CN/arch/arm64/tagged-pointers.txt

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··· 1 1 - Chinese translated version of Documentation/arm64/tagged-pointers.rst 1 1 + Chinese translated version of Documentation/arch/arm64/tagged-pointers.rst 2 2 3 3 If you have any comment or update to the content, please contact the 4 4 original document maintainer directly. However, if you have a problem ··· 9 9 Maintainer: Will Deacon <will.deacon@arm.com> 10 10 Chinese maintainer: Fu Wei <wefu@redhat.com> 11 11 --------------------------------------------------------------------- 12 12 - Documentation/arm64/tagged-pointers.rst 的中文翻译 12 12 + Documentation/arch/arm64/tagged-pointers.rst 的中文翻译 13 13 14 14 如果想评论或更新本文的内容，请直接联系原文档的维护者。如果你使用英文 15 15 交流有困难的话，也可以向中文版维护者求助。如果本翻译更新不及时或者翻

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Documentation/translations/zh_TW/arm64/amu.rst Documentation/translations/zh_TW/arch/arm64/amu.rst

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··· 1 1 .. SPDX-License-Identifier: GPL-2.0 2 2 3 3 - .. include:: ../disclaimer-zh_TW.rst 3 3 + .. include:: ../../disclaimer-zh_TW.rst 4 4 5 5 - :Original: :ref:`Documentation/arm64/amu.rst <amu_index>` 5 5 + :Original: :ref:`Documentation/arch/arm64/amu.rst <amu_index>` 6 6 7 7 Translator: Bailu Lin <bailu.lin@vivo.com> 8 8 Hu Haowen <src.res@email.cn>

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Documentation/translations/zh_TW/arm64/booting.txt Documentation/translations/zh_TW/arch/arm64/booting.txt

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··· 1 1 SPDX-License-Identifier: GPL-2.0 2 2 3 3 - Chinese translated version of Documentation/arm64/booting.rst 3 3 + Chinese translated version of Documentation/arch/arm64/booting.rst 4 4 5 5 If you have any comment or update to the content, please contact the 6 6 original document maintainer directly. However, if you have a problem ··· 13 13 zh_TW: Hu Haowen <src.res@email.cn> 14 14 C: 55f058e7574c3615dea4615573a19bdb258696c6 15 15 --------------------------------------------------------------------- 16 16 - Documentation/arm64/booting.rst 的中文翻譯 16 16 + Documentation/arch/arm64/booting.rst 的中文翻譯 17 17 18 18 如果想評論或更新本文的內容，請直接聯繫原文檔的維護者。如果你使用英文 19 19 交流有困難的話，也可以向中文版維護者求助。如果本翻譯更新不及時或者翻

+29 -33

Documentation/translations/zh_TW/arm64/elf_hwcaps.rst Documentation/translations/zh_CN/arch/arm64/elf_hwcaps.rst

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··· 1 1 - .. SPDX-License-Identifier: GPL-2.0 1 1 + .. include:: ../../disclaimer-zh_CN.rst 2 2 3 3 - .. include:: ../disclaimer-zh_TW.rst 4 4 - 5 5 - :Original: :ref:`Documentation/arm64/elf_hwcaps.rst <elf_hwcaps_index>` 3 3 + :Original: :ref:`Documentation/arch/arm64/elf_hwcaps.rst <elf_hwcaps_index>` 6 4 7 5 Translator: Bailu Lin <bailu.lin@vivo.com> 8 8 - Hu Haowen <src.res@email.cn> 9 6 10 7 ================ 11 8 ARM64 ELF hwcaps 12 9 ================ 13 10 14 14 - 這篇文檔描述了 arm64 ELF hwcaps 的用法和語義。 11 11 + 这篇文档描述了 arm64 ELF hwcaps 的用法和语义。 15 12 16 13 17 17 - 1. 簡介 14 14 + 1. 简介 18 15 ------- 19 16 20 20 - 有些硬體或軟體功能僅在某些 CPU 實現上和/或在具體某個內核配置上可用，但 21 21 - 對於處於 EL0 的用戶空間代碼沒有可用的架構發現機制。內核通過在輔助向量表 22 22 - 公開一組稱爲 hwcaps 的標誌而把這些功能暴露給用戶空間。 17 17 + 有些硬件或软件功能仅在某些 CPU 实现上和/或在具体某个内核配置上可用，但 18 18 + 对于处于 EL0 的用户空间代码没有可用的架构发现机制。内核通过在辅助向量表 19 19 + 公开一组称为 hwcaps 的标志而把这些功能暴露给用户空间。 23 20 24 24 - 用戶空間軟體可以通過獲取輔助向量的 AT_HWCAP 或 AT_HWCAP2 條目來測試功能， 25 25 - 並測試是否設置了相關標誌，例如:: 21 21 + 用户空间软件可以通过获取辅助向量的 AT_HWCAP 或 AT_HWCAP2 条目来测试功能， 22 22 + 并测试是否设置了相关标志，例如:: 26 23 27 24 bool floating_point_is_present(void) 28 25 { ··· 30 33 return false; 31 34 } 32 35 33 33 - 如果軟體依賴於 hwcap 描述的功能，在嘗試使用該功能前則應檢查相關的 hwcap 34 34 - 標誌以驗證該功能是否存在。 36 36 + 如果软件依赖于 hwcap 描述的功能，在尝试使用该功能前则应检查相关的 hwcap 37 37 + 标志以验证该功能是否存在。 35 38 36 36 - 不能通過其他方式探查這些功能。當一個功能不可用時，嘗試使用它可能導致不可 37 37 - 預測的行爲，並且無法保證能確切的知道該功能不可用，例如 SIGILL。 39 39 + 不能通过其他方式探查这些功能。当一个功能不可用时，尝试使用它可能导致不可 40 40 + 预测的行为，并且无法保证能确切的知道该功能不可用，例如 SIGILL。 38 41 39 42 40 40 - 2. Hwcaps 的說明 43 43 + 2. Hwcaps 的说明 41 44 ---------------- 42 45 43 43 - 大多數 hwcaps 旨在說明通過架構 ID 寄存器(處於 EL0 的用戶空間代碼無法訪問) 44 44 - 描述的功能的存在。這些 hwcap 通過 ID 寄存器欄位定義，並且應根據 ARM 體系 45 45 - 結構參考手冊（ARM ARM）中定義的欄位來解釋說明。 46 46 + 大多数 hwcaps 旨在说明通过架构 ID 寄存器(处于 EL0 的用户空间代码无法访问) 47 47 + 描述的功能的存在。这些 hwcap 通过 ID 寄存器字段定义，并且应根据 ARM 体系 48 48 + 结构参考手册（ARM ARM）中定义的字段来解释说明。 46 49 47 47 - 這些 hwcaps 以下面的形式描述:: 50 50 + 这些 hwcaps 以下面的形式描述:: 48 51 49 49 - idreg.field == val 表示有某個功能。 52 52 + idreg.field == val 表示有某个功能。 50 53 51 51 - 當 idreg.field 中有 val 時，hwcaps 表示 ARM ARM 定義的功能是有效的，但是 52 52 - 並不是說要完全和 val 相等，也不是說 idreg.field 描述的其他功能就是缺失的。 54 54 + 当 idreg.field 中有 val 时，hwcaps 表示 ARM ARM 定义的功能是有效的，但是 55 55 + 并不是说要完全和 val 相等，也不是说 idreg.field 描述的其他功能就是缺失的。 53 56 54 54 - 其他 hwcaps 可能表明無法僅由 ID 寄存器描述的功能的存在。這些 hwcaps 可能 55 55 - 沒有被 ID 寄存器描述，需要參考其他文檔。 57 57 + 其他 hwcaps 可能表明无法仅由 ID 寄存器描述的功能的存在。这些 hwcaps 可能 58 58 + 没有被 ID 寄存器描述，需要参考其他文档。 56 59 57 60 58 61 3. AT_HWCAP 中揭示的 hwcaps ··· 65 68 ID_AA64PFR0_EL1.AdvSIMD == 0b0000 表示有此功能。 66 69 67 70 HWCAP_EVTSTRM 68 68 - 通用計時器頻率配置爲大約100KHz以生成事件。 71 71 + 通用计时器频率配置为大约100KHz以生成事件。 69 72 70 73 HWCAP_AES 71 74 ID_AA64ISAR0_EL1.AES == 0b0001 表示有此功能。 ··· 92 95 ID_AA64PFR0_EL1.AdvSIMD == 0b0001 表示有此功能。 93 96 94 97 HWCAP_CPUID 95 95 - 根據 Documentation/arm64/cpu-feature-registers.rst 描述，EL0 可以訪問 98 98 + 根据 Documentation/arch/arm64/cpu-feature-registers.rst 描述，EL0 可以访问 96 99 某些 ID 寄存器。 97 100 98 98 - 這些 ID 寄存器可能表示功能的可用性。 101 101 + 这些 ID 寄存器可能表示功能的可用性。 99 102 100 103 HWCAP_ASIMDRDM 101 104 ID_AA64ISAR0_EL1.RDM == 0b0001 表示有此功能。 ··· 152 155 ID_AA64ISAR1_EL1.SB == 0b0001 表示有此功能。 153 156 154 157 HWCAP_PACA 155 155 - 如 Documentation/arm64/pointer-authentication.rst 所描述， 158 158 + 如 Documentation/arch/arm64/pointer-authentication.rst 所描述， 156 159 ID_AA64ISAR1_EL1.APA == 0b0001 或 ID_AA64ISAR1_EL1.API == 0b0001 157 160 表示有此功能。 158 161 159 162 HWCAP_PACG 160 160 - 如 Documentation/arm64/pointer-authentication.rst 所描述， 163 163 + 如 Documentation/arch/arm64/pointer-authentication.rst 所描述， 161 164 ID_AA64ISAR1_EL1.GPA == 0b0001 或 ID_AA64ISAR1_EL1.GPI == 0b0001 162 165 表示有此功能。 163 166 ··· 237 240 4. 未使用的 AT_HWCAP 位 238 241 ----------------------- 239 242 240 240 - 爲了與用戶空間交互，內核保證 AT_HWCAP 的第62、63位將始終返回0。 241 241 - 243 243 + 为了与用户空间交互，内核保证 AT_HWCAP 的第62、63位将始终返回0。

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Documentation/translations/zh_TW/arm64/hugetlbpage.rst Documentation/translations/zh_TW/arch/arm64/hugetlbpage.rst

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··· 1 1 .. SPDX-License-Identifier: GPL-2.0 2 2 3 3 - .. include:: ../disclaimer-zh_TW.rst 3 3 + .. include:: ../../disclaimer-zh_TW.rst 4 4 5 5 - :Original: :ref:`Documentation/arm64/hugetlbpage.rst <hugetlbpage_index>` 5 5 + :Original: :ref:`Documentation/arch/arm64/hugetlbpage.rst <hugetlbpage_index>` 6 6 7 7 Translator: Bailu Lin <bailu.lin@vivo.com> 8 8 Hu Haowen <src.res@email.cn>

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Documentation/translations/zh_TW/arm64/index.rst Documentation/translations/zh_TW/arch/arm64/index.rst

reviewed

··· 1 1 .. SPDX-License-Identifier: GPL-2.0 2 2 3 3 - .. include:: ../disclaimer-zh_TW.rst 3 3 + .. include:: ../../disclaimer-zh_TW.rst 4 4 5 5 - :Original: :ref:`Documentation/arm64/index.rst <arm64_index>` 5 5 + :Original: :ref:`Documentation/arch/arm64/index.rst <arm64_index>` 6 6 :Translator: Bailu Lin <bailu.lin@vivo.com> 7 7 Hu Haowen <src.res@email.cn> 8 8

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Documentation/translations/zh_TW/arm64/legacy_instructions.txt Documentation/translations/zh_TW/arch/arm64/legacy_instructions.txt

reviewed

··· 1 1 SPDX-License-Identifier: GPL-2.0 2 2 3 3 - Chinese translated version of Documentation/arm64/legacy_instructions.rst 3 3 + Chinese translated version of Documentation/arch/arm64/legacy_instructions.rst 4 4 5 5 If you have any comment or update to the content, please contact the 6 6 original document maintainer directly. However, if you have a problem ··· 13 13 Chinese maintainer: Fu Wei <wefu@redhat.com> 14 14 Traditional Chinese maintainer: Hu Haowen <src.res@email.cn> 15 15 --------------------------------------------------------------------- 16 16 - Documentation/arm64/legacy_instructions.rst 的中文翻譯 16 16 + Documentation/arch/arm64/legacy_instructions.rst 的中文翻譯 17 17 18 18 如果想評論或更新本文的內容，請直接聯繫原文檔的維護者。如果你使用英文 19 19 交流有困難的話，也可以向中文版維護者求助。如果本翻譯更新不及時或者翻

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Documentation/translations/zh_TW/arm64/memory.txt Documentation/translations/zh_TW/arch/arm64/memory.txt

reviewed

··· 1 1 SPDX-License-Identifier: GPL-2.0 2 2 3 3 - Chinese translated version of Documentation/arm64/memory.rst 3 3 + Chinese translated version of Documentation/arch/arm64/memory.rst 4 4 5 5 If you have any comment or update to the content, please contact the 6 6 original document maintainer directly. However, if you have a problem ··· 12 12 Chinese maintainer: Fu Wei <wefu@redhat.com> 13 13 Traditional Chinese maintainer: Hu Haowen <src.res@email.cn> 14 14 --------------------------------------------------------------------- 15 15 - Documentation/arm64/memory.rst 的中文翻譯 15 15 + Documentation/arch/arm64/memory.rst 的中文翻譯 16 16 17 17 如果想評論或更新本文的內容，請直接聯繫原文檔的維護者。如果你使用英文 18 18 交流有困難的話，也可以向中文版維護者求助。如果本翻譯更新不及時或者翻

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Documentation/translations/zh_TW/arm64/perf.rst Documentation/translations/zh_TW/arch/arm64/perf.rst

reviewed

··· 1 1 .. SPDX-License-Identifier: GPL-2.0 2 2 3 3 - .. include:: ../disclaimer-zh_TW.rst 3 3 + .. include:: ../../disclaimer-zh_TW.rst 4 4 5 5 - :Original: :ref:`Documentation/arm64/perf.rst <perf_index>` 5 5 + :Original: :ref:`Documentation/arch/arm64/perf.rst <perf_index>` 6 6 7 7 Translator: Bailu Lin <bailu.lin@vivo.com> 8 8 Hu Haowen <src.res@email.cn>

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Documentation/translations/zh_TW/arm64/silicon-errata.txt Documentation/translations/zh_TW/arch/arm64/silicon-errata.txt

reviewed

··· 1 1 SPDX-License-Identifier: GPL-2.0 2 2 3 3 - Chinese translated version of Documentation/arm64/silicon-errata.rst 3 3 + Chinese translated version of Documentation/arch/arm64/silicon-errata.rst 4 4 5 5 If you have any comment or update to the content, please contact the 6 6 original document maintainer directly. However, if you have a problem ··· 13 13 zh_TW: Hu Haowen <src.res@email.cn> 14 14 C: 1926e54f115725a9248d0c4c65c22acaf94de4c4 15 15 --------------------------------------------------------------------- 16 16 - Documentation/arm64/silicon-errata.rst 的中文翻譯 16 16 + Documentation/arch/arm64/silicon-errata.rst 的中文翻譯 17 17 18 18 如果想評論或更新本文的內容，請直接聯繫原文檔的維護者。如果你使用英文 19 19 交流有困難的話，也可以向中文版維護者求助。如果本翻譯更新不及時或者翻

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Documentation/translations/zh_TW/arm64/tagged-pointers.txt Documentation/translations/zh_TW/arch/arm64/tagged-pointers.txt

reviewed

··· 1 1 SPDX-License-Identifier: GPL-2.0 2 2 3 3 - Chinese translated version of Documentation/arm64/tagged-pointers.rst 3 3 + Chinese translated version of Documentation/arch/arm64/tagged-pointers.rst 4 4 5 5 If you have any comment or update to the content, please contact the 6 6 original document maintainer directly. However, if you have a problem ··· 12 12 Chinese maintainer: Fu Wei <wefu@redhat.com> 13 13 Traditional Chinese maintainer: Hu Haowen <src.res@email.cn> 14 14 --------------------------------------------------------------------- 15 15 - Documentation/arm64/tagged-pointers.rst 的中文翻譯 15 15 + Documentation/arch/arm64/tagged-pointers.rst 的中文翻譯 16 16 17 17 如果想評論或更新本文的內容，請直接聯繫原文檔的維護者。如果你使用英文 18 18 交流有困難的話，也可以向中文版維護者求助。如果本翻譯更新不及時或者翻

+1 -1

Documentation/translations/zh_TW/index.rst

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··· 150 150 .. toctree:: 151 151 :maxdepth: 2 152 152 153 153 - arm64/index 153 153 + arch/arm64/index 154 154 155 155 TODOList: 156 156

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Documentation/virt/kvm/api.rst

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··· 2613 2613 this vcpu, and determines which register slices are visible through 2614 2614 this ioctl interface. 2615 2615 2616 2616 - (See Documentation/arm64/sve.rst for an explanation of the "vq" 2616 2616 + (See Documentation/arch/arm64/sve.rst for an explanation of the "vq" 2617 2617 nomenclature.) 2618 2618 2619 2619 KVM_REG_ARM64_SVE_VLS is only accessible after KVM_ARM_VCPU_INIT.

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MAINTAINERS

reviewed

··· 3062 3062 L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) 3063 3063 S: Maintained 3064 3064 T: git git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux.git 3065 3065 - F: Documentation/arm64/ 3065 3065 + F: Documentation/arch/arm64/ 3066 3066 F: arch/arm64/ 3067 3067 F: tools/testing/selftests/arm64/ 3068 3068 X: arch/arm64/boot/dts/

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arch/arm64/Kconfig

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··· 1586 1586 When this option is enabled, user applications can opt in to a 1587 1587 relaxed ABI via prctl() allowing tagged addresses to be passed 1588 1588 to system calls as pointer arguments. For details, see 1589 1589 - Documentation/arm64/tagged-address-abi.rst. 1589 1589 + Documentation/arch/arm64/tagged-address-abi.rst. 1590 1590 1591 1591 menuconfig COMPAT 1592 1592 bool "Kernel support for 32-bit EL0" ··· 2048 2048 explicitly opt in. The mechanism for the userspace is 2049 2049 described in: 2050 2050 2051 2051 - Documentation/arm64/memory-tagging-extension.rst. 2051 2051 + Documentation/arch/arm64/memory-tagging-extension.rst. 2052 2052 2053 2053 endmenu # "ARMv8.5 architectural features" 2054 2054

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arch/arm64/include/asm/efi.h

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··· 88 88 * guaranteed to cover the kernel Image. 89 89 * 90 90 * Since the EFI stub is part of the kernel Image, we can relax the 91 91 - * usual requirements in Documentation/arm64/booting.rst, which still 91 91 + * usual requirements in Documentation/arch/arm64/booting.rst, which still 92 92 * apply to other bootloaders, and are required for some kernel 93 93 * configurations. 94 94 */

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arch/arm64/include/asm/image.h

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··· 27 27 28 28 /* 29 29 * struct arm64_image_header - arm64 kernel image header 30 30 - * See Documentation/arm64/booting.rst for details 30 30 + * See Documentation/arch/arm64/booting.rst for details 31 31 * 32 32 * @code0: Executable code, or 33 33 * @mz_header alternatively used for part of MZ header

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arch/arm64/include/uapi/asm/sigcontext.h

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··· 177 177 * vector length beyond its initial architectural limit of 2048 bits 178 178 * (16 quadwords). 179 179 * 180 180 - * See linux/Documentation/arm64/sve.rst for a description of the VL/VQ 180 180 + * See linux/Documentation/arch/arm64/sve.rst for a description of the VL/VQ 181 181 * terminology. 182 182 */ 183 183 #define SVE_VQ_BYTES __SVE_VQ_BYTES /* bytes per quadword */

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arch/arm64/kernel/kexec_image.c

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··· 48 48 49 49 /* 50 50 * We require a kernel with an unambiguous Image header. Per 51 51 - * Documentation/arm64/booting.rst, this is the case when image_size 51 51 + * Documentation/arch/arm64/booting.rst, this is the case when image_size 52 52 * is non-zero (practically speaking, since v3.17). 53 53 */ 54 54 h = (struct arm64_image_header *)kernel;

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mm/mremap.c

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··· 914 914 * mapping address intact. A non-zero tag will cause the subsequent 915 915 * range checks to reject the address as invalid. 916 916 * 917 917 - * See Documentation/arm64/tagged-address-abi.rst for more information. 917 917 + * See Documentation/arch/arm64/tagged-address-abi.rst for more 918 918 + * information. 918 919 */ 919 920 addr = untagged_addr(addr); 920 921

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tools/perf/util/arm-spe-decoder/arm-spe-decoder.c

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··· 51 51 * (bits [63:56]) is assigned as top-byte tag; so we only can 52 52 * retrieve address value from bits [55:0]. 53 53 * 54 54 - * According to Documentation/arm64/memory.rst, if detects the 54 54 + * According to Documentation/arch/arm64/memory.rst, if detects the 55 55 * specific pattern in bits [55:52] of payload which falls in 56 56 * the kernel space, should fixup the top byte and this allows 57 57 * perf tool to parse DSO symbol for data address correctly.