tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
fork atom

ARM: dts: sun5i: Change pinctrl nodes to avoid warning

All our pinctrl nodes were using a node name convention with a unit-address
to differentiate the different muxing options. However, since those nodes
didn't have a reg property, they were generating warnings in DTC.

In order to accomodate for this, convert the old nodes to the syntax we've
been using for the new SoCs, including removing the letter suffix of the
node labels to the bank of those pins to make things more readable.

Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>

Maxime Ripard 6a9951a1 79badc74

+127 -119
+3 -3
arch/arm/boot/dts/sun5i-a10s-auxtek-t003.dts
··· 76 76 77 77 &i2c0 { 78 78 pinctrl-names = "default"; 79 - pinctrl-0 = <&i2c0_pins_a>; 79 + pinctrl-0 = <&i2c0_pins>; 80 80 status = "okay"; 81 81 82 82 axp152: pmic@30 { ··· 90 90 91 91 &mmc0 { 92 92 pinctrl-names = "default"; 93 - pinctrl-0 = <&mmc0_pins_a>; 93 + pinctrl-0 = <&mmc0_pins>; 94 94 vmmc-supply = <&reg_vcc3v3>; 95 95 bus-width = <4>; 96 96 cd-gpios = <&pio 6 1 GPIO_ACTIVE_LOW>; /* PG1 */ ··· 125 125 126 126 &uart0 { 127 127 pinctrl-names = "default"; 128 - pinctrl-0 = <&uart0_pins_a>; 128 + pinctrl-0 = <&uart0_pb_pins>; 129 129 status = "okay"; 130 130 }; 131 131
+4 -4
arch/arm/boot/dts/sun5i-a10s-auxtek-t004.dts
··· 85 85 86 86 &i2c0 { 87 87 pinctrl-names = "default"; 88 - pinctrl-0 = <&i2c0_pins_a>; 88 + pinctrl-0 = <&i2c0_pins>; 89 89 status = "okay"; 90 90 91 91 axp152: pmic@30 { ··· 99 99 100 100 &mmc0 { 101 101 pinctrl-names = "default"; 102 - pinctrl-0 = <&mmc0_pins_a>; 102 + pinctrl-0 = <&mmc0_pins>; 103 103 vmmc-supply = <&reg_vcc3v3>; 104 104 bus-width = <4>; 105 105 cd-gpios = <&pio 6 1 GPIO_ACTIVE_LOW>; /* PG1 */ ··· 108 108 109 109 &mmc1 { 110 110 pinctrl-names = "default"; 111 - pinctrl-0 = <&mmc1_pins_a>; 111 + pinctrl-0 = <&mmc1_pins>; 112 112 vmmc-supply = <&reg_vmmc1>; 113 113 bus-width = <4>; 114 114 non-removable; ··· 145 145 146 146 &uart0 { 147 147 pinctrl-names = "default"; 148 - pinctrl-0 = <&uart0_pins_a>; 148 + pinctrl-0 = <&uart0_pb_pins>; 149 149 status = "okay"; 150 150 }; 151 151
+4 -4
arch/arm/boot/dts/sun5i-a10s-mk802.dts
··· 73 73 74 74 &i2c0 { 75 75 pinctrl-names = "default"; 76 - pinctrl-0 = <&i2c0_pins_a>; 76 + pinctrl-0 = <&i2c0_pins>; 77 77 status = "okay"; 78 78 79 79 axp152: pmic@30 { ··· 87 87 88 88 &mmc0 { 89 89 pinctrl-names = "default"; 90 - pinctrl-0 = <&mmc0_pins_a>; 90 + pinctrl-0 = <&mmc0_pins>; 91 91 vmmc-supply = <&reg_vcc3v3>; 92 92 bus-width = <4>; 93 93 cd-gpios = <&pio 6 1 GPIO_ACTIVE_LOW>; /* PG1 */ ··· 96 96 97 97 &mmc1 { 98 98 pinctrl-names = "default"; 99 - pinctrl-0 = <&mmc1_pins_a>; 99 + pinctrl-0 = <&mmc1_pins>; 100 100 vmmc-supply = <&reg_vcc3v3>; 101 101 bus-width = <4>; 102 102 non-removable; ··· 118 118 119 119 &uart0 { 120 120 pinctrl-names = "default"; 121 - pinctrl-0 = <&uart0_pins_a>; 121 + pinctrl-0 = <&uart0_pb_pins>; 122 122 status = "okay"; 123 123 }; 124 124
+11 -11
arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts
··· 97 97 98 98 &emac { 99 99 pinctrl-names = "default"; 100 - pinctrl-0 = <&emac_pins_b>; 100 + pinctrl-0 = <&emac_pa_pins>; 101 101 phy = <&phy1>; 102 102 status = "okay"; 103 103 }; ··· 118 118 119 119 &i2c0 { 120 120 pinctrl-names = "default"; 121 - pinctrl-0 = <&i2c0_pins_a>; 121 + pinctrl-0 = <&i2c0_pins>; 122 122 status = "okay"; 123 123 124 124 axp152: pmic@30 { ··· 131 131 132 132 &i2c1 { 133 133 pinctrl-names = "default"; 134 - pinctrl-0 = <&i2c1_pins_a>; 134 + pinctrl-0 = <&i2c1_pins>; 135 135 status = "okay"; 136 136 137 137 at24@50 { ··· 144 144 145 145 &i2c2 { 146 146 pinctrl-names = "default"; 147 - pinctrl-0 = <&i2c2_pins_a>; 147 + pinctrl-0 = <&i2c2_pins>; 148 148 status = "okay"; 149 149 }; 150 150 ··· 198 198 199 199 &mmc0 { 200 200 pinctrl-names = "default"; 201 - pinctrl-0 = <&mmc0_pins_a>; 201 + pinctrl-0 = <&mmc0_pins>; 202 202 vmmc-supply = <&reg_vcc3v3>; 203 203 bus-width = <4>; 204 204 cd-gpios = <&pio 6 1 GPIO_ACTIVE_LOW>; /* PG1 */ ··· 207 207 208 208 &mmc1 { 209 209 pinctrl-names = "default"; 210 - pinctrl-0 = <&mmc1_pins_a>; 210 + pinctrl-0 = <&mmc1_pins>; 211 211 vmmc-supply = <&reg_vcc3v3>; 212 212 bus-width = <4>; 213 213 cd-gpios = <&pio 6 13 GPIO_ACTIVE_LOW>; /* PG13 */ ··· 248 248 249 249 &spi2 { 250 250 pinctrl-names = "default"; 251 - pinctrl-0 = <&spi2_pins_b>, 252 - <&spi2_cs0_pins_b>; 251 + pinctrl-0 = <&spi2_pb_pins>, 252 + <&spi2_cs0_pb_pin>; 253 253 status = "okay"; 254 254 }; 255 255 ··· 259 259 260 260 &uart0 { 261 261 pinctrl-names = "default"; 262 - pinctrl-0 = <&uart0_pins_a>; 262 + pinctrl-0 = <&uart0_pb_pins>; 263 263 status = "okay"; 264 264 }; 265 265 266 266 &uart2 { 267 267 pinctrl-names = "default"; 268 - pinctrl-0 = <&uart2_pins_b>; 268 + pinctrl-0 = <&uart2_pc_pins>; 269 269 status = "okay"; 270 270 }; 271 271 272 272 &uart3 { 273 273 pinctrl-names = "default"; 274 - pinctrl-0 = <&uart3_pins_a>; 274 + pinctrl-0 = <&uart3_pg_pins>; 275 275 status = "okay"; 276 276 }; 277 277
+3 -3
arch/arm/boot/dts/sun5i-a10s-r7-tv-dongle.dts
··· 77 77 78 78 &mmc0 { 79 79 pinctrl-names = "default"; 80 - pinctrl-0 = <&mmc0_pins_a>; 80 + pinctrl-0 = <&mmc0_pins>; 81 81 vmmc-supply = <&reg_vcc3v3>; 82 82 bus-width = <4>; 83 83 cd-gpios = <&pio 6 1 GPIO_ACTIVE_LOW>; /* PG1 */ ··· 86 86 87 87 &mmc1 { 88 88 pinctrl-names = "default"; 89 - pinctrl-0 = <&mmc1_pins_a>; 89 + pinctrl-0 = <&mmc1_pins>; 90 90 vmmc-supply = <&reg_vcc3v3>; 91 91 bus-width = <4>; 92 92 non-removable; ··· 112 112 113 113 &uart0 { 114 114 pinctrl-names = "default"; 115 - pinctrl-0 = <&uart0_pins_a>; 115 + pinctrl-0 = <&uart0_pb_pins>; 116 116 status = "okay"; 117 117 }; 118 118
+4 -4
arch/arm/boot/dts/sun5i-a10s-wobo-i5.dts
··· 90 90 91 91 &emac { 92 92 pinctrl-names = "default"; 93 - pinctrl-0 = <&emac_pins_a>; 93 + pinctrl-0 = <&emac_pd_pins>; 94 94 phy = <&phy1>; 95 95 status = "okay"; 96 96 }; ··· 101 101 102 102 &i2c0 { 103 103 pinctrl-names = "default"; 104 - pinctrl-0 = <&i2c0_pins_a>; 104 + pinctrl-0 = <&i2c0_pins>; 105 105 status = "okay"; 106 106 107 107 axp209: pmic@34 { ··· 123 123 124 124 &mmc0 { 125 125 pinctrl-names = "default"; 126 - pinctrl-0 = <&mmc0_pins_a>; 126 + pinctrl-0 = <&mmc0_pins>; 127 127 vmmc-supply = <&reg_vcc3v3>; 128 128 bus-width = <4>; 129 129 cd-gpios = <&pio 1 3 GPIO_ACTIVE_LOW>; /* PB3 */ ··· 184 184 185 185 &uart0 { 186 186 pinctrl-names = "default"; 187 - pinctrl-0 = <&uart0_pins_a>; 187 + pinctrl-0 = <&uart0_pb_pins>; 188 188 status = "okay"; 189 189 }; 190 190
+6 -6
arch/arm/boot/dts/sun5i-a10s.dtsi
··· 124 124 &pio { 125 125 compatible = "allwinner,sun5i-a10s-pinctrl"; 126 126 127 - uart0_pins_a: uart0@0 { 127 + uart0_pb_pins: uart0-pb-pins { 128 128 pins = "PB19", "PB20"; 129 129 function = "uart0"; 130 130 }; 131 131 132 - uart2_pins_b: uart2@1 { 132 + uart2_pc_pins: uart2-pc-pins { 133 133 pins = "PC18", "PC19"; 134 134 function = "uart2"; 135 135 }; 136 136 137 - emac_pins_b: emac0@1 { 137 + emac_pa_pins: emac-pa-pins { 138 138 pins = "PA0", "PA1", "PA2", 139 139 "PA3", "PA4", "PA5", "PA6", 140 140 "PA7", "PA8", "PA9", "PA10", ··· 143 143 function = "emac"; 144 144 }; 145 145 146 - mmc1_pins_a: mmc1@0 { 146 + mmc1_pins: mmc1-pins { 147 147 pins = "PG3", "PG4", "PG5", 148 148 "PG6", "PG7", "PG8"; 149 149 function = "mmc1"; 150 150 drive-strength = <30>; 151 151 }; 152 152 153 - spi2_pins_b: spi2@1 { 153 + spi2_pb_pins: spi2-pb-pins { 154 154 pins = "PB12", "PB13", "PB14"; 155 155 function = "spi2"; 156 156 }; 157 157 158 - spi2_cs0_pins_b: spi2_cs0@1 { 158 + spi2_cs0_pb_pin: spi2-cs0-pb-pin { 159 159 pins = "PB11"; 160 160 function = "spi2"; 161 161 };
+5 -5
arch/arm/boot/dts/sun5i-a13-empire-electronix-d709.dts
··· 79 79 80 80 &i2c0 { 81 81 pinctrl-names = "default"; 82 - pinctrl-0 = <&i2c0_pins_a>; 82 + pinctrl-0 = <&i2c0_pins>; 83 83 status = "okay"; 84 84 85 85 axp209: pmic@34 { ··· 92 92 93 93 &i2c1 { 94 94 pinctrl-names = "default"; 95 - pinctrl-0 = <&i2c1_pins_a>; 95 + pinctrl-0 = <&i2c1_pins>; 96 96 status = "okay"; 97 97 98 98 pcf8563: rtc@51 { ··· 122 122 123 123 &mmc0 { 124 124 pinctrl-names = "default"; 125 - pinctrl-0 = <&mmc0_pins_a>; 125 + pinctrl-0 = <&mmc0_pins>; 126 126 vmmc-supply = <&reg_vcc3v3>; 127 127 bus-width = <4>; 128 128 cd-gpios = <&pio 6 0 GPIO_ACTIVE_LOW>; /* PG0 */ ··· 149 149 150 150 &pwm { 151 151 pinctrl-names = "default"; 152 - pinctrl-0 = <&pwm0_pins>; 152 + pinctrl-0 = <&pwm0_pin>; 153 153 status = "okay"; 154 154 }; 155 155 ··· 191 191 192 192 &uart1 { 193 193 pinctrl-names = "default"; 194 - pinctrl-0 = <&uart1_pins_b>; 194 + pinctrl-0 = <&uart1_pg_pins>; 195 195 status = "okay"; 196 196 }; 197 197
+5 -5
arch/arm/boot/dts/sun5i-a13-hsg-h702.dts
··· 70 70 71 71 &i2c0 { 72 72 pinctrl-names = "default"; 73 - pinctrl-0 = <&i2c0_pins_a>; 73 + pinctrl-0 = <&i2c0_pins>; 74 74 status = "okay"; 75 75 76 76 axp209: pmic@34 { ··· 81 81 82 82 &i2c1 { 83 83 pinctrl-names = "default"; 84 - pinctrl-0 = <&i2c1_pins_a>; 84 + pinctrl-0 = <&i2c1_pins>; 85 85 status = "okay"; 86 86 87 87 pcf8563: rtc@51 { ··· 92 92 93 93 &i2c2 { 94 94 pinctrl-names = "default"; 95 - pinctrl-0 = <&i2c2_pins_a>; 95 + pinctrl-0 = <&i2c2_pins>; 96 96 status = "okay"; 97 97 }; 98 98 ··· 117 117 118 118 &mmc0 { 119 119 pinctrl-names = "default"; 120 - pinctrl-0 = <&mmc0_pins_a>; 120 + pinctrl-0 = <&mmc0_pins>; 121 121 vmmc-supply = <&reg_vcc3v3>; 122 122 bus-width = <4>; 123 123 cd-gpios = <&pio 6 0 GPIO_ACTIVE_LOW>; /* PG0 */ ··· 180 180 181 181 &uart1 { 182 182 pinctrl-names = "default"; 183 - pinctrl-0 = <&uart1_pins_b>; 183 + pinctrl-0 = <&uart1_pg_pins>; 184 184 status = "okay"; 185 185 }; 186 186
+6 -6
arch/arm/boot/dts/sun5i-a13-licheepi-one.dts
··· 95 95 96 96 &i2c0 { 97 97 pinctrl-names = "default"; 98 - pinctrl-0 = <&i2c0_pins_a>; 98 + pinctrl-0 = <&i2c0_pins>; 99 99 status = "okay"; 100 100 101 101 axp209: pmic@34 { ··· 110 110 111 111 &i2c1 { 112 112 pinctrl-names = "default"; 113 - pinctrl-0 = <&i2c1_pins_a>; 113 + pinctrl-0 = <&i2c1_pins>; 114 114 status = "disabled"; 115 115 }; 116 116 117 117 &i2c2 { 118 118 pinctrl-names = "default"; 119 - pinctrl-0 = <&i2c2_pins_a>; 119 + pinctrl-0 = <&i2c2_pins>; 120 120 status = "disabled"; 121 121 }; 122 122 ··· 134 134 135 135 &mmc0 { 136 136 pinctrl-names = "default"; 137 - pinctrl-0 = <&mmc0_pins_a>; 137 + pinctrl-0 = <&mmc0_pins>; 138 138 vmmc-supply = <&reg_vcc3v3>; 139 139 bus-width = <4>; 140 140 broken-cd; ··· 143 143 144 144 &mmc2 { 145 145 pinctrl-names = "default"; 146 - pinctrl-0 = <&mmc2_4bit_pins_a>; 146 + pinctrl-0 = <&mmc2_4bit_pc_pins>; 147 147 vmmc-supply = <&reg_vcc3v3>; 148 148 bus-width = <4>; 149 149 broken-cd; ··· 204 204 205 205 &uart1 { 206 206 pinctrl-names = "default"; 207 - pinctrl-0 = <&uart1_pins_b>; 207 + pinctrl-0 = <&uart1_pg_pins>; 208 208 status = "okay"; 209 209 }; 210 210
+5 -5
arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts
··· 78 78 79 79 &i2c0 { 80 80 pinctrl-names = "default"; 81 - pinctrl-0 = <&i2c0_pins_a>; 81 + pinctrl-0 = <&i2c0_pins>; 82 82 status = "okay"; 83 83 }; 84 84 85 85 &i2c1 { 86 86 pinctrl-names = "default"; 87 - pinctrl-0 = <&i2c1_pins_a>; 87 + pinctrl-0 = <&i2c1_pins>; 88 88 status = "okay"; 89 89 }; 90 90 91 91 &i2c2 { 92 92 pinctrl-names = "default"; 93 - pinctrl-0 = <&i2c2_pins_a>; 93 + pinctrl-0 = <&i2c2_pins>; 94 94 status = "okay"; 95 95 }; 96 96 97 97 &mmc0 { 98 98 pinctrl-names = "default"; 99 - pinctrl-0 = <&mmc0_pins_a>; 99 + pinctrl-0 = <&mmc0_pins>; 100 100 vmmc-supply = <&reg_vcc3v3>; 101 101 bus-width = <4>; 102 102 cd-gpios = <&pio 6 0 GPIO_ACTIVE_LOW>; /* PG0 */ ··· 143 143 144 144 &uart1 { 145 145 pinctrl-names = "default"; 146 - pinctrl-0 = <&uart1_pins_b>; 146 + pinctrl-0 = <&uart1_pg_pins>; 147 147 status = "okay"; 148 148 }; 149 149
+5 -5
arch/arm/boot/dts/sun5i-a13-olinuxino.dts
··· 124 124 125 125 &i2c0 { 126 126 pinctrl-names = "default"; 127 - pinctrl-0 = <&i2c0_pins_a>; 127 + pinctrl-0 = <&i2c0_pins>; 128 128 status = "okay"; 129 129 130 130 axp209: pmic@34 { ··· 139 139 140 140 &i2c1 { 141 141 pinctrl-names = "default"; 142 - pinctrl-0 = <&i2c1_pins_a>; 142 + pinctrl-0 = <&i2c1_pins>; 143 143 status = "okay"; 144 144 }; 145 145 146 146 &i2c2 { 147 147 pinctrl-names = "default"; 148 - pinctrl-0 = <&i2c2_pins_a>; 148 + pinctrl-0 = <&i2c2_pins>; 149 149 status = "okay"; 150 150 }; 151 151 ··· 191 191 192 192 &mmc0 { 193 193 pinctrl-names = "default"; 194 - pinctrl-0 = <&mmc0_pins_a>; 194 + pinctrl-0 = <&mmc0_pins>; 195 195 vmmc-supply = <&reg_vcc3v3>; 196 196 bus-width = <4>; 197 197 cd-gpios = <&pio 6 0 GPIO_ACTIVE_LOW>; /* PG0 */ ··· 251 251 252 252 &uart1 { 253 253 pinctrl-names = "default"; 254 - pinctrl-0 = <&uart1_pins_b>; 254 + pinctrl-0 = <&uart1_pg_pins>; 255 255 status = "okay"; 256 256 }; 257 257
+1 -1
arch/arm/boot/dts/sun5i-a13-utoo-p66.dts
··· 81 81 82 82 &mmc2 { 83 83 pinctrl-names = "default"; 84 - pinctrl-0 = <&mmc2_pins_a>; 84 + pinctrl-0 = <&mmc2_8bit_pins>; 85 85 vmmc-supply = <&reg_vcc3v3>; 86 86 bus-width = <8>; 87 87 non-removable;
+9 -9
arch/arm/boot/dts/sun5i-gr8-chip-pro.dts
··· 93 93 94 94 &i2c0 { 95 95 pinctrl-names = "default"; 96 - pinctrl-0 = <&i2c0_pins_a>; 96 + pinctrl-0 = <&i2c0_pins>; 97 97 status = "okay"; 98 98 99 99 axp209: pmic@34 { ··· 113 113 114 114 &i2c1 { 115 115 pinctrl-names = "default"; 116 - pinctrl-0 = <&i2c1_pins_a>; 116 + pinctrl-0 = <&i2c1_pins>; 117 117 status = "disabled"; 118 118 }; 119 119 120 120 &i2s0 { 121 121 pinctrl-names = "default"; 122 - pinctrl-0 = <&i2s0_mclk_pins_a>, <&i2s0_data_pins_a>; 122 + pinctrl-0 = <&i2s0_mclk_pin>, <&i2s0_data_pins>; 123 123 status = "disabled"; 124 124 }; 125 125 126 126 &mmc0 { 127 127 pinctrl-names = "default"; 128 - pinctrl-0 = <&mmc0_pins_a>; 128 + pinctrl-0 = <&mmc0_pins>; 129 129 vmmc-supply = <&reg_vcc3v3>; 130 130 mmc-pwrseq = <&mmc0_pwrseq>; 131 131 bus-width = <4>; ··· 135 135 136 136 &nfc { 137 137 pinctrl-names = "default"; 138 - pinctrl-0 = <&nand_pins_a &nand_cs0_pins_a &nand_rb0_pins_a>; 138 + pinctrl-0 = <&nand_pins &nand_cs0_pin &nand_rb0_pin>; 139 139 status = "okay"; 140 140 141 141 nand@0 { ··· 157 157 158 158 &pwm { 159 159 pinctrl-names = "default"; 160 - pinctrl-0 = <&pwm0_pins>, <&pwm1_pins>; 160 + pinctrl-0 = <&pwm0_pin>, <&pwm1_pins>; 161 161 status = "disabled"; 162 162 }; 163 163 ··· 206 206 207 207 &uart1 { 208 208 pinctrl-names = "default"; 209 - pinctrl-0 = <&uart1_pins_b>, <&uart1_cts_rts_pins_a>; 209 + pinctrl-0 = <&uart1_pg_pins>, <&uart1_cts_rts_pins>; 210 210 status = "okay"; 211 211 }; 212 212 213 213 &uart2 { 214 214 pinctrl-names = "default"; 215 - pinctrl-0 = <&uart2_pins_a>, <&uart2_cts_rts_pins_a>; 215 + pinctrl-0 = <&uart2_pd_pins>, <&uart2_cts_rts_pd_pins>; 216 216 status = "disabled"; 217 217 }; 218 218 219 219 &uart3 { 220 220 pinctrl-names = "default"; 221 - pinctrl-0 = <&uart3_pins_a>, <&uart3_cts_rts_pins_a>; 221 + pinctrl-0 = <&uart3_pg_pins>, <&uart3_cts_rts_pg_pins>; 222 222 status = "okay"; 223 223 }; 224 224
+10 -10
arch/arm/boot/dts/sun5i-gr8-evb.dts
··· 124 124 125 125 &i2c0 { 126 126 pinctrl-names = "default"; 127 - pinctrl-0 = <&i2c0_pins_a>; 127 + pinctrl-0 = <&i2c0_pins>; 128 128 status = "okay"; 129 129 130 130 axp209: pmic@34 { ··· 144 144 145 145 &i2c1 { 146 146 pinctrl-names = "default"; 147 - pinctrl-0 = <&i2c1_pins_a>; 147 + pinctrl-0 = <&i2c1_pins>; 148 148 status = "okay"; 149 149 150 150 wm8978: codec@1a { ··· 161 161 162 162 &i2c2 { 163 163 pinctrl-names = "default"; 164 - pinctrl-0 = <&i2c2_pins_a>; 164 + pinctrl-0 = <&i2c2_pins>; 165 165 status = "okay"; 166 166 }; 167 167 168 168 &i2s0 { 169 169 pinctrl-names = "default"; 170 - pinctrl-0 = <&i2s0_mclk_pins_a>, <&i2s0_data_pins_a>; 170 + pinctrl-0 = <&i2s0_mclk_pin>, <&i2s0_data_pins>; 171 171 status = "okay"; 172 172 }; 173 173 174 174 &ir0 { 175 175 pinctrl-names = "default"; 176 - pinctrl-0 = <&ir0_rx_pins_a>; 176 + pinctrl-0 = <&ir0_rx_pin>; 177 177 status = "okay"; 178 178 }; 179 179 ··· 233 233 234 234 &mmc0 { 235 235 pinctrl-names = "default"; 236 - pinctrl-0 = <&mmc0_pins_a>; 236 + pinctrl-0 = <&mmc0_pins>; 237 237 vmmc-supply = <&reg_vcc3v3>; 238 238 bus-width = <4>; 239 239 cd-gpios = <&pio 6 0 GPIO_ACTIVE_LOW>; /* PG0 */ ··· 242 242 243 243 &nfc { 244 244 pinctrl-names = "default"; 245 - pinctrl-0 = <&nand_pins_a &nand_cs0_pins_a &nand_rb0_pins_a>; 245 + pinctrl-0 = <&nand_pins &nand_cs0_pin &nand_rb0_pin>; 246 246 247 247 /* MLC Support sucks for now */ 248 248 status = "disabled"; ··· 258 258 259 259 &pwm { 260 260 pinctrl-names = "default"; 261 - pinctrl-0 = <&pwm0_pins>; 261 + pinctrl-0 = <&pwm0_pin>; 262 262 status = "okay"; 263 263 }; 264 264 ··· 298 298 299 299 &spdif { 300 300 pinctrl-names = "default"; 301 - pinctrl-0 = <&spdif_tx_pins_a>; 301 + pinctrl-0 = <&spdif_tx_pin>; 302 302 status = "okay"; 303 303 }; 304 304 ··· 308 308 309 309 &uart1 { 310 310 pinctrl-names = "default"; 311 - pinctrl-0 = <&uart1_pins_b>, <&uart1_cts_rts_pins_a>; 311 + pinctrl-0 = <&uart1_pg_pins>, <&uart1_cts_rts_pins>; 312 312 status = "okay"; 313 313 }; 314 314
+5 -5
arch/arm/boot/dts/sun5i-gr8.dtsi
··· 98 98 &pio { 99 99 compatible = "nextthing,gr8-pinctrl"; 100 100 101 - i2s0_data_pins_a: i2s0-data@0 { 101 + i2s0_data_pins: i2s0-data-pins { 102 102 pins = "PB6", "PB7", "PB8", "PB9"; 103 103 function = "i2s0"; 104 104 }; 105 105 106 - i2s0_mclk_pins_a: i2s0-mclk@0 { 106 + i2s0_mclk_pin: i2s0-mclk-pin { 107 107 pins = "PB5"; 108 108 function = "i2s0"; 109 109 }; 110 110 111 - pwm1_pins: pwm1 { 111 + pwm1_pins: pwm1-pin { 112 112 pins = "PG13"; 113 113 function = "pwm1"; 114 114 }; 115 115 116 - spdif_tx_pins_a: spdif@0 { 116 + spdif_tx_pin: spdif-tx-pin { 117 117 pins = "PB10"; 118 118 function = "spdif"; 119 119 bias-pull-up; 120 120 }; 121 121 122 - uart1_cts_rts_pins_a: uart1-cts-rts@0 { 122 + uart1_cts_rts_pins: uart1-cts-rts-pins { 123 123 pins = "PG5", "PG6"; 124 124 function = "uart1"; 125 125 };
+9 -9
arch/arm/boot/dts/sun5i-r8-chip.dts
··· 108 108 109 109 &i2c0 { 110 110 pinctrl-names = "default"; 111 - pinctrl-0 = <&i2c0_pins_a>; 111 + pinctrl-0 = <&i2c0_pins>; 112 112 status = "okay"; 113 113 114 114 axp209: pmic@34 { ··· 136 136 137 137 &i2c1 { 138 138 pinctrl-names = "default"; 139 - pinctrl-0 = <&i2c1_pins_a>; 139 + pinctrl-0 = <&i2c1_pins>; 140 140 status = "disabled"; 141 141 }; 142 142 143 143 &i2c2 { 144 144 pinctrl-names = "default"; 145 - pinctrl-0 = <&i2c2_pins_a>; 145 + pinctrl-0 = <&i2c2_pins>; 146 146 status = "okay"; 147 147 148 148 xio: gpio@38 { ··· 159 159 }; 160 160 }; 161 161 162 - &mmc0_pins_a { 162 + &mmc0_pins { 163 163 bias-pull-up; 164 164 }; 165 165 166 166 &mmc0 { 167 167 pinctrl-names = "default"; 168 - pinctrl-0 = <&mmc0_pins_a>; 168 + pinctrl-0 = <&mmc0_pins>; 169 169 vmmc-supply = <&reg_vcc3v3>; 170 170 mmc-pwrseq = <&mmc0_pwrseq>; 171 171 bus-width = <4>; ··· 251 251 252 252 &spi2 { 253 253 pinctrl-names = "default"; 254 - pinctrl-0 = <&spi2_pins_a>; 254 + pinctrl-0 = <&spi2_pe_pins>; 255 255 status = "disabled"; 256 256 }; 257 257 ··· 265 265 266 266 &uart1 { 267 267 pinctrl-names = "default"; 268 - pinctrl-0 = <&uart1_pins_b>; 268 + pinctrl-0 = <&uart1_pg_pins>; 269 269 status = "okay"; 270 270 }; 271 271 272 272 &uart3 { 273 273 pinctrl-names = "default"; 274 - pinctrl-0 = <&uart3_pins_a>, 275 - <&uart3_cts_rts_pins_a>; 274 + pinctrl-0 = <&uart3_pg_pins>, 275 + <&uart3_cts_rts_pg_pins>; 276 276 status = "okay"; 277 277 }; 278 278
+10 -2
arch/arm/boot/dts/sun5i-reference-design-tablet.dtsi
··· 76 76 }; 77 77 78 78 &i2c0 { 79 + pinctrl-0 = <&i2c0_pins>; 80 + 79 81 axp209: pmic@34 { 80 82 reg = <0x34>; 81 83 interrupts = <0>; ··· 85 83 }; 86 84 87 85 &i2c1 { 86 + pinctrl-0 = <&i2c1_pins>; 87 + 88 88 /* 89 89 * The gsl1680 is rated at 400KHz and it will not work reliable at 90 90 * 100KHz, this has been confirmed on multiple different q8 tablets. ··· 125 121 126 122 &mmc0 { 127 123 pinctrl-names = "default"; 128 - pinctrl-0 = <&mmc0_pins_a>; 124 + pinctrl-0 = <&mmc0_pins>; 129 125 vmmc-supply = <&reg_vcc3v0>; 130 126 bus-width = <4>; 131 127 cd-gpios = <&pio 6 0 GPIO_ACTIVE_LOW>; /* PG0 */ ··· 148 144 function = "gpio_in"; 149 145 bias-pull-up; 150 146 }; 147 + }; 148 + 149 + &pwm { 150 + pinctrl-0 = <&pwm0_pin>; 151 151 }; 152 152 153 153 &reg_dcdc2 { ··· 192 184 193 185 &uart1 { 194 186 pinctrl-names = "default"; 195 - pinctrl-0 = <&uart1_pins_b>; 187 + pinctrl-0 = <&uart1_pg_pins>; 196 188 status = "okay"; 197 189 }; 198 190
+22 -22
arch/arm/boot/dts/sun5i.dtsi
··· 446 446 #interrupt-cells = <3>; 447 447 #gpio-cells = <3>; 448 448 449 - emac_pins_a: emac0@0 { 449 + emac_pd_pins: emac-pd-pins { 450 450 pins = "PD6", "PD7", "PD10", 451 451 "PD11", "PD12", "PD13", "PD14", 452 452 "PD15", "PD18", "PD19", "PD20", ··· 455 455 function = "emac"; 456 456 }; 457 457 458 - i2c0_pins_a: i2c0@0 { 458 + i2c0_pins: i2c0-pins { 459 459 pins = "PB0", "PB1"; 460 460 function = "i2c0"; 461 461 }; 462 462 463 - i2c1_pins_a: i2c1@0 { 463 + i2c1_pins: i2c1-pins { 464 464 pins = "PB15", "PB16"; 465 465 function = "i2c1"; 466 466 }; 467 467 468 - i2c2_pins_a: i2c2@0 { 468 + i2c2_pins: i2c2-pins { 469 469 pins = "PB17", "PB18"; 470 470 function = "i2c2"; 471 471 }; 472 472 473 - ir0_rx_pins_a: ir0@0 { 473 + ir0_rx_pin: ir0-rx-pin { 474 474 pins = "PB4"; 475 475 function = "ir0"; 476 476 }; 477 477 478 - lcd_rgb565_pins: lcd_rgb565@0 { 478 + lcd_rgb565_pins: lcd-rgb565-pins { 479 479 pins = "PD3", "PD4", "PD5", "PD6", "PD7", 480 480 "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", 481 481 "PD19", "PD20", "PD21", "PD22", "PD23", ··· 483 483 function = "lcd0"; 484 484 }; 485 485 486 - lcd_rgb666_pins: lcd_rgb666@0 { 486 + lcd_rgb666_pins: lcd-rgb666-pins { 487 487 pins = "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", 488 488 "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", 489 489 "PD18", "PD19", "PD20", "PD21", "PD22", "PD23", ··· 491 491 function = "lcd0"; 492 492 }; 493 493 494 - mmc0_pins_a: mmc0@0 { 494 + mmc0_pins: mmc0-pins { 495 495 pins = "PF0", "PF1", "PF2", "PF3", 496 496 "PF4", "PF5"; 497 497 function = "mmc0"; ··· 499 499 bias-pull-up; 500 500 }; 501 501 502 - mmc2_pins_a: mmc2@0 { 502 + mmc2_8bit_pins: mmc2-8bit-pins { 503 503 pins = "PC6", "PC7", "PC8", "PC9", 504 504 "PC10", "PC11", "PC12", "PC13", 505 505 "PC14", "PC15"; ··· 508 508 bias-pull-up; 509 509 }; 510 510 511 - mmc2_4bit_pins_a: mmc2-4bit@0 { 511 + mmc2_4bit_pc_pins: mmc2-4bit-pc-pins { 512 512 pins = "PC6", "PC7", "PC8", "PC9", 513 513 "PC10", "PC11"; 514 514 function = "mmc2"; ··· 516 516 bias-pull-up; 517 517 }; 518 518 519 - nand_pins_a: nand-base0@0 { 519 + nand_pins: nand-pins { 520 520 pins = "PC0", "PC1", "PC2", 521 521 "PC5", "PC8", "PC9", "PC10", 522 522 "PC11", "PC12", "PC13", "PC14", ··· 524 524 function = "nand0"; 525 525 }; 526 526 527 - nand_cs0_pins_a: nand-cs@0 { 527 + nand_cs0_pin: nand-cs0-pin { 528 528 pins = "PC4"; 529 529 function = "nand0"; 530 530 }; 531 531 532 - nand_rb0_pins_a: nand-rb@0 { 532 + nand_rb0_pin: nand-rb0-pin { 533 533 pins = "PC6"; 534 534 function = "nand0"; 535 535 }; 536 536 537 - spi2_pins_a: spi2@0 { 537 + spi2_pe_pins: spi2-pe-pins { 538 538 pins = "PE1", "PE2", "PE3"; 539 539 function = "spi2"; 540 540 }; 541 541 542 - spi2_cs0_pins_a: spi2-cs0@0 { 542 + spi2_cs0_pe_pin: spi2-cs0-pe-pin { 543 543 pins = "PE0"; 544 544 function = "spi2"; 545 545 }; 546 546 547 - uart1_pins_a: uart1@0 { 547 + uart1_pe_pins: uart1-pe-pins { 548 548 pins = "PE10", "PE11"; 549 549 function = "uart1"; 550 550 }; 551 551 552 - uart1_pins_b: uart1@1 { 552 + uart1_pg_pins: uart1-pg-pins { 553 553 pins = "PG3", "PG4"; 554 554 function = "uart1"; 555 555 }; 556 556 557 - uart2_pins_a: uart2@0 { 557 + uart2_pd_pins: uart2-pd-pins { 558 558 pins = "PD2", "PD3"; 559 559 function = "uart2"; 560 560 }; 561 561 562 - uart2_cts_rts_pins_a: uart2-cts-rts@0 { 562 + uart2_cts_rts_pd_pins: uart2-cts-rts-pd-pins { 563 563 pins = "PD4", "PD5"; 564 564 function = "uart2"; 565 565 }; 566 566 567 - uart3_pins_a: uart3@0 { 567 + uart3_pg_pins: uart3-pg-pins { 568 568 pins = "PG9", "PG10"; 569 569 function = "uart3"; 570 570 }; 571 571 572 - uart3_cts_rts_pins_a: uart3-cts-rts@0 { 572 + uart3_cts_rts_pg_pins: uart3-cts-rts-pg-pins { 573 573 pins = "PG11", "PG12"; 574 574 function = "uart3"; 575 575 }; 576 576 577 - pwm0_pins: pwm0 { 577 + pwm0_pin: pwm0-pin { 578 578 pins = "PB2"; 579 579 function = "pwm"; 580 580 };