tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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Merge tag 'arm-soc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

ARM: fixes for ARM platforms

Some fallout from the 3.3. merge window as well as a couple bug fixes
for older preexisting bugs that seem valid to include at this time:

* sched_clock changes broke picoxcell, fix included
* BSYM bugs causing issues with thumb2-built kernels on SMP
* Missing module.h include on msm.
* A collection of bugfixes for samsung platforms that didn't make it into
the first pull requests.

* tag 'arm-soc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: make BSYM macro assembly only
ARM: highbank: remove incorrect BSYM usage
ARM: imx: remove incorrect BSYM usage
ARM: exynos: remove incorrect BSYM usage
ARM: ux500: add missing ENDPROC to headsmp.S
ARM: msm: Add missing ENDPROC to headsmp.S
ARM: versatile: Add missing ENDPROC to headsmp.S
ARM: EXYNOS: Invert VCLK polarity for framebuffer on ORIGEN
ARM: S3C64XX: Fix interrupt configuration for PCA935x on Cragganmore
ARM: S3C64XX: Fix the memory mapped GPIOs on Cragganmore
ARM: S3C64XX: Remove hsmmc1 from Cragganmore
ARM: S3C64XX: Remove unconditional power domain disables
ARM: SAMSUNG: Declare struct platform_device in plat/s3c64xx-spi.h
ARM: SAMSUNG: dma-ops.h needs mach/dma.h
ARM: SAMSUNG: Guard against multiple inclusion of plat/dma.h
ARM: picoxcell: fix sched_clock() cleanup fallout
ARM: msm: vreg is a module and so needs module.h

Linus Torvalds 6a488979 57f2685c

+30 -40
+2 -2
arch/arm/include/asm/unified.h
··· 37 37 #define THUMB(x...) x 38 38 #ifdef __ASSEMBLY__ 39 39 #define W(instr) instr.w 40 - #endif 41 40 #define BSYM(sym) sym + 1 41 + #endif 42 42 43 43 #else /* !CONFIG_THUMB2_KERNEL */ 44 44 ··· 49 49 #define THUMB(x...) 50 50 #ifdef __ASSEMBLY__ 51 51 #define W(instr) instr 52 - #endif 53 52 #define BSYM(sym) sym 53 + #endif 54 54 55 55 #endif /* CONFIG_THUMB2_KERNEL */ 56 56
+2
arch/arm/mach-exynos/headsmp.S
··· 36 36 * should now contain the SVC stack for this core 37 37 */ 38 38 b secondary_startup 39 + ENDPROC(exynos4_secondary_startup) 39 40 41 + .align 2 40 42 1: .long . 41 43 .long pen_release
+2 -1
arch/arm/mach-exynos/mach-origen.c
··· 597 597 static struct s3c_fb_platdata origen_lcd_pdata __initdata = { 598 598 .win[0] = &origen_fb_win0, 599 599 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB, 600 - .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC, 600 + .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC | 601 + VIDCON1_INV_VCLK, 601 602 .setup_gpio = exynos4_fimd0_gpio_setup_24bpp, 602 603 }; 603 604
+2 -3
arch/arm/mach-exynos/platsmp.c
··· 24 24 #include <asm/cacheflush.h> 25 25 #include <asm/hardware/gic.h> 26 26 #include <asm/smp_scu.h> 27 - #include <asm/unified.h> 28 27 29 28 #include <mach/hardware.h> 30 29 #include <mach/regs-clock.h> ··· 136 137 while (time_before(jiffies, timeout)) { 137 138 smp_rmb(); 138 139 139 - __raw_writel(BSYM(virt_to_phys(exynos4_secondary_startup)), 140 + __raw_writel(virt_to_phys(exynos4_secondary_startup), 140 141 CPU1_BOOT_REG); 141 142 gic_raise_softirq(cpumask_of(cpu), 1); 142 143 ··· 191 192 * until it receives a soft interrupt, and then the 192 193 * secondary CPU branches to this address. 193 194 */ 194 - __raw_writel(BSYM(virt_to_phys(exynos4_secondary_startup)), 195 + __raw_writel(virt_to_phys(exynos4_secondary_startup), 195 196 CPU1_BOOT_REG); 196 197 }
+1 -2
arch/arm/mach-highbank/highbank.c
··· 25 25 #include <linux/smp.h> 26 26 27 27 #include <asm/cacheflush.h> 28 - #include <asm/unified.h> 29 28 #include <asm/smp_scu.h> 30 29 #include <asm/hardware/arm_timer.h> 31 30 #include <asm/hardware/timer-sp.h> ··· 75 76 #ifdef CONFIG_SMP 76 77 cpu = cpu_logical_map(cpu); 77 78 #endif 78 - writel(BSYM(virt_to_phys(jump_addr)), HB_JUMP_TABLE_VIRT(cpu)); 79 + writel(virt_to_phys(jump_addr), HB_JUMP_TABLE_VIRT(cpu)); 79 80 __cpuc_flush_dcache_area(HB_JUMP_TABLE_VIRT(cpu), 16); 80 81 outer_clean_range(HB_JUMP_TABLE_PHYS(cpu), 81 82 HB_JUMP_TABLE_PHYS(cpu) + 15);
+1 -2
arch/arm/mach-imx/src.c
··· 15 15 #include <linux/of.h> 16 16 #include <linux/of_address.h> 17 17 #include <linux/smp.h> 18 - #include <asm/unified.h> 19 18 20 19 #define SRC_SCR 0x000 21 20 #define SRC_GPR1 0x020 ··· 42 43 void imx_set_cpu_jump(int cpu, void *jump_addr) 43 44 { 44 45 cpu = cpu_logical_map(cpu); 45 - writel_relaxed(BSYM(virt_to_phys(jump_addr)), 46 + writel_relaxed(virt_to_phys(jump_addr), 46 47 src_base + SRC_GPR1 + cpu * 8); 47 48 } 48 49
+1
arch/arm/mach-msm/headsmp.S
··· 34 34 * should now contain the SVC stack for this core 35 35 */ 36 36 b secondary_startup 37 + ENDPROC(msm_secondary_startup) 37 38 38 39 .align 39 40 1: .long .
+1
arch/arm/mach-msm/vreg.c
··· 19 19 #include <linux/device.h> 20 20 #include <linux/init.h> 21 21 #include <linux/debugfs.h> 22 + #include <linux/module.h> 22 23 #include <linux/string.h> 23 24 #include <mach/vreg.h> 24 25
+1 -1
arch/arm/mach-picoxcell/time.c
··· 67 67 68 68 static void __iomem *sched_io_base; 69 69 70 - unsigned u32 notrace picoxcell_read_sched_clock(void) 70 + static u32 picoxcell_read_sched_clock(void) 71 71 { 72 72 return __raw_readl(sched_io_base); 73 73 }
+1 -2
arch/arm/mach-realview/platsmp.c
··· 17 17 #include <asm/hardware/gic.h> 18 18 #include <asm/mach-types.h> 19 19 #include <asm/smp_scu.h> 20 - #include <asm/unified.h> 21 20 22 21 #include <mach/board-eb.h> 23 22 #include <mach/board-pb11mp.h> ··· 74 75 * until it receives a soft interrupt, and then the 75 76 * secondary CPU branches to this address. 76 77 */ 77 - __raw_writel(BSYM(virt_to_phys(versatile_secondary_startup)), 78 + __raw_writel(virt_to_phys(versatile_secondary_startup), 78 79 __io_address(REALVIEW_SYS_FLAGSSET)); 79 80 }
+1
arch/arm/mach-s3c64xx/include/mach/crag6410.h
··· 21 21 #define CODEC_GPIO_BASE (GPIO_BOARD_START + 8) 22 22 #define GLENFARCLAS_PMIC_GPIO_BASE (GPIO_BOARD_START + 32) 23 23 #define BANFF_PMIC_GPIO_BASE (GPIO_BOARD_START + 64) 24 + #define MMGPIO_GPIO_BASE (GPIO_BOARD_START + 96) 24 25 25 26 #endif
+3 -10
arch/arm/mach-s3c64xx/mach-crag6410.c
··· 260 260 261 261 static struct resource crag6410_mmgpio_resource[] = { 262 262 [0] = { 263 + .name = "dat", 263 264 .start = S3C64XX_PA_XM0CSN4 + 1, 264 265 .end = S3C64XX_PA_XM0CSN4 + 1, 265 266 .flags = IORESOURCE_MEM, ··· 273 272 .resource = crag6410_mmgpio_resource, 274 273 .num_resources = ARRAY_SIZE(crag6410_mmgpio_resource), 275 274 .dev.platform_data = &(struct bgpio_pdata) { 276 - .base = -1, 275 + .base = MMGPIO_GPIO_BASE, 277 276 }, 278 277 }; 279 278 ··· 329 328 330 329 static struct platform_device *crag6410_devices[] __initdata = { 331 330 &s3c_device_hsmmc0, 332 - &s3c_device_hsmmc1, 333 331 &s3c_device_hsmmc2, 334 332 &s3c_device_i2c0, 335 333 &s3c_device_i2c1, ··· 355 355 356 356 static struct pca953x_platform_data crag6410_pca_data = { 357 357 .gpio_base = PCA935X_GPIO_BASE, 358 - .irq_base = 0, 358 + .irq_base = -1, 359 359 }; 360 360 361 361 /* VDDARM is controlled by DVS1 connected to GPK(0) */ ··· 683 683 .cd_type = S3C_SDHCI_CD_PERMANENT, 684 684 }; 685 685 686 - static struct s3c_sdhci_platdata crag6410_hsmmc1_pdata = { 687 - .max_width = 4, 688 - .cd_type = S3C_SDHCI_CD_GPIO, 689 - .ext_cd_gpio = S3C64XX_GPF(11), 690 - }; 691 - 692 686 static void crag6410_cfg_sdhci0(struct platform_device *dev, int width) 693 687 { 694 688 /* Set all the necessary GPG pins to special-function 2 */ ··· 717 723 gpio_direction_output(S3C64XX_GPF(10), 1); 718 724 719 725 s3c_sdhci0_set_platdata(&crag6410_hsmmc0_pdata); 720 - s3c_sdhci1_set_platdata(&crag6410_hsmmc1_pdata); 721 726 s3c_sdhci2_set_platdata(&crag6410_hsmmc2_pdata); 722 727 723 728 s3c_i2c0_set_platdata(&i2c0_pdata);
-13
arch/arm/mach-s3c64xx/pm.c
··· 346 346 347 347 static __init int s3c64xx_pm_initcall(void) 348 348 { 349 - u32 val; 350 - 351 349 pm_cpu_prep = s3c64xx_pm_prepare; 352 350 pm_cpu_sleep = s3c64xx_cpu_suspend; 353 351 pm_uart_udivslot = 1; 354 - 355 - /* 356 - * Unconditionally disable power domains that contain only 357 - * blocks which have no mainline driver support. 358 - */ 359 - val = __raw_readl(S3C64XX_NORMAL_CFG); 360 - val &= ~(S3C64XX_NORMALCFG_DOMAIN_G_ON | 361 - S3C64XX_NORMALCFG_DOMAIN_V_ON | 362 - S3C64XX_NORMALCFG_DOMAIN_I_ON | 363 - S3C64XX_NORMALCFG_DOMAIN_P_ON); 364 - __raw_writel(val, S3C64XX_NORMAL_CFG); 365 352 366 353 #ifdef CONFIG_S3C_PM_DEBUG_LED_SMDK 367 354 gpio_request(S3C64XX_GPN(12), "DEBUG_LED0");
+2
arch/arm/mach-ux500/headsmp.S
··· 32 32 * should now contain the SVC stack for this core 33 33 */ 34 34 b secondary_startup 35 + ENDPROC(u8500_secondary_startup) 35 36 37 + .align 2 36 38 1: .long . 37 39 .long pen_release
+1 -3
arch/arm/mach-vexpress/platsmp.c
··· 13 13 #include <linux/smp.h> 14 14 #include <linux/io.h> 15 15 16 - #include <asm/unified.h> 17 - 18 16 #include <mach/motherboard.h> 19 17 #define V2M_PA_CS7 0x10000000 20 18 ··· 44 46 * secondary CPU branches to this address. 45 47 */ 46 48 writel(~0, MMIO_P2V(V2M_SYS_FLAGSCLR)); 47 - writel(BSYM(virt_to_phys(versatile_secondary_startup)), 49 + writel(virt_to_phys(versatile_secondary_startup), 48 50 MMIO_P2V(V2M_SYS_FLAGSSET)); 49 51 }
+1
arch/arm/plat-samsung/include/plat/dma-ops.h
··· 14 14 #define __SAMSUNG_DMA_OPS_H_ __FILE__ 15 15 16 16 #include <linux/dmaengine.h> 17 + #include <mach/dma.h> 17 18 18 19 struct samsung_dma_prep_info { 19 20 enum dma_transaction_type cap;
+5 -1
arch/arm/plat-samsung/include/plat/dma.h
··· 10 10 * published by the Free Software Foundation. 11 11 */ 12 12 13 + #ifndef __PLAT_DMA_H 14 + #define __PLAT_DMA_H 15 + 13 16 #include <linux/dma-mapping.h> 14 17 15 18 enum s3c2410_dma_buffresult { ··· 125 122 extern int s3c2410_dma_set_opfn(enum dma_ch, s3c2410_dma_opfn_t rtn); 126 123 extern int s3c2410_dma_set_buffdone_fn(enum dma_ch, s3c2410_dma_cbfn_t rtn); 127 124 128 - 129 125 #include <plat/dma-ops.h> 126 + 127 + #endif
+2
arch/arm/plat-samsung/include/plat/s3c64xx-spi.h
··· 11 11 #ifndef __S3C64XX_PLAT_SPI_H 12 12 #define __S3C64XX_PLAT_SPI_H 13 13 14 + struct platform_device; 15 + 14 16 /** 15 17 * struct s3c64xx_spi_csinfo - ChipSelect description 16 18 * @fb_delay: Slave specific feedback delay.
+1
arch/arm/plat-versatile/headsmp.S
··· 38 38 .align 39 39 1: .long . 40 40 .long pen_release 41 + ENDPROC(versatile_secondary_startup)