Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

arm64: Add HWCAP advertising FEAT_WFXT

In order to allow userspace to enjoy WFET, add a new HWCAP that
advertises it when available.

Signed-off-by: Marc Zyngier <maz@kernel.org>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Link: https://lore.kernel.org/r/20220419182755.601427-9-maz@kernel.org

+12
+2
Documentation/arm64/cpu-feature-registers.rst
··· 290 290 +------------------------------+---------+---------+ 291 291 | RPRES | [7-4] | y | 292 292 +------------------------------+---------+---------+ 293 + | WFXT | [3-0] | y | 294 + +------------------------------+---------+---------+ 293 295 294 296 295 297 Appendix I: Example
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Documentation/arm64/elf_hwcaps.rst
··· 264 264 Functionality implied by ID_AA64PFR1_EL1.MTE == 0b0011, as described 265 265 by Documentation/arm64/memory-tagging-extension.rst. 266 266 267 + HWCAP2_WFXT 268 + 269 + Functionality implied by ID_AA64ISAR2_EL1.WFXT == 0b0010. 270 + 267 271 4. Unused AT_HWCAP bits 268 272 ----------------------- 269 273
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arch/arm64/include/asm/hwcap.h
··· 109 109 #define KERNEL_HWCAP_AFP __khwcap2_feature(AFP) 110 110 #define KERNEL_HWCAP_RPRES __khwcap2_feature(RPRES) 111 111 #define KERNEL_HWCAP_MTE3 __khwcap2_feature(MTE3) 112 + #define KERNEL_HWCAP_WFXT __khwcap2_feature(WFXT) 112 113 113 114 /* 114 115 * This yields a mask that user programs can use to figure out what
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arch/arm64/include/uapi/asm/hwcap.h
··· 79 79 #define HWCAP2_AFP (1 << 20) 80 80 #define HWCAP2_RPRES (1 << 21) 81 81 #define HWCAP2_MTE3 (1 << 22) 82 + #define HWCAP2_WFXT (1 << 23) 82 83 83 84 #endif /* _UAPI__ASM_HWCAP_H */
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arch/arm64/kernel/cpufeature.c
··· 237 237 ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_PTR_AUTH), 238 238 FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR2_GPA3_SHIFT, 4, 0), 239 239 ARM64_FTR_BITS(FTR_VISIBLE, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64ISAR2_RPRES_SHIFT, 4, 0), 240 + ARM64_FTR_BITS(FTR_VISIBLE, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64ISAR2_WFXT_SHIFT, 4, 0), 240 241 ARM64_FTR_END, 241 242 }; 242 243 ··· 2576 2575 HWCAP_CAP(SYS_ID_AA64MMFR0_EL1, ID_AA64MMFR0_ECV_SHIFT, 4, FTR_UNSIGNED, 1, CAP_HWCAP, KERNEL_HWCAP_ECV), 2577 2576 HWCAP_CAP(SYS_ID_AA64MMFR1_EL1, ID_AA64MMFR1_AFP_SHIFT, 4, FTR_UNSIGNED, 1, CAP_HWCAP, KERNEL_HWCAP_AFP), 2578 2577 HWCAP_CAP(SYS_ID_AA64ISAR2_EL1, ID_AA64ISAR2_RPRES_SHIFT, 4, FTR_UNSIGNED, 1, CAP_HWCAP, KERNEL_HWCAP_RPRES), 2578 + HWCAP_CAP(SYS_ID_AA64ISAR2_EL1, ID_AA64ISAR2_WFXT_SHIFT, 4, FTR_UNSIGNED, ID_AA64ISAR2_WFXT_SUPPORTED, CAP_HWCAP, KERNEL_HWCAP_WFXT), 2579 2579 {}, 2580 2580 }; 2581 2581
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arch/arm64/kernel/cpuinfo.c
··· 98 98 [KERNEL_HWCAP_AFP] = "afp", 99 99 [KERNEL_HWCAP_RPRES] = "rpres", 100 100 [KERNEL_HWCAP_MTE3] = "mte3", 101 + [KERNEL_HWCAP_WFXT] = "wfxt", 101 102 }; 102 103 103 104 #ifdef CONFIG_COMPAT
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arch/arm64/tools/cpucaps
··· 38 38 HAS_SYSREG_GIC_CPUIF 39 39 HAS_TLB_RANGE 40 40 HAS_VIRT_HOST_EXTN 41 + HAS_WFXT 41 42 HW_DBM 42 43 KVM_PROTECTED_MODE 43 44 MISMATCHED_CACHE_TYPE