Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'iio-for-3.8a' of git://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into staging-next

First round of new IIO drivers and cleanups for the 3.8 cycle.

Here we have

* New driver ad5449 with the introduction of a new IIO return type
to simplify power of 2 dividers (extremely common case).
* Some coccinelle warning fixing patches (dull but worthwhile as
make for easier automated testing and cut down on false positives).
* Some trivial bits of formatting cleanup and spelling corrections.
* Use kcalloc in a few places for semantic reasons.
* Stop lis3l02dq driver (soon to be dropped I hope) using now non
existent irq_to_gpio.
* Some dead code/unused variable removal
* Convert a few drivers to generic core provided functions instead
of their own versions.

So all in all a nice new driver and a lot of worthy but dull cleanup.

+486 -96
+1 -1
drivers/iio/accel/Kconfig
··· 8 8 select IIO_BUFFER 9 9 select IIO_TRIGGERED_BUFFER 10 10 select HID_SENSOR_IIO_COMMON 11 - tristate "HID Acelerometers 3D" 11 + tristate "HID Accelerometers 3D" 12 12 help 13 13 Say yes here to build support for the HID SENSOR 14 14 accelerometers 3D.
+7 -14
drivers/iio/adc/at91_adc.c
··· 46 46 struct clk *clk; 47 47 bool done; 48 48 int irq; 49 - bool irq_enabled; 50 49 u16 last_value; 51 50 struct mutex lock; 52 51 u8 num_channels; ··· 81 82 *timestamp = pf->timestamp; 82 83 } 83 84 84 - buffer->access->store_to(buffer, (u8 *)st->buffer); 85 + iio_push_to_buffer(buffer, st->buffer); 85 86 86 87 iio_trigger_notify_done(idev->trig); 87 - st->irq_enabled = true; 88 88 89 89 /* Needed to ACK the DRDY interruption */ 90 90 at91_adc_readl(st, AT91_ADC_LCDR); ··· 104 106 105 107 if (iio_buffer_enabled(idev)) { 106 108 disable_irq_nosync(irq); 107 - st->irq_enabled = false; 108 109 iio_trigger_poll(idev->trig, iio_get_time_ns()); 109 110 } else { 110 111 st->last_value = at91_adc_readl(st, AT91_ADC_LCDR); ··· 123 126 idev->num_channels = bitmap_weight(&st->channels_mask, 124 127 st->num_channels) + 1; 125 128 126 - chan_array = devm_kzalloc(&idev->dev, 127 - ((idev->num_channels + 1) * 128 - sizeof(struct iio_chan_spec)), 129 - GFP_KERNEL); 129 + chan_array = devm_kcalloc(&idev->dev, idev->num_channels + 1, 130 + sizeof(*chan_array), GFP_KERNEL); 130 131 131 132 if (!chan_array) 132 133 return -ENOMEM; ··· 268 273 struct at91_adc_state *st = iio_priv(idev); 269 274 int i, ret; 270 275 271 - st->trig = devm_kzalloc(&idev->dev, 272 - st->trigger_number * sizeof(st->trig), 273 - GFP_KERNEL); 276 + st->trig = devm_kcalloc(&idev->dev, st->trigger_number, 277 + sizeof(*st->trig), GFP_KERNEL); 274 278 275 279 if (st->trig == NULL) { 276 280 ret = -ENOMEM; ··· 451 457 st->registers->trigger_register = prop; 452 458 453 459 st->trigger_number = of_get_child_count(node); 454 - st->trigger_list = devm_kzalloc(&idev->dev, st->trigger_number * 455 - sizeof(struct at91_adc_trigger), 456 - GFP_KERNEL); 460 + st->trigger_list = devm_kcalloc(&idev->dev, st->trigger_number, 461 + sizeof(*st->trigger_list), GFP_KERNEL); 457 462 if (!st->trigger_list) { 458 463 dev_err(&idev->dev, "Could not allocate trigger list memory.\n"); 459 464 ret = -ENOMEM;
+10
drivers/iio/dac/Kconfig
··· 67 67 To compile this driver as a module, choose M here: the 68 68 module will be called ad5446. 69 69 70 + config AD5449 71 + tristate "Analog Device AD5449 and similar DACs driver" 72 + depends on SPI_MASTER 73 + help 74 + Say yes here to build support for Analog Devices AD5415, AD5426, AD5429, 75 + AD5432, AD5439, AD5443, AD5449 Digital to Analog Converters. 76 + 77 + To compile this driver as a module, choose M here: the 78 + module will be called ad5449. 79 + 70 80 config AD5504 71 81 tristate "Analog Devices AD5504/AD5501 DAC SPI driver" 72 82 depends on SPI
+1
drivers/iio/dac/Makefile
··· 9 9 obj-$(CONFIG_AD5064) += ad5064.o 10 10 obj-$(CONFIG_AD5504) += ad5504.o 11 11 obj-$(CONFIG_AD5446) += ad5446.o 12 + obj-$(CONFIG_AD5449) += ad5449.o 12 13 obj-$(CONFIG_AD5755) += ad5755.o 13 14 obj-$(CONFIG_AD5764) += ad5764.o 14 15 obj-$(CONFIG_AD5791) += ad5791.o
+375
drivers/iio/dac/ad5449.c
··· 1 + /* 2 + * AD5415, AD5426, AD5429, AD5432, AD5439, AD5443, AD5449 Digital to Analog 3 + * Converter driver. 4 + * 5 + * Copyright 2012 Analog Devices Inc. 6 + * Author: Lars-Peter Clausen <lars@metafoo.de> 7 + * 8 + * Licensed under the GPL-2. 9 + */ 10 + 11 + #include <linux/device.h> 12 + #include <linux/err.h> 13 + #include <linux/module.h> 14 + #include <linux/kernel.h> 15 + #include <linux/spi/spi.h> 16 + #include <linux/slab.h> 17 + #include <linux/sysfs.h> 18 + #include <linux/regulator/consumer.h> 19 + #include <asm/unaligned.h> 20 + 21 + #include <linux/iio/iio.h> 22 + #include <linux/iio/sysfs.h> 23 + 24 + #include <linux/platform_data/ad5449.h> 25 + 26 + #define AD5449_MAX_CHANNELS 2 27 + #define AD5449_MAX_VREFS 2 28 + 29 + #define AD5449_CMD_NOOP 0x0 30 + #define AD5449_CMD_LOAD_AND_UPDATE(x) (0x1 + (x) * 3) 31 + #define AD5449_CMD_READ(x) (0x2 + (x) * 3) 32 + #define AD5449_CMD_LOAD(x) (0x3 + (x) * 3) 33 + #define AD5449_CMD_CTRL 13 34 + 35 + #define AD5449_CTRL_SDO_OFFSET 10 36 + #define AD5449_CTRL_DAISY_CHAIN BIT(9) 37 + #define AD5449_CTRL_HCLR_TO_MIDSCALE BIT(8) 38 + #define AD5449_CTRL_SAMPLE_RISING BIT(7) 39 + 40 + /** 41 + * struct ad5449_chip_info - chip specific information 42 + * @channels: Channel specification 43 + * @num_channels: Number of channels 44 + * @has_ctrl: Chip has a control register 45 + */ 46 + struct ad5449_chip_info { 47 + const struct iio_chan_spec *channels; 48 + unsigned int num_channels; 49 + bool has_ctrl; 50 + }; 51 + 52 + /** 53 + * struct ad5449 - driver instance specific data 54 + * @spi: the SPI device for this driver instance 55 + * @chip_info: chip model specific constants, available modes etc 56 + * @vref_reg: vref supply regulators 57 + * @has_sdo: whether the SDO line is connected 58 + * @dac_cache: Cache for the DAC values 59 + * @data: spi transfer buffers 60 + */ 61 + struct ad5449 { 62 + struct spi_device *spi; 63 + const struct ad5449_chip_info *chip_info; 64 + struct regulator_bulk_data vref_reg[AD5449_MAX_VREFS]; 65 + 66 + bool has_sdo; 67 + uint16_t dac_cache[AD5449_MAX_CHANNELS]; 68 + 69 + /* 70 + * DMA (thus cache coherency maintenance) requires the 71 + * transfer buffers to live in their own cache lines. 72 + */ 73 + __be16 data[2] ____cacheline_aligned; 74 + }; 75 + 76 + enum ad5449_type { 77 + ID_AD5426, 78 + ID_AD5429, 79 + ID_AD5432, 80 + ID_AD5439, 81 + ID_AD5443, 82 + ID_AD5449, 83 + }; 84 + 85 + static int ad5449_write(struct iio_dev *indio_dev, unsigned int addr, 86 + unsigned int val) 87 + { 88 + struct ad5449 *st = iio_priv(indio_dev); 89 + int ret; 90 + 91 + mutex_lock(&indio_dev->mlock); 92 + st->data[0] = cpu_to_be16((addr << 12) | val); 93 + ret = spi_write(st->spi, st->data, 2); 94 + mutex_unlock(&indio_dev->mlock); 95 + 96 + return ret; 97 + } 98 + 99 + static int ad5449_read(struct iio_dev *indio_dev, unsigned int addr, 100 + unsigned int *val) 101 + { 102 + struct ad5449 *st = iio_priv(indio_dev); 103 + int ret; 104 + struct spi_message msg; 105 + struct spi_transfer t[] = { 106 + { 107 + .tx_buf = &st->data[0], 108 + .len = 2, 109 + .cs_change = 1, 110 + }, { 111 + .tx_buf = &st->data[1], 112 + .rx_buf = &st->data[1], 113 + .len = 2, 114 + }, 115 + }; 116 + 117 + spi_message_init(&msg); 118 + spi_message_add_tail(&t[0], &msg); 119 + spi_message_add_tail(&t[1], &msg); 120 + 121 + mutex_lock(&indio_dev->mlock); 122 + st->data[0] = cpu_to_be16(addr << 12); 123 + st->data[1] = cpu_to_be16(AD5449_CMD_NOOP); 124 + 125 + ret = spi_sync(st->spi, &msg); 126 + if (ret < 0) 127 + return ret; 128 + 129 + *val = be16_to_cpu(st->data[1]); 130 + mutex_unlock(&indio_dev->mlock); 131 + 132 + return 0; 133 + } 134 + 135 + static int ad5449_read_raw(struct iio_dev *indio_dev, 136 + struct iio_chan_spec const *chan, int *val, int *val2, long info) 137 + { 138 + struct ad5449 *st = iio_priv(indio_dev); 139 + struct regulator_bulk_data *reg; 140 + int scale_uv; 141 + int ret; 142 + 143 + switch (info) { 144 + case IIO_CHAN_INFO_RAW: 145 + if (st->has_sdo) { 146 + ret = ad5449_read(indio_dev, 147 + AD5449_CMD_READ(chan->address), val); 148 + if (ret) 149 + return ret; 150 + *val &= 0xfff; 151 + } else { 152 + *val = st->dac_cache[chan->address]; 153 + } 154 + 155 + return IIO_VAL_INT; 156 + case IIO_CHAN_INFO_SCALE: 157 + reg = &st->vref_reg[chan->channel]; 158 + scale_uv = regulator_get_voltage(reg->consumer); 159 + if (scale_uv < 0) 160 + return scale_uv; 161 + 162 + *val = scale_uv / 1000; 163 + *val2 = chan->scan_type.realbits; 164 + 165 + return IIO_VAL_FRACTIONAL_LOG2; 166 + default: 167 + break; 168 + } 169 + 170 + return -EINVAL; 171 + } 172 + 173 + static int ad5449_write_raw(struct iio_dev *indio_dev, 174 + struct iio_chan_spec const *chan, int val, int val2, long info) 175 + { 176 + struct ad5449 *st = iio_priv(indio_dev); 177 + int ret; 178 + 179 + switch (info) { 180 + case IIO_CHAN_INFO_RAW: 181 + if (val < 0 || val >= (1 << chan->scan_type.realbits)) 182 + return -EINVAL; 183 + 184 + ret = ad5449_write(indio_dev, 185 + AD5449_CMD_LOAD_AND_UPDATE(chan->address), 186 + val << chan->scan_type.shift); 187 + if (ret == 0) 188 + st->dac_cache[chan->address] = val; 189 + break; 190 + default: 191 + ret = -EINVAL; 192 + } 193 + 194 + return ret; 195 + } 196 + 197 + static const struct iio_info ad5449_info = { 198 + .read_raw = ad5449_read_raw, 199 + .write_raw = ad5449_write_raw, 200 + .driver_module = THIS_MODULE, 201 + }; 202 + 203 + #define AD5449_CHANNEL(chan, bits) { \ 204 + .type = IIO_VOLTAGE, \ 205 + .indexed = 1, \ 206 + .output = 1, \ 207 + .channel = (chan), \ 208 + .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \ 209 + IIO_CHAN_INFO_SCALE_SEPARATE_BIT, \ 210 + .address = (chan), \ 211 + .scan_type = IIO_ST('u', (bits), 16, 12 - (bits)), \ 212 + } 213 + 214 + #define DECLARE_AD5449_CHANNELS(name, bits) \ 215 + const struct iio_chan_spec name[] = { \ 216 + AD5449_CHANNEL(0, bits), \ 217 + AD5449_CHANNEL(1, bits), \ 218 + } 219 + 220 + static DECLARE_AD5449_CHANNELS(ad5429_channels, 8); 221 + static DECLARE_AD5449_CHANNELS(ad5439_channels, 10); 222 + static DECLARE_AD5449_CHANNELS(ad5449_channels, 12); 223 + 224 + static const struct ad5449_chip_info ad5449_chip_info[] = { 225 + [ID_AD5426] = { 226 + .channels = ad5429_channels, 227 + .num_channels = 1, 228 + .has_ctrl = false, 229 + }, 230 + [ID_AD5429] = { 231 + .channels = ad5429_channels, 232 + .num_channels = 2, 233 + .has_ctrl = true, 234 + }, 235 + [ID_AD5432] = { 236 + .channels = ad5439_channels, 237 + .num_channels = 1, 238 + .has_ctrl = false, 239 + }, 240 + [ID_AD5439] = { 241 + .channels = ad5439_channels, 242 + .num_channels = 2, 243 + .has_ctrl = true, 244 + }, 245 + [ID_AD5443] = { 246 + .channels = ad5449_channels, 247 + .num_channels = 1, 248 + .has_ctrl = false, 249 + }, 250 + [ID_AD5449] = { 251 + .channels = ad5449_channels, 252 + .num_channels = 2, 253 + .has_ctrl = true, 254 + }, 255 + }; 256 + 257 + static const char *ad5449_vref_name(struct ad5449 *st, int n) 258 + { 259 + if (st->chip_info->num_channels == 1) 260 + return "VREF"; 261 + 262 + if (n == 0) 263 + return "VREFA"; 264 + else 265 + return "VREFB"; 266 + } 267 + 268 + static int __devinit ad5449_spi_probe(struct spi_device *spi) 269 + { 270 + struct ad5449_platform_data *pdata = spi->dev.platform_data; 271 + const struct spi_device_id *id = spi_get_device_id(spi); 272 + struct iio_dev *indio_dev; 273 + struct ad5449 *st; 274 + unsigned int i; 275 + int ret; 276 + 277 + indio_dev = iio_device_alloc(sizeof(*st)); 278 + if (indio_dev == NULL) 279 + return -ENOMEM; 280 + 281 + st = iio_priv(indio_dev); 282 + spi_set_drvdata(spi, indio_dev); 283 + 284 + st->chip_info = &ad5449_chip_info[id->driver_data]; 285 + st->spi = spi; 286 + 287 + for (i = 0; i < st->chip_info->num_channels; ++i) 288 + st->vref_reg[i].supply = ad5449_vref_name(st, i); 289 + 290 + ret = regulator_bulk_get(&spi->dev, st->chip_info->num_channels, 291 + st->vref_reg); 292 + if (ret) 293 + goto error_free; 294 + 295 + ret = regulator_bulk_enable(st->chip_info->num_channels, st->vref_reg); 296 + if (ret) 297 + goto error_free_reg; 298 + 299 + indio_dev->dev.parent = &spi->dev; 300 + indio_dev->name = id->name; 301 + indio_dev->info = &ad5449_info; 302 + indio_dev->modes = INDIO_DIRECT_MODE; 303 + indio_dev->channels = st->chip_info->channels; 304 + indio_dev->num_channels = st->chip_info->num_channels; 305 + 306 + if (st->chip_info->has_ctrl) { 307 + unsigned int ctrl = 0x00; 308 + if (pdata) { 309 + if (pdata->hardware_clear_to_midscale) 310 + ctrl |= AD5449_CTRL_HCLR_TO_MIDSCALE; 311 + ctrl |= pdata->sdo_mode << AD5449_CTRL_SDO_OFFSET; 312 + st->has_sdo = pdata->sdo_mode != AD5449_SDO_DISABLED; 313 + } else { 314 + st->has_sdo = true; 315 + } 316 + ad5449_write(indio_dev, AD5449_CMD_CTRL, ctrl); 317 + } 318 + 319 + ret = iio_device_register(indio_dev); 320 + if (ret) 321 + goto error_disable_reg; 322 + 323 + return 0; 324 + 325 + error_disable_reg: 326 + regulator_bulk_disable(st->chip_info->num_channels, st->vref_reg); 327 + error_free_reg: 328 + regulator_bulk_free(st->chip_info->num_channels, st->vref_reg); 329 + error_free: 330 + iio_device_free(indio_dev); 331 + 332 + return ret; 333 + } 334 + 335 + static int __devexit ad5449_spi_remove(struct spi_device *spi) 336 + { 337 + struct iio_dev *indio_dev = spi_get_drvdata(spi); 338 + struct ad5449 *st = iio_priv(indio_dev); 339 + 340 + iio_device_unregister(indio_dev); 341 + 342 + regulator_bulk_disable(st->chip_info->num_channels, st->vref_reg); 343 + regulator_bulk_free(st->chip_info->num_channels, st->vref_reg); 344 + 345 + iio_device_free(indio_dev); 346 + 347 + return 0; 348 + } 349 + 350 + static const struct spi_device_id ad5449_spi_ids[] = { 351 + { "ad5415", ID_AD5449 }, 352 + { "ad5426", ID_AD5426 }, 353 + { "ad5429", ID_AD5429 }, 354 + { "ad5432", ID_AD5432 }, 355 + { "ad5439", ID_AD5439 }, 356 + { "ad5443", ID_AD5443 }, 357 + { "ad5449", ID_AD5449 }, 358 + {} 359 + }; 360 + MODULE_DEVICE_TABLE(spi, ad5449_spi_ids); 361 + 362 + static struct spi_driver ad5449_spi_driver = { 363 + .driver = { 364 + .name = "ad5449", 365 + .owner = THIS_MODULE, 366 + }, 367 + .probe = ad5449_spi_probe, 368 + .remove = __devexit_p(ad5449_spi_remove), 369 + .id_table = ad5449_spi_ids, 370 + }; 371 + module_spi_driver(ad5449_spi_driver); 372 + 373 + MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>"); 374 + MODULE_DESCRIPTION("Analog Devices AD5449 and similar DACs"); 375 + MODULE_LICENSE("GPL v2");
+1 -1
drivers/iio/dac/ad5686.c
··· 188 188 if (ret) 189 189 return ret; 190 190 191 - if (readin == true) 191 + if (readin) 192 192 st->pwr_down_mask |= (0x3 << (chan->channel * 2)); 193 193 else 194 194 st->pwr_down_mask &= ~(0x3 << (chan->channel * 2));
+3 -3
drivers/iio/industrialio-buffer.c
··· 371 371 const char *buf, 372 372 size_t len) 373 373 { 374 - int ret; 375 - ulong val; 376 374 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 377 375 struct iio_buffer *buffer = indio_dev->buffer; 376 + unsigned int val; 377 + int ret; 378 378 379 - ret = strict_strtoul(buf, 10, &val); 379 + ret = kstrtouint(buf, 10, &val); 380 380 if (ret) 381 381 return ret; 382 382
+5
drivers/iio/industrialio-core.c
··· 397 397 val2 = do_div(tmp, 1000000000LL); 398 398 val = tmp; 399 399 return sprintf(buf, "%d.%09u\n", val, val2); 400 + case IIO_VAL_FRACTIONAL_LOG2: 401 + tmp = (s64)val * 1000000000LL >> val2; 402 + val2 = do_div(tmp, 1000000000LL); 403 + val = tmp; 404 + return sprintf(buf, "%d.%09u\n", val, val2); 400 405 default: 401 406 return 0; 402 407 }
+2 -2
drivers/iio/industrialio-event.c
··· 239 239 { 240 240 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 241 241 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); 242 - unsigned long val; 242 + int val; 243 243 int ret; 244 244 245 245 if (!indio_dev->info->write_event_value) 246 246 return -EINVAL; 247 247 248 - ret = strict_strtoul(buf, 10, &val); 248 + ret = kstrtoint(buf, 10, &val); 249 249 if (ret) 250 250 return ret; 251 251
+4 -1
drivers/iio/inkern.c
··· 78 78 found_it = true; 79 79 break; 80 80 } 81 - if (found_it == false) { 81 + if (!found_it) { 82 82 ret = -ENODEV; 83 83 goto error_ret; 84 84 } ··· 313 313 case IIO_VAL_FRACTIONAL: 314 314 *processed = div_s64(raw64 * (s64)scale_val * scale, 315 315 scale_val2); 316 + break; 317 + case IIO_VAL_FRACTIONAL_LOG2: 318 + *processed = (raw64 * (s64)scale_val * scale) >> scale_val2; 316 319 break; 317 320 default: 318 321 return -EINVAL;
+2 -2
drivers/staging/iio/accel/adis16201_core.c
··· 345 345 break; 346 346 default: 347 347 return -EINVAL; 348 - }; 348 + } 349 349 mutex_lock(&indio_dev->mlock); 350 350 addr = adis16201_addresses[chan->address][1]; 351 351 ret = adis16201_spi_read_reg_16(indio_dev, addr, &val16); ··· 382 382 break; 383 383 default: 384 384 return -EINVAL; 385 - }; 385 + } 386 386 val16 = val & ((1 << bits) - 1); 387 387 addr = adis16201_addresses[chan->address][1]; 388 388 return adis16201_spi_write_reg_16(indio_dev, addr, val16);
-2
drivers/staging/iio/accel/adis16203_core.c
··· 21 21 22 22 #include "adis16203.h" 23 23 24 - #define DRIVER_NAME "adis16203" 25 - 26 24 /** 27 25 * adis16203_spi_write_reg_8() - write single byte to a register 28 26 * @indio_dev: iio device associated with child of actual device
+1 -3
drivers/staging/iio/accel/adis16204_core.c
··· 24 24 25 25 #include "adis16204.h" 26 26 27 - #define DRIVER_NAME "adis16204" 28 - 29 27 /** 30 28 * adis16204_spi_write_reg_8() - write single byte to a register 31 29 * @dev: device associated with child of actual device (iio_dev or iio_trig) ··· 387 389 break; 388 390 default: 389 391 return -EINVAL; 390 - }; 392 + } 391 393 val16 = val & ((1 << bits) - 1); 392 394 addr = adis16204_addresses[chan->address][1]; 393 395 return adis16204_spi_write_reg_16(indio_dev, addr, val16);
+2 -4
drivers/staging/iio/accel/adis16209_core.c
··· 22 22 23 23 #include "adis16209.h" 24 24 25 - #define DRIVER_NAME "adis16209" 26 - 27 25 /** 28 26 * adis16209_spi_write_reg_8() - write single byte to a register 29 27 * @indio_dev: iio device associated with actual device ··· 293 295 break; 294 296 default: 295 297 return -EINVAL; 296 - }; 298 + } 297 299 val16 = val & ((1 << bits) - 1); 298 300 addr = adis16209_addresses[chan->address][1]; 299 301 return adis16209_spi_write_reg_16(indio_dev, addr, val16); ··· 371 373 break; 372 374 default: 373 375 return -EINVAL; 374 - }; 376 + } 375 377 mutex_lock(&indio_dev->mlock); 376 378 addr = adis16209_addresses[chan->address][1]; 377 379 ret = adis16209_spi_read_reg_16(indio_dev, addr, &val16);
+1 -10
drivers/staging/iio/accel/adis16209_trigger.c
··· 8 8 #include "adis16209.h" 9 9 10 10 /** 11 - * adis16209_data_rdy_trig_poll() the event handler for the data rdy trig 12 - **/ 13 - static irqreturn_t adis16209_data_rdy_trig_poll(int irq, void *trig) 14 - { 15 - iio_trigger_poll(trig, iio_get_time_ns()); 16 - return IRQ_HANDLED; 17 - } 18 - 19 - /** 20 11 * adis16209_data_rdy_trigger_set_state() set datardy interrupt state 21 12 **/ 22 13 static int adis16209_data_rdy_trigger_set_state(struct iio_trigger *trig, ··· 36 45 } 37 46 38 47 ret = request_irq(st->us->irq, 39 - adis16209_data_rdy_trig_poll, 48 + iio_trigger_generic_data_rdy_poll, 40 49 IRQF_TRIGGER_RISING, 41 50 "adis16209", 42 51 st->trig);
-2
drivers/staging/iio/accel/adis16220_core.c
··· 20 20 21 21 #include "adis16220.h" 22 22 23 - #define DRIVER_NAME "adis16220" 24 - 25 23 /** 26 24 * adis16220_spi_write_reg_8() - write single byte to a register 27 25 * @indio_dev: iio device associated with child of actual device
-2
drivers/staging/iio/accel/adis16240_core.c
··· 25 25 26 26 #include "adis16240.h" 27 27 28 - #define DRIVER_NAME "adis16240" 29 - 30 28 static int adis16240_check_status(struct iio_dev *indio_dev); 31 29 32 30 /**
+1 -10
drivers/staging/iio/accel/adis16240_trigger.c
··· 8 8 #include "adis16240.h" 9 9 10 10 /** 11 - * adis16240_data_rdy_trig_poll() the event handler for the data rdy trig 12 - **/ 13 - static irqreturn_t adis16240_data_rdy_trig_poll(int irq, void *trig) 14 - { 15 - iio_trigger_poll(trig, iio_get_time_ns()); 16 - return IRQ_HANDLED; 17 - } 18 - 19 - /** 20 11 * adis16240_data_rdy_trigger_set_state() set datardy interrupt state 21 12 **/ 22 13 static int adis16240_data_rdy_trigger_set_state(struct iio_trigger *trig, ··· 36 45 } 37 46 38 47 ret = request_irq(st->us->irq, 39 - adis16240_data_rdy_trig_poll, 48 + iio_trigger_generic_data_rdy_poll, 40 49 IRQF_TRIGGER_RISING, 41 50 "adis16240", 42 51 st->trig);
+1 -1
drivers/staging/iio/accel/kxsd9.c
··· 171 171 *val2 = kxsd9_micro_scales[ret & KXSD9_FS_MASK]; 172 172 ret = IIO_VAL_INT_PLUS_MICRO; 173 173 break; 174 - }; 174 + } 175 175 176 176 error_ret: 177 177 return ret;
+1
drivers/staging/iio/accel/lis3l02dq.h
··· 158 158 struct spi_device *us; 159 159 struct iio_trigger *trig; 160 160 struct mutex buf_lock; 161 + int gpio; 161 162 bool trigger_on; 162 163 163 164 u8 tx[LIS3L02DQ_MAX_RX] ____cacheline_aligned;
+6 -4
drivers/staging/iio/accel/lis3l02dq_core.c
··· 15 15 #include <linux/interrupt.h> 16 16 #include <linux/irq.h> 17 17 #include <linux/gpio.h> 18 + #include <linux/of_gpio.h> 18 19 #include <linux/mutex.h> 19 20 #include <linux/device.h> 20 21 #include <linux/kernel.h> ··· 691 690 spi_set_drvdata(spi, indio_dev); 692 691 693 692 st->us = spi; 693 + st->gpio = of_get_gpio(spi->dev.of_node, 0); 694 694 mutex_init(&st->buf_lock); 695 695 indio_dev->name = spi->dev.driver->name; 696 696 indio_dev->dev.parent = &spi->dev; ··· 713 711 goto error_unreg_buffer_funcs; 714 712 } 715 713 716 - if (spi->irq && gpio_is_valid(irq_to_gpio(spi->irq)) > 0) { 714 + if (spi->irq) { 717 715 ret = request_threaded_irq(st->us->irq, 718 716 &lis3l02dq_th, 719 717 &lis3l02dq_event_handler, ··· 740 738 return 0; 741 739 742 740 error_remove_trigger: 743 - if (spi->irq && gpio_is_valid(irq_to_gpio(spi->irq))) 741 + if (spi->irq) 744 742 lis3l02dq_remove_trigger(indio_dev); 745 743 error_free_interrupt: 746 - if (spi->irq && gpio_is_valid(irq_to_gpio(spi->irq)) > 0) 744 + if (spi->irq) 747 745 free_irq(st->us->irq, indio_dev); 748 746 error_uninitialize_buffer: 749 747 iio_buffer_unregister(indio_dev); ··· 792 790 lis3l02dq_disable_all_events(indio_dev); 793 791 lis3l02dq_stop_device(indio_dev); 794 792 795 - if (spi->irq && gpio_is_valid(irq_to_gpio(spi->irq)) > 0) 793 + if (spi->irq) 796 794 free_irq(st->us->irq, indio_dev); 797 795 798 796 lis3l02dq_remove_trigger(indio_dev);
+2 -2
drivers/staging/iio/accel/lis3l02dq_ring.c
··· 237 237 u8 t; 238 238 239 239 __lis3l02dq_write_data_ready_config(indio_dev, state); 240 - if (state == false) { 240 + if (!state) { 241 241 /* 242 242 * A possible quirk with the handler is currently worked around 243 243 * by ensuring outstanding read events are cleared. ··· 263 263 /* If gpio still high (or high again) 264 264 * In theory possible we will need to do this several times */ 265 265 for (i = 0; i < 5; i++) 266 - if (gpio_get_value(irq_to_gpio(st->us->irq))) 266 + if (gpio_get_value(st->gpio)) 267 267 lis3l02dq_read_all(indio_dev, NULL); 268 268 else 269 269 break;
+1 -1
drivers/staging/iio/adc/lpc32xx_adc.c
··· 150 150 151 151 info = iio_priv(iodev); 152 152 153 - info->adc_base = ioremap(res->start, res->end - res->start + 1); 153 + info->adc_base = ioremap(res->start, resource_size(res)); 154 154 if (!info->adc_base) { 155 155 dev_err(&pdev->dev, "failed mapping memory\n"); 156 156 retval = -EBUSY;
+1 -1
drivers/staging/iio/adc/mxs-lradc.c
··· 351 351 writel(chan_value, lradc->base + LRADC_CH(ofs)); 352 352 enable |= 1 << ofs; 353 353 ofs++; 354 - }; 354 + } 355 355 356 356 writel(LRADC_DELAY_TRIGGER_LRADCS_MASK | LRADC_DELAY_KICK, 357 357 lradc->base + LRADC_DELAY(0) + STMP_OFFSET_REG_CLR);
+6 -6
drivers/staging/iio/cdc/ad7150.c
··· 156 156 return !adaptive && (threshtype == 0x1); 157 157 else 158 158 return !adaptive && (threshtype == 0x0); 159 - }; 159 + } 160 160 return -EINVAL; 161 161 } 162 162 ··· 194 194 break; 195 195 default: 196 196 return -EINVAL; 197 - }; 197 + } 198 198 ret = i2c_smbus_write_byte_data(chip->client, 199 199 ad7150_addresses[chan][4], 200 200 sens); ··· 257 257 default: 258 258 ret = -EINVAL; 259 259 goto error_ret; 260 - }; 260 + } 261 261 262 262 cfg |= (!adaptive << 7) | (thresh_type << 5); 263 263 ··· 327 327 default: 328 328 ret = -EINVAL; 329 329 goto error_ret; 330 - }; 330 + } 331 331 332 332 /* write back if active */ 333 333 ret = ad7150_write_event_params(indio_dev, event_code); ··· 360 360 break; 361 361 default: 362 362 return -EINVAL; 363 - }; 363 + } 364 364 365 365 return sprintf(buf, "%d\n", value); 366 366 } ··· 394 394 default: 395 395 ret = -EINVAL; 396 396 goto error_ret; 397 - }; 397 + } 398 398 399 399 ret = ad7150_write_event_params(indio_dev, this_attr->address); 400 400 error_ret:
+1 -1
drivers/staging/iio/cdc/ad7152.c
··· 405 405 break; 406 406 default: 407 407 ret = -EINVAL; 408 - }; 408 + } 409 409 out: 410 410 mutex_unlock(&indio_dev->mlock); 411 411 return ret;
+1 -1
drivers/staging/iio/cdc/ad7746.c
··· 677 677 break; 678 678 default: 679 679 ret = -EINVAL; 680 - }; 680 + } 681 681 out: 682 682 mutex_unlock(&indio_dev->mlock); 683 683 return ret;
+2 -4
drivers/staging/iio/gyro/adis16260_core.c
··· 24 24 25 25 #include "adis16260.h" 26 26 27 - #define DRIVER_NAME "adis16260" 28 - 29 27 static int adis16260_check_status(struct iio_dev *indio_dev); 30 28 31 29 /** ··· 526 528 break; 527 529 default: 528 530 return -EINVAL; 529 - }; 531 + } 530 532 mutex_lock(&indio_dev->mlock); 531 533 addr = adis16260_addresses[chan->address][1]; 532 534 ret = adis16260_spi_read_reg_16(indio_dev, addr, &val16); ··· 546 548 break; 547 549 default: 548 550 return -EINVAL; 549 - }; 551 + } 550 552 mutex_lock(&indio_dev->mlock); 551 553 addr = adis16260_addresses[chan->address][2]; 552 554 ret = adis16260_spi_read_reg_16(indio_dev, addr, &val16);
+1 -1
drivers/staging/iio/iio_dummy_evgen.c
··· 108 108 109 109 mutex_lock(&iio_evgen->lock); 110 110 for (i = 0; i < IIO_EVENTGEN_NO; i++) 111 - if (iio_evgen->inuse[i] == false) { 111 + if (!iio_evgen->inuse[i]) { 112 112 ret = iio_evgen->base + i; 113 113 iio_evgen->inuse[i] = true; 114 114 break;
+5 -5
drivers/staging/iio/imu/adis16400_core.c
··· 622 622 IIO_CHAN_INFO_SCALE_SEPARATE_BIT, 623 623 .address = in_supply, 624 624 .scan_index = ADIS16400_SCAN_SUPPLY, 625 - .scan_type = IIO_ST('u', 14, 16, 0) 625 + .scan_type = IIO_ST('u', 14, 16, 0), 626 626 }, { 627 627 .type = IIO_ANGL_VEL, 628 628 .modified = 1, ··· 633 633 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT, 634 634 .address = gyro_x, 635 635 .scan_index = ADIS16400_SCAN_GYRO_X, 636 - .scan_type = IIO_ST('s', 14, 16, 0) 636 + .scan_type = IIO_ST('s', 14, 16, 0), 637 637 }, { 638 638 .type = IIO_ANGL_VEL, 639 639 .modified = 1, ··· 752 752 IIO_CHAN_INFO_SCALE_SEPARATE_BIT, 753 753 .address = in_supply, 754 754 .scan_index = ADIS16400_SCAN_SUPPLY, 755 - .scan_type = IIO_ST('u', 12, 16, 0) 755 + .scan_type = IIO_ST('u', 12, 16, 0), 756 756 }, { 757 757 .type = IIO_ANGL_VEL, 758 758 .modified = 1, ··· 763 763 IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY_SHARED_BIT, 764 764 .address = gyro_x, 765 765 .scan_index = ADIS16400_SCAN_GYRO_X, 766 - .scan_type = IIO_ST('s', 14, 16, 0) 766 + .scan_type = IIO_ST('s', 14, 16, 0), 767 767 }, { 768 768 .type = IIO_ANGL_VEL, 769 769 .modified = 1, ··· 877 877 IIO_CHAN_INFO_SCALE_SEPARATE_BIT, 878 878 .address = in_supply, 879 879 .scan_index = ADIS16400_SCAN_SUPPLY, 880 - .scan_type = IIO_ST('u', 12, 16, 0) 880 + .scan_type = IIO_ST('u', 12, 16, 0), 881 881 }, { 882 882 .type = IIO_ANGL_VEL, 883 883 .modified = 1,
+1 -1
drivers/staging/iio/magnetometer/hmc5843.c
··· 555 555 *val = 0; 556 556 *val2 = data->variant->regval_to_nanoscale[data->range]; 557 557 return IIO_VAL_INT_PLUS_NANO; 558 - }; 558 + } 559 559 return -EINVAL; 560 560 } 561 561
-2
drivers/staging/iio/meter/ade7753.h
··· 55 55 #define ADE7753_SPI_BURST (u32)(1000 * 1000) 56 56 #define ADE7753_SPI_FAST (u32)(2000 * 1000) 57 57 58 - #define DRIVER_NAME "ade7753" 59 - 60 58 /** 61 59 * struct ade7753_state - device instance specific data 62 60 * @us: actual spi_device
-2
drivers/staging/iio/meter/ade7754.h
··· 73 73 #define ADE7754_SPI_BURST (u32)(1000 * 1000) 74 74 #define ADE7754_SPI_FAST (u32)(2000 * 1000) 75 75 76 - #define DRIVER_NAME "ade7754" 77 - 78 76 /** 79 77 * struct ade7754_state - device instance specific data 80 78 * @us: actual spi_device
-3
drivers/staging/iio/meter/ade7758.h
··· 105 105 #define AD7758_APP_PWR 4 106 106 #define AD7758_WT(p, w) (((w) << 2) | (p)) 107 107 108 - #define DRIVER_NAME "ade7758" 109 - 110 - 111 108 /** 112 109 * struct ade7758_state - device instance specific data 113 110 * @us: actual spi_device
-2
drivers/staging/iio/meter/ade7759.h
··· 36 36 #define ADE7759_SPI_BURST (u32)(1000 * 1000) 37 37 #define ADE7759_SPI_FAST (u32)(2000 * 1000) 38 38 39 - #define DRIVER_NAME "ade7759" 40 - 41 39 /** 42 40 * struct ade7759_state - device instance specific data 43 41 * @us: actual spi_device
-2
drivers/staging/iio/meter/ade7854.h
··· 142 142 #define ADE7854_SPI_BURST (u32)(1000 * 1000) 143 143 #define ADE7854_SPI_FAST (u32)(2000 * 1000) 144 144 145 - #define DRIVER_NAME "ade7854" 146 - 147 145 /** 148 146 * struct ade7854_state - device instance specific data 149 147 * @spi: actual spi_device
+1
include/linux/iio/types.h
··· 58 58 #define IIO_VAL_INT_PLUS_NANO 3 59 59 #define IIO_VAL_INT_PLUS_MICRO_DB 4 60 60 #define IIO_VAL_FRACTIONAL 10 61 + #define IIO_VAL_FRACTIONAL_LOG2 11 61 62 62 63 #endif /* _IIO_TYPES_H_ */
+40
include/linux/platform_data/ad5449.h
··· 1 + /* 2 + * AD5415, AD5426, AD5429, AD5432, AD5439, AD5443, AD5449 Digital to Analog 3 + * Converter driver. 4 + * 5 + * Copyright 2012 Analog Devices Inc. 6 + * Author: Lars-Peter Clausen <lars@metafoo.de> 7 + * 8 + * Licensed under the GPL-2. 9 + */ 10 + 11 + #ifndef __LINUX_PLATFORM_DATA_AD5449_H__ 12 + #define __LINUX_PLATFORM_DATA_AD5449_H__ 13 + 14 + /** 15 + * enum ad5449_sdo_mode - AD5449 SDO pin configuration 16 + * @AD5449_SDO_DRIVE_FULL: Drive the SDO pin with full strength. 17 + * @AD5449_SDO_DRIVE_WEAK: Drive the SDO pin with not full strength. 18 + * @AD5449_SDO_OPEN_DRAIN: Operate the SDO pin in open-drain mode. 19 + * @AD5449_SDO_DISABLED: Disable the SDO pin, in this mode it is not possible to 20 + * read back from the device. 21 + */ 22 + enum ad5449_sdo_mode { 23 + AD5449_SDO_DRIVE_FULL = 0x0, 24 + AD5449_SDO_DRIVE_WEAK = 0x1, 25 + AD5449_SDO_OPEN_DRAIN = 0x2, 26 + AD5449_SDO_DISABLED = 0x3, 27 + }; 28 + 29 + /** 30 + * struct ad5449_platform_data - Platform data for the ad5449 DAC driver 31 + * @sdo_mode: SDO pin mode 32 + * @hardware_clear_to_midscale: Whether asserting the hardware CLR pin sets the 33 + * outputs to midscale (true) or to zero scale(false). 34 + */ 35 + struct ad5449_platform_data { 36 + enum ad5449_sdo_mode sdo_mode; 37 + bool hardware_clear_to_midscale; 38 + }; 39 + 40 + #endif