Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

fbdev: jz4740-fb: Let the pinctrl driver configure the pins

Now that the JZ4740 and similar SoCs have a pinctrl driver, we rely on
the pins being properly configured before the driver probes.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Acked-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

authored by

Paul Cercueil and committed by
Linus Walleij
695ff985 47096d70

+3 -101
+3 -101
drivers/video/fbdev/jz4740_fb.c
··· 17 17 #include <linux/module.h> 18 18 #include <linux/mutex.h> 19 19 #include <linux/platform_device.h> 20 + #include <linux/pinctrl/consumer.h> 20 21 21 22 #include <linux/clk.h> 22 23 #include <linux/delay.h> ··· 28 27 #include <linux/dma-mapping.h> 29 28 30 29 #include <asm/mach-jz4740/jz4740_fb.h> 31 - #include <asm/mach-jz4740/gpio.h> 32 30 33 31 #define JZ_REG_LCD_CFG 0x00 34 32 #define JZ_REG_LCD_VSYNC 0x04 ··· 145 145 .ywrapstep = 0, 146 146 .accel = FB_ACCEL_NONE, 147 147 }; 148 - 149 - static const struct jz_gpio_bulk_request jz_lcd_ctrl_pins[] = { 150 - JZ_GPIO_BULK_PIN(LCD_PCLK), 151 - JZ_GPIO_BULK_PIN(LCD_HSYNC), 152 - JZ_GPIO_BULK_PIN(LCD_VSYNC), 153 - JZ_GPIO_BULK_PIN(LCD_DE), 154 - JZ_GPIO_BULK_PIN(LCD_PS), 155 - JZ_GPIO_BULK_PIN(LCD_REV), 156 - JZ_GPIO_BULK_PIN(LCD_CLS), 157 - JZ_GPIO_BULK_PIN(LCD_SPL), 158 - }; 159 - 160 - static const struct jz_gpio_bulk_request jz_lcd_data_pins[] = { 161 - JZ_GPIO_BULK_PIN(LCD_DATA0), 162 - JZ_GPIO_BULK_PIN(LCD_DATA1), 163 - JZ_GPIO_BULK_PIN(LCD_DATA2), 164 - JZ_GPIO_BULK_PIN(LCD_DATA3), 165 - JZ_GPIO_BULK_PIN(LCD_DATA4), 166 - JZ_GPIO_BULK_PIN(LCD_DATA5), 167 - JZ_GPIO_BULK_PIN(LCD_DATA6), 168 - JZ_GPIO_BULK_PIN(LCD_DATA7), 169 - JZ_GPIO_BULK_PIN(LCD_DATA8), 170 - JZ_GPIO_BULK_PIN(LCD_DATA9), 171 - JZ_GPIO_BULK_PIN(LCD_DATA10), 172 - JZ_GPIO_BULK_PIN(LCD_DATA11), 173 - JZ_GPIO_BULK_PIN(LCD_DATA12), 174 - JZ_GPIO_BULK_PIN(LCD_DATA13), 175 - JZ_GPIO_BULK_PIN(LCD_DATA14), 176 - JZ_GPIO_BULK_PIN(LCD_DATA15), 177 - JZ_GPIO_BULK_PIN(LCD_DATA16), 178 - JZ_GPIO_BULK_PIN(LCD_DATA17), 179 - }; 180 - 181 - static unsigned int jzfb_num_ctrl_pins(struct jzfb *jzfb) 182 - { 183 - unsigned int num; 184 - 185 - switch (jzfb->pdata->lcd_type) { 186 - case JZ_LCD_TYPE_GENERIC_16_BIT: 187 - num = 4; 188 - break; 189 - case JZ_LCD_TYPE_GENERIC_18_BIT: 190 - num = 4; 191 - break; 192 - case JZ_LCD_TYPE_8BIT_SERIAL: 193 - num = 3; 194 - break; 195 - case JZ_LCD_TYPE_SPECIAL_TFT_1: 196 - case JZ_LCD_TYPE_SPECIAL_TFT_2: 197 - case JZ_LCD_TYPE_SPECIAL_TFT_3: 198 - num = 8; 199 - break; 200 - default: 201 - num = 0; 202 - break; 203 - } 204 - return num; 205 - } 206 - 207 - static unsigned int jzfb_num_data_pins(struct jzfb *jzfb) 208 - { 209 - unsigned int num; 210 - 211 - switch (jzfb->pdata->lcd_type) { 212 - case JZ_LCD_TYPE_GENERIC_16_BIT: 213 - num = 16; 214 - break; 215 - case JZ_LCD_TYPE_GENERIC_18_BIT: 216 - num = 18; 217 - break; 218 - case JZ_LCD_TYPE_8BIT_SERIAL: 219 - num = 8; 220 - break; 221 - case JZ_LCD_TYPE_SPECIAL_TFT_1: 222 - case JZ_LCD_TYPE_SPECIAL_TFT_2: 223 - case JZ_LCD_TYPE_SPECIAL_TFT_3: 224 - if (jzfb->pdata->bpp == 18) 225 - num = 18; 226 - else 227 - num = 16; 228 - break; 229 - default: 230 - num = 0; 231 - break; 232 - } 233 - return num; 234 - } 235 148 236 149 /* Based on CNVT_TOHW macro from skeletonfb.c */ 237 150 static inline uint32_t jzfb_convert_color_to_hw(unsigned val, ··· 400 487 401 488 clk_prepare_enable(jzfb->ldclk); 402 489 403 - jz_gpio_bulk_resume(jz_lcd_ctrl_pins, jzfb_num_ctrl_pins(jzfb)); 404 - jz_gpio_bulk_resume(jz_lcd_data_pins, jzfb_num_data_pins(jzfb)); 490 + pinctrl_pm_select_default_state(&jzfb->pdev->dev); 405 491 406 492 writel(0, jzfb->base + JZ_REG_LCD_STATE); 407 493 ··· 423 511 ctrl = readl(jzfb->base + JZ_REG_LCD_STATE); 424 512 } while (!(ctrl & JZ_LCD_STATE_DISABLED)); 425 513 426 - jz_gpio_bulk_suspend(jz_lcd_ctrl_pins, jzfb_num_ctrl_pins(jzfb)); 427 - jz_gpio_bulk_suspend(jz_lcd_data_pins, jzfb_num_data_pins(jzfb)); 514 + pinctrl_pm_select_sleep_state(&jzfb->pdev->dev); 428 515 429 516 clk_disable_unprepare(jzfb->ldclk); 430 517 } ··· 612 701 fb->mode = NULL; 613 702 jzfb_set_par(fb); 614 703 615 - jz_gpio_bulk_request(jz_lcd_ctrl_pins, jzfb_num_ctrl_pins(jzfb)); 616 - jz_gpio_bulk_request(jz_lcd_data_pins, jzfb_num_data_pins(jzfb)); 617 - 618 704 ret = register_framebuffer(fb); 619 705 if (ret) { 620 706 dev_err(&pdev->dev, "Failed to register framebuffer: %d\n", ret); ··· 623 715 return 0; 624 716 625 717 err_free_devmem: 626 - jz_gpio_bulk_free(jz_lcd_ctrl_pins, jzfb_num_ctrl_pins(jzfb)); 627 - jz_gpio_bulk_free(jz_lcd_data_pins, jzfb_num_data_pins(jzfb)); 628 - 629 718 fb_dealloc_cmap(&fb->cmap); 630 719 jzfb_free_devmem(jzfb); 631 720 err_framebuffer_release: ··· 635 730 struct jzfb *jzfb = platform_get_drvdata(pdev); 636 731 637 732 jzfb_blank(FB_BLANK_POWERDOWN, jzfb->fb); 638 - 639 - jz_gpio_bulk_free(jz_lcd_ctrl_pins, jzfb_num_ctrl_pins(jzfb)); 640 - jz_gpio_bulk_free(jz_lcd_data_pins, jzfb_num_data_pins(jzfb)); 641 733 642 734 fb_dealloc_cmap(&jzfb->fb->cmap); 643 735 jzfb_free_devmem(jzfb);