Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge branch '100GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/jkirsher/next-queue

Jeff Kirsher says:

====================
100GbE Intel Wired LAN Driver Updates 2019-09-05

This series contains updates to ice driver.

Brett fixes the setting of num_q_vectors by using the maximum number
between the allocated transmit and receive queues.

Anirudh simplifies the code to use a helper function to return the main
VSI, which is the first element in the pf->vsi array. Adds a pointer
check to prevent a NULL pointer dereference. Adds a check to ensure we
do not initialize DCB on devices that are not DCB capable. Does some
housekeeping on the code to remove unnecessary indirection and reduce
the PF structure by removing elements that are not needed since the
values they were storing can be readily gotten from
ice_get_avail_*_count()'s. Updates the printed strings to make it
easier to search the logs for driver capabilities.

Jesse cleans up unnecessary function arguments. Updated the code to use
prefetch() to add some efficiency to the driver to avoid a cache miss.
Did some housekeeping on the code to remove the configurable transmit
work limit via ethtool which ended up creating performance overhead.
Made additional performance enhancements by updating the driver to start
out with a reasonable number of descriptors by changing the default to
2048.

Mitch fixes the reset logic for VFs by clearing VF_MBX_ARQLEN register
when the source of the reset is not PFR.

Lukasz updates the driver to include a similar fix for the i40e driver
by reporting link down for VF's when the PF queues are not enabled.

Akeem updates the driver to report the VF link status once we get VF
resources so that we can reflect the link status similarly to how the PF
reports link speed.

Ashish updates the transmit context structure based on recent changes to
the hardware specification.

Dave updates the DCB logic to allow a delayed registration for MIB
change events so that the driver is not accepting events before it is
ready for them.
====================

Signed-off-by: David S. Miller <davem@davemloft.net>

+195 -169
+11 -35
drivers/net/ethernet/intel/ice/ice.h
··· 47 47 #define ICE_MIN_NUM_DESC 64 48 48 #define ICE_MAX_NUM_DESC 8160 49 49 #define ICE_DFLT_MIN_RX_DESC 512 50 - /* if the default number of Rx descriptors between ICE_MAX_NUM_DESC and the 51 - * number of descriptors to fill up an entire page is greater than or equal to 52 - * ICE_DFLT_MIN_RX_DESC set it based on page size, otherwise set it to 53 - * ICE_DFLT_MIN_RX_DESC 54 - */ 55 - #define ICE_DFLT_NUM_RX_DESC \ 56 - min_t(u16, ICE_MAX_NUM_DESC, \ 57 - max_t(u16, ALIGN(PAGE_SIZE / sizeof(union ice_32byte_rx_desc), \ 58 - ICE_REQ_DESC_MULTIPLE), \ 59 - ICE_DFLT_MIN_RX_DESC)) 60 - /* set default number of Tx descriptors to the minimum between ICE_MAX_NUM_DESC 61 - * and the number of descriptors to fill up an entire page 62 - */ 63 - #define ICE_DFLT_NUM_TX_DESC min_t(u16, ICE_MAX_NUM_DESC, \ 64 - ALIGN(PAGE_SIZE / \ 65 - sizeof(struct ice_tx_desc), \ 66 - ICE_REQ_DESC_MULTIPLE)) 50 + #define ICE_DFLT_NUM_TX_DESC 256 51 + #define ICE_DFLT_NUM_RX_DESC 2048 67 52 68 53 #define ICE_DFLT_TRAFFIC_CLASS BIT(0) 69 54 #define ICE_INT_NAME_STR_LEN (IFNAMSIZ + 16) ··· 232 247 u16 vsi_num; /* HW (absolute) index of this VSI */ 233 248 u16 idx; /* software index in pf->vsi[] */ 234 249 235 - /* Interrupt thresholds */ 236 - u16 work_lmt; 237 - 238 250 s16 vf_id; /* VF ID for SR-IOV VSIs */ 239 251 240 252 u16 ethtype; /* Ethernet protocol for pause frame */ ··· 353 371 u32 num_lan_msix; /* Total MSIX vectors for base driver */ 354 372 u16 num_lan_tx; /* num LAN Tx queues setup */ 355 373 u16 num_lan_rx; /* num LAN Rx queues setup */ 356 - u16 q_left_tx; /* remaining num Tx queues left unclaimed */ 357 - u16 q_left_rx; /* remaining num Rx queues left unclaimed */ 358 374 u16 next_vsi; /* Next free slot in pf->vsi[] - 0-based! */ 359 375 u16 num_alloc_vsi; 360 376 u16 corer_count; /* Core reset count */ ··· 405 425 } 406 426 407 427 /** 408 - * ice_find_vsi_by_type - Find and return VSI of a given type 409 - * @pf: PF to search for VSI 410 - * @type: Value indicating type of VSI we are looking for 428 + * ice_get_main_vsi - Get the PF VSI 429 + * @pf: PF instance 430 + * 431 + * returns pf->vsi[0], which by definition is the PF VSI 411 432 */ 412 - static inline struct ice_vsi * 413 - ice_find_vsi_by_type(struct ice_pf *pf, enum ice_vsi_type type) 433 + static inline struct ice_vsi *ice_get_main_vsi(struct ice_pf *pf) 414 434 { 415 - int i; 416 - 417 - for (i = 0; i < pf->num_alloc_vsi; i++) { 418 - struct ice_vsi *vsi = pf->vsi[i]; 419 - 420 - if (vsi && vsi->type == type) 421 - return vsi; 422 - } 435 + if (pf->vsi) 436 + return pf->vsi[0]; 423 437 424 438 return NULL; 425 439 } ··· 421 447 int ice_vsi_setup_tx_rings(struct ice_vsi *vsi); 422 448 int ice_vsi_setup_rx_rings(struct ice_vsi *vsi); 423 449 void ice_set_ethtool_ops(struct net_device *netdev); 450 + u16 ice_get_avail_txq_count(struct ice_pf *pf); 451 + u16 ice_get_avail_rxq_count(struct ice_pf *pf); 424 452 void ice_update_vsi_stats(struct ice_vsi *vsi); 425 453 void ice_update_pf_stats(struct ice_pf *pf); 426 454 int ice_up(struct ice_vsi *vsi);
+22 -21
drivers/net/ethernet/intel/ice/ice_common.c
··· 1132 1132 ICE_CTX_STORE(ice_tlan_ctx, vmvf_type, 2, 78), 1133 1133 ICE_CTX_STORE(ice_tlan_ctx, src_vsi, 10, 80), 1134 1134 ICE_CTX_STORE(ice_tlan_ctx, tsyn_ena, 1, 90), 1135 + ICE_CTX_STORE(ice_tlan_ctx, internal_usage_flag, 1, 91), 1135 1136 ICE_CTX_STORE(ice_tlan_ctx, alt_vlan, 1, 92), 1136 1137 ICE_CTX_STORE(ice_tlan_ctx, cpuid, 8, 93), 1137 1138 ICE_CTX_STORE(ice_tlan_ctx, wb_mode, 1, 101), ··· 1151 1150 ICE_CTX_STORE(ice_tlan_ctx, drop_ena, 1, 165), 1152 1151 ICE_CTX_STORE(ice_tlan_ctx, cache_prof_idx, 2, 166), 1153 1152 ICE_CTX_STORE(ice_tlan_ctx, pkt_shaper_prof_idx, 3, 168), 1154 - ICE_CTX_STORE(ice_tlan_ctx, int_q_state, 110, 171), 1153 + ICE_CTX_STORE(ice_tlan_ctx, int_q_state, 122, 171), 1155 1154 { 0 } 1156 1155 }; 1157 1156 ··· 1551 1550 case ICE_AQC_CAPS_VALID_FUNCTIONS: 1552 1551 caps->valid_functions = number; 1553 1552 ice_debug(hw, ICE_DBG_INIT, 1554 - "%s: valid functions = %d\n", prefix, 1553 + "%s: valid_functions (bitmap) = %d\n", prefix, 1555 1554 caps->valid_functions); 1556 1555 break; 1557 1556 case ICE_AQC_CAPS_SRIOV: 1558 1557 caps->sr_iov_1_1 = (number == 1); 1559 1558 ice_debug(hw, ICE_DBG_INIT, 1560 - "%s: SR-IOV = %d\n", prefix, 1559 + "%s: sr_iov_1_1 = %d\n", prefix, 1561 1560 caps->sr_iov_1_1); 1562 1561 break; 1563 1562 case ICE_AQC_CAPS_VF: 1564 1563 if (dev_p) { 1565 1564 dev_p->num_vfs_exposed = number; 1566 1565 ice_debug(hw, ICE_DBG_INIT, 1567 - "%s: VFs exposed = %d\n", prefix, 1566 + "%s: num_vfs_exposed = %d\n", prefix, 1568 1567 dev_p->num_vfs_exposed); 1569 1568 } else if (func_p) { 1570 1569 func_p->num_allocd_vfs = number; 1571 1570 func_p->vf_base_id = logical_id; 1572 1571 ice_debug(hw, ICE_DBG_INIT, 1573 - "%s: VFs allocated = %d\n", prefix, 1572 + "%s: num_allocd_vfs = %d\n", prefix, 1574 1573 func_p->num_allocd_vfs); 1575 1574 ice_debug(hw, ICE_DBG_INIT, 1576 - "%s: VF base_id = %d\n", prefix, 1575 + "%s: vf_base_id = %d\n", prefix, 1577 1576 func_p->vf_base_id); 1578 1577 } 1579 1578 break; ··· 1581 1580 if (dev_p) { 1582 1581 dev_p->num_vsi_allocd_to_host = number; 1583 1582 ice_debug(hw, ICE_DBG_INIT, 1584 - "%s: num VSI alloc to host = %d\n", 1583 + "%s: num_vsi_allocd_to_host = %d\n", 1585 1584 prefix, 1586 1585 dev_p->num_vsi_allocd_to_host); 1587 1586 } else if (func_p) { 1588 1587 func_p->guar_num_vsi = 1589 1588 ice_get_num_per_func(hw, ICE_MAX_VSI); 1590 1589 ice_debug(hw, ICE_DBG_INIT, 1591 - "%s: num guaranteed VSI (fw) = %d\n", 1590 + "%s: guar_num_vsi (fw) = %d\n", 1592 1591 prefix, number); 1593 1592 ice_debug(hw, ICE_DBG_INIT, 1594 - "%s: num guaranteed VSI = %d\n", 1593 + "%s: guar_num_vsi = %d\n", 1595 1594 prefix, func_p->guar_num_vsi); 1596 1595 } 1597 1596 break; ··· 1600 1599 caps->active_tc_bitmap = logical_id; 1601 1600 caps->maxtc = phys_id; 1602 1601 ice_debug(hw, ICE_DBG_INIT, 1603 - "%s: DCB = %d\n", prefix, caps->dcb); 1602 + "%s: dcb = %d\n", prefix, caps->dcb); 1604 1603 ice_debug(hw, ICE_DBG_INIT, 1605 - "%s: active TC bitmap = %d\n", prefix, 1604 + "%s: active_tc_bitmap = %d\n", prefix, 1606 1605 caps->active_tc_bitmap); 1607 1606 ice_debug(hw, ICE_DBG_INIT, 1608 - "%s: TC max = %d\n", prefix, caps->maxtc); 1607 + "%s: maxtc = %d\n", prefix, caps->maxtc); 1609 1608 break; 1610 1609 case ICE_AQC_CAPS_RSS: 1611 1610 caps->rss_table_size = number; 1612 1611 caps->rss_table_entry_width = logical_id; 1613 1612 ice_debug(hw, ICE_DBG_INIT, 1614 - "%s: RSS table size = %d\n", prefix, 1613 + "%s: rss_table_size = %d\n", prefix, 1615 1614 caps->rss_table_size); 1616 1615 ice_debug(hw, ICE_DBG_INIT, 1617 - "%s: RSS table width = %d\n", prefix, 1616 + "%s: rss_table_entry_width = %d\n", prefix, 1618 1617 caps->rss_table_entry_width); 1619 1618 break; 1620 1619 case ICE_AQC_CAPS_RXQS: 1621 1620 caps->num_rxq = number; 1622 1621 caps->rxq_first_id = phys_id; 1623 1622 ice_debug(hw, ICE_DBG_INIT, 1624 - "%s: num Rx queues = %d\n", prefix, 1623 + "%s: num_rxq = %d\n", prefix, 1625 1624 caps->num_rxq); 1626 1625 ice_debug(hw, ICE_DBG_INIT, 1627 - "%s: Rx first queue ID = %d\n", prefix, 1626 + "%s: rxq_first_id = %d\n", prefix, 1628 1627 caps->rxq_first_id); 1629 1628 break; 1630 1629 case ICE_AQC_CAPS_TXQS: 1631 1630 caps->num_txq = number; 1632 1631 caps->txq_first_id = phys_id; 1633 1632 ice_debug(hw, ICE_DBG_INIT, 1634 - "%s: num Tx queues = %d\n", prefix, 1633 + "%s: num_txq = %d\n", prefix, 1635 1634 caps->num_txq); 1636 1635 ice_debug(hw, ICE_DBG_INIT, 1637 - "%s: Tx first queue ID = %d\n", prefix, 1636 + "%s: txq_first_id = %d\n", prefix, 1638 1637 caps->txq_first_id); 1639 1638 break; 1640 1639 case ICE_AQC_CAPS_MSIX: 1641 1640 caps->num_msix_vectors = number; 1642 1641 caps->msix_vector_first_id = phys_id; 1643 1642 ice_debug(hw, ICE_DBG_INIT, 1644 - "%s: MSIX vector count = %d\n", prefix, 1643 + "%s: num_msix_vectors = %d\n", prefix, 1645 1644 caps->num_msix_vectors); 1646 1645 ice_debug(hw, ICE_DBG_INIT, 1647 - "%s: MSIX first vector index = %d\n", prefix, 1646 + "%s: msix_vector_first_id = %d\n", prefix, 1648 1647 caps->msix_vector_first_id); 1649 1648 break; 1650 1649 case ICE_AQC_CAPS_MAX_MTU: 1651 1650 caps->max_mtu = number; 1652 - ice_debug(hw, ICE_DBG_INIT, "%s: max MTU = %d\n", 1651 + ice_debug(hw, ICE_DBG_INIT, "%s: max_mtu = %d\n", 1653 1652 prefix, caps->max_mtu); 1654 1653 break; 1655 1654 default:
+35 -4
drivers/net/ethernet/intel/ice/ice_dcb.c
··· 60 60 * Enable or Disable posting of an event on ARQ when LLDP MIB 61 61 * associated with the interface changes (0x0A01) 62 62 */ 63 - enum ice_status 63 + static enum ice_status 64 64 ice_aq_cfg_lldp_mib_change(struct ice_hw *hw, bool ena_update, 65 65 struct ice_sq_cd *cd) 66 66 { ··· 943 943 /** 944 944 * ice_init_dcb 945 945 * @hw: pointer to the HW struct 946 + * @enable_mib_change: enable MIB change event 946 947 * 947 948 * Update DCB configuration from the Firmware 948 949 */ 949 - enum ice_status ice_init_dcb(struct ice_hw *hw) 950 + enum ice_status ice_init_dcb(struct ice_hw *hw, bool enable_mib_change) 950 951 { 951 952 struct ice_port_info *pi = hw->port_info; 952 953 enum ice_status ret = 0; ··· 973 972 } 974 973 975 974 /* Configure the LLDP MIB change event */ 976 - ret = ice_aq_cfg_lldp_mib_change(hw, true, NULL); 975 + if (enable_mib_change) { 976 + ret = ice_aq_cfg_lldp_mib_change(hw, true, NULL); 977 + if (!ret) 978 + pi->is_sw_lldp = false; 979 + } 980 + 981 + return ret; 982 + } 983 + 984 + /** 985 + * ice_cfg_lldp_mib_change 986 + * @hw: pointer to the HW struct 987 + * @ena_mib: enable/disable MIB change event 988 + * 989 + * Configure (disable/enable) MIB 990 + */ 991 + enum ice_status ice_cfg_lldp_mib_change(struct ice_hw *hw, bool ena_mib) 992 + { 993 + struct ice_port_info *pi = hw->port_info; 994 + enum ice_status ret; 995 + 996 + if (!hw->func_caps.common_cap.dcb) 997 + return ICE_ERR_NOT_SUPPORTED; 998 + 999 + /* Get DCBX status */ 1000 + pi->dcbx_status = ice_get_dcbx_status(hw); 1001 + 1002 + if (pi->dcbx_status == ICE_DCBX_STATUS_DIS) 1003 + return ICE_ERR_NOT_READY; 1004 + 1005 + ret = ice_aq_cfg_lldp_mib_change(hw, ena_mib, NULL); 977 1006 if (!ret) 978 - pi->is_sw_lldp = false; 1007 + pi->is_sw_lldp = !ena_mib; 979 1008 980 1009 return ret; 981 1010 }
+4 -7
drivers/net/ethernet/intel/ice/ice_dcb.h
··· 125 125 struct ice_dcbx_cfg *dcbcfg); 126 126 enum ice_status ice_get_dcb_cfg(struct ice_port_info *pi); 127 127 enum ice_status ice_set_dcb_cfg(struct ice_port_info *pi); 128 - enum ice_status ice_init_dcb(struct ice_hw *hw); 128 + enum ice_status ice_init_dcb(struct ice_hw *hw, bool enable_mib_change); 129 129 enum ice_status 130 130 ice_query_port_ets(struct ice_port_info *pi, 131 131 struct ice_aqc_port_ets_elem *buf, u16 buf_size, ··· 139 139 enum ice_status 140 140 ice_aq_start_stop_dcbx(struct ice_hw *hw, bool start_dcbx_agent, 141 141 bool *dcbx_agent_status, struct ice_sq_cd *cd); 142 - enum ice_status 143 - ice_aq_cfg_lldp_mib_change(struct ice_hw *hw, bool ena_update, 144 - struct ice_sq_cd *cd); 142 + enum ice_status ice_cfg_lldp_mib_change(struct ice_hw *hw, bool ena_mib); 145 143 #else /* CONFIG_DCB */ 146 144 static inline enum ice_status 147 145 ice_aq_stop_lldp(struct ice_hw __always_unused *hw, ··· 170 172 } 171 173 172 174 static inline enum ice_status 173 - ice_aq_cfg_lldp_mib_change(struct ice_hw __always_unused *hw, 174 - bool __always_unused ena_update, 175 - struct ice_sq_cd __always_unused *cd) 175 + ice_cfg_lldp_mib_change(struct ice_hw __always_unused *hw, 176 + bool __always_unused ena_mib) 176 177 { 177 178 return 0; 178 179 }
+2 -5
drivers/net/ethernet/intel/ice/ice_dcb_lib.c
··· 318 318 goto dcb_error; 319 319 } 320 320 321 - ice_init_dcb(&pf->hw); 321 + ice_init_dcb(&pf->hw, true); 322 322 if (pf->hw.port_info->dcbx_status == ICE_DCBX_STATUS_DIS) 323 323 pf->hw.port_info->is_sw_lldp = true; 324 324 else ··· 451 451 452 452 port_info = hw->port_info; 453 453 454 - err = ice_init_dcb(hw); 454 + err = ice_init_dcb(hw, false); 455 455 if (err && !port_info->is_sw_lldp) { 456 456 dev_err(&pf->pdev->dev, "Error initializing DCB %d\n", err); 457 457 goto dcb_init_err; ··· 474 474 } 475 475 476 476 pf->dcbx_cap = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_IEEE; 477 - set_bit(ICE_FLAG_DCB_CAPABLE, pf->flags); 478 477 return 0; 479 478 } 480 479 ··· 481 482 482 483 /* DCBX in FW and LLDP enabled in FW */ 483 484 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED | DCB_CAP_DCBX_VER_IEEE; 484 - 485 - set_bit(ICE_FLAG_DCB_CAPABLE, pf->flags); 486 485 487 486 err = ice_dcb_init_cfg(pf, locked); 488 487 if (err)
+10 -14
drivers/net/ethernet/intel/ice/ice_ethtool.c
··· 1206 1206 enum ice_status status; 1207 1207 1208 1208 /* Disable FW LLDP engine */ 1209 - status = ice_aq_cfg_lldp_mib_change(&pf->hw, false, 1210 - NULL); 1209 + status = ice_cfg_lldp_mib_change(&pf->hw, false); 1210 + 1211 1211 /* If unregistering for LLDP events fails, this is 1212 1212 * not an error state, as there shouldn't be any 1213 1213 * events to respond to. ··· 1273 1273 * The FW LLDP engine will now be consuming them. 1274 1274 */ 1275 1275 ice_cfg_sw_lldp(vsi, false, false); 1276 + 1277 + /* Register for MIB change events */ 1278 + status = ice_cfg_lldp_mib_change(&pf->hw, true); 1279 + if (status) 1280 + dev_dbg(&pf->pdev->dev, 1281 + "Fail to enable MIB change events\n"); 1276 1282 } 1277 1283 } 1278 1284 clear_bit(ICE_FLAG_ETHTOOL_CTXT, pf->flags); ··· 3220 3214 if (ice_get_q_coalesce(vsi, ec, q_num)) 3221 3215 return -EINVAL; 3222 3216 3223 - if (q_num < vsi->num_txq) 3224 - ec->tx_max_coalesced_frames_irq = vsi->work_lmt; 3225 - 3226 - if (q_num < vsi->num_rxq) 3227 - ec->rx_max_coalesced_frames_irq = vsi->work_lmt; 3228 - 3229 3217 return 0; 3230 3218 } 3231 3219 ··· 3399 3399 if (ice_set_q_coalesce(vsi, ec, i)) 3400 3400 return -EINVAL; 3401 3401 } 3402 - goto set_work_lmt; 3402 + goto set_complete; 3403 3403 } 3404 3404 3405 3405 if (ice_set_q_coalesce(vsi, ec, q_num)) 3406 3406 return -EINVAL; 3407 3407 3408 - set_work_lmt: 3409 - 3410 - if (ec->tx_max_coalesced_frames_irq || ec->rx_max_coalesced_frames_irq) 3411 - vsi->work_lmt = max(ec->tx_max_coalesced_frames_irq, 3412 - ec->rx_max_coalesced_frames_irq); 3408 + set_complete: 3413 3409 3414 3410 return 0; 3415 3411 }
+1
drivers/net/ethernet/intel/ice/ice_lan_tx_rx.h
··· 428 428 #define ICE_TLAN_CTX_VMVF_TYPE_PF 2 429 429 u16 src_vsi; 430 430 u8 tsyn_ena; 431 + u8 internal_usage_flag; 431 432 u8 alt_vlan; 432 433 u16 cpuid; /* bigger than needed, see above for reason */ 433 434 u8 wb_mode;
+16 -13
drivers/net/ethernet/intel/ice/ice_lib.c
··· 343 343 344 344 switch (vsi->type) { 345 345 case ICE_VSI_PF: 346 - vsi->alloc_txq = pf->num_lan_tx; 347 - vsi->alloc_rxq = pf->num_lan_rx; 348 - vsi->num_q_vectors = max_t(int, pf->num_lan_rx, pf->num_lan_tx); 346 + vsi->alloc_txq = min_t(int, ice_get_avail_txq_count(pf), 347 + num_online_cpus()); 348 + 349 + pf->num_lan_tx = vsi->alloc_txq; 350 + 351 + /* only 1 Rx queue unless RSS is enabled */ 352 + if (!test_bit(ICE_FLAG_RSS_ENA, pf->flags)) 353 + vsi->alloc_rxq = 1; 354 + else 355 + vsi->alloc_rxq = min_t(int, ice_get_avail_rxq_count(pf), 356 + num_online_cpus()); 357 + 358 + pf->num_lan_rx = vsi->alloc_rxq; 359 + 360 + vsi->num_q_vectors = max_t(int, vsi->alloc_rxq, vsi->alloc_txq); 349 361 break; 350 362 case ICE_VSI_VF: 351 363 vf = &pf->vf[vsi->vf_id]; ··· 560 548 vsi->type = type; 561 549 vsi->back = pf; 562 550 set_bit(__ICE_DOWN, vsi->state); 551 + 563 552 vsi->idx = pf->next_vsi; 564 - vsi->work_lmt = ICE_DFLT_IRQ_WORK; 565 553 566 554 if (type == ICE_VSI_VF) 567 555 ice_vsi_set_num_qs(vsi, vf_id); ··· 2589 2577 if (ret) 2590 2578 goto unroll_vector_base; 2591 2579 2592 - pf->q_left_tx -= vsi->alloc_txq; 2593 - pf->q_left_rx -= vsi->alloc_rxq; 2594 - 2595 2580 /* Do not exit if configuring RSS had an issue, at least 2596 2581 * receive traffic on first queue. Hence no need to capture 2597 2582 * return value ··· 2652 2643 ice_vsi_delete(vsi); 2653 2644 unroll_get_qs: 2654 2645 ice_vsi_put_qs(vsi); 2655 - pf->q_left_tx += vsi->alloc_txq; 2656 - pf->q_left_rx += vsi->alloc_rxq; 2657 2646 ice_vsi_clear(vsi); 2658 2647 2659 2648 return NULL; ··· 2999 2992 ice_vsi_clear_rings(vsi); 3000 2993 3001 2994 ice_vsi_put_qs(vsi); 3002 - pf->q_left_tx += vsi->alloc_txq; 3003 - pf->q_left_rx += vsi->alloc_rxq; 3004 2995 3005 2996 /* retain SW VSI data structure since it is needed to unregister and 3006 2997 * free VSI netdev when PF is not in reset recovery pending state,\ ··· 3107 3102 if (ret) 3108 3103 goto err_vectors; 3109 3104 3110 - pf->q_left_tx -= vsi->alloc_txq; 3111 - pf->q_left_rx -= vsi->alloc_rxq; 3112 3105 break; 3113 3106 default: 3114 3107 break;
+43 -30
drivers/net/ethernet/intel/ice/ice_main.c
··· 120 120 u8 broadcast[ETH_ALEN]; 121 121 struct ice_vsi *vsi; 122 122 123 - vsi = ice_find_vsi_by_type(pf, ICE_VSI_PF); 123 + vsi = ice_get_main_vsi(pf); 124 124 if (!vsi) 125 125 return -EINVAL; 126 126 ··· 826 826 if (link_up == old_link && link_speed == old_link_speed) 827 827 return result; 828 828 829 - vsi = ice_find_vsi_by_type(pf, ICE_VSI_PF); 829 + vsi = ice_get_main_vsi(pf); 830 830 if (!vsi || !vsi->port_info) 831 831 return -EINVAL; 832 832 ··· 1439 1439 struct ice_vsi *vsi; 1440 1440 int err; 1441 1441 1442 - vsi = ice_find_vsi_by_type(pf, ICE_VSI_PF); 1442 + vsi = ice_get_main_vsi(pf); 1443 1443 if (!vsi) 1444 1444 return; 1445 1445 ··· 2192 2192 ice_vsi_free_q_vectors(vsi); 2193 2193 ice_vsi_delete(vsi); 2194 2194 ice_vsi_put_qs(vsi); 2195 - pf->q_left_tx += vsi->alloc_txq; 2196 - pf->q_left_rx += vsi->alloc_rxq; 2197 2195 ice_vsi_clear(vsi); 2198 2196 } 2199 2197 return status; 2200 2198 } 2201 2199 2202 2200 /** 2203 - * ice_determine_q_usage - Calculate queue distribution 2204 - * @pf: board private structure 2205 - * 2206 - * Return -ENOMEM if we don't get enough queues for all ports 2201 + * ice_get_avail_q_count - Get count of queues in use 2202 + * @pf_qmap: bitmap to get queue use count from 2203 + * @lock: pointer to a mutex that protects access to pf_qmap 2204 + * @size: size of the bitmap 2207 2205 */ 2208 - static void ice_determine_q_usage(struct ice_pf *pf) 2206 + static u16 2207 + ice_get_avail_q_count(unsigned long *pf_qmap, struct mutex *lock, u16 size) 2209 2208 { 2210 - u16 q_left_tx, q_left_rx; 2209 + u16 count = 0, bit; 2211 2210 2212 - q_left_tx = pf->hw.func_caps.common_cap.num_txq; 2213 - q_left_rx = pf->hw.func_caps.common_cap.num_rxq; 2211 + mutex_lock(lock); 2212 + for_each_clear_bit(bit, pf_qmap, size) 2213 + count++; 2214 + mutex_unlock(lock); 2214 2215 2215 - pf->num_lan_tx = min_t(int, q_left_tx, num_online_cpus()); 2216 + return count; 2217 + } 2216 2218 2217 - /* only 1 Rx queue unless RSS is enabled */ 2218 - if (!test_bit(ICE_FLAG_RSS_ENA, pf->flags)) 2219 - pf->num_lan_rx = 1; 2220 - else 2221 - pf->num_lan_rx = min_t(int, q_left_rx, num_online_cpus()); 2219 + /** 2220 + * ice_get_avail_txq_count - Get count of Tx queues in use 2221 + * @pf: pointer to an ice_pf instance 2222 + */ 2223 + u16 ice_get_avail_txq_count(struct ice_pf *pf) 2224 + { 2225 + return ice_get_avail_q_count(pf->avail_txqs, &pf->avail_q_mutex, 2226 + pf->max_pf_txqs); 2227 + } 2222 2228 2223 - pf->q_left_tx = q_left_tx - pf->num_lan_tx; 2224 - pf->q_left_rx = q_left_rx - pf->num_lan_rx; 2229 + /** 2230 + * ice_get_avail_rxq_count - Get count of Rx queues in use 2231 + * @pf: pointer to an ice_pf instance 2232 + */ 2233 + u16 ice_get_avail_rxq_count(struct ice_pf *pf) 2234 + { 2235 + return ice_get_avail_q_count(pf->avail_rxqs, &pf->avail_q_mutex, 2236 + pf->max_pf_rxqs); 2225 2237 } 2226 2238 2227 2239 /** ··· 2264 2252 static int ice_init_pf(struct ice_pf *pf) 2265 2253 { 2266 2254 bitmap_zero(pf->flags, ICE_PF_FLAGS_NBITS); 2255 + if (pf->hw.func_caps.common_cap.dcb) 2256 + set_bit(ICE_FLAG_DCB_CAPABLE, pf->flags); 2267 2257 #ifdef CONFIG_PCI_IOV 2268 2258 if (pf->hw.func_caps.common_cap.sr_iov_1_1) { 2269 2259 struct ice_hw *hw = &pf->hw; ··· 2543 2529 goto err_init_pf_unroll; 2544 2530 } 2545 2531 2546 - err = ice_init_pf_dcb(pf, false); 2547 - if (err) { 2548 - clear_bit(ICE_FLAG_DCB_CAPABLE, pf->flags); 2549 - clear_bit(ICE_FLAG_DCB_ENA, pf->flags); 2550 - 2551 - /* do not fail overall init if DCB init fails */ 2552 - err = 0; 2532 + if (test_bit(ICE_FLAG_DCB_CAPABLE, pf->flags)) { 2533 + /* Note: DCB init failure is non-fatal to load */ 2534 + if (ice_init_pf_dcb(pf, false)) { 2535 + clear_bit(ICE_FLAG_DCB_CAPABLE, pf->flags); 2536 + clear_bit(ICE_FLAG_DCB_ENA, pf->flags); 2537 + } else { 2538 + ice_cfg_lldp_mib_change(&pf->hw, true); 2539 + } 2553 2540 } 2554 - 2555 - ice_determine_q_usage(pf); 2556 2541 2557 2542 pf->num_alloc_vsi = hw->func_caps.guar_num_vsi; 2558 2543 if (!pf->num_alloc_vsi) {
+1 -1
drivers/net/ethernet/intel/ice/ice_sched.c
··· 284 284 { 285 285 u8 i; 286 286 287 - if (!pi) 287 + if (!pi || !pi->root) 288 288 return NULL; 289 289 for (i = 0; i < pi->root->num_children; i++) 290 290 if (pi->root->children[i]->tc_num == tc)
+27 -26
drivers/net/ethernet/intel/ice/ice_txrx.c
··· 95 95 96 96 /** 97 97 * ice_clean_tx_irq - Reclaim resources after transmit completes 98 - * @vsi: the VSI we care about 99 98 * @tx_ring: Tx ring to clean 100 99 * @napi_budget: Used to determine if we are in netpoll 101 100 * 102 101 * Returns true if there's any budget left (e.g. the clean is finished) 103 102 */ 104 - static bool 105 - ice_clean_tx_irq(struct ice_vsi *vsi, struct ice_ring *tx_ring, int napi_budget) 103 + static bool ice_clean_tx_irq(struct ice_ring *tx_ring, int napi_budget) 106 104 { 107 105 unsigned int total_bytes = 0, total_pkts = 0; 108 - unsigned int budget = vsi->work_lmt; 106 + unsigned int budget = ICE_DFLT_IRQ_WORK; 107 + struct ice_vsi *vsi = tx_ring->vsi; 109 108 s16 i = tx_ring->next_to_clean; 110 109 struct ice_tx_desc *tx_desc; 111 110 struct ice_tx_buf *tx_buf; ··· 112 113 tx_buf = &tx_ring->tx_buf[i]; 113 114 tx_desc = ICE_TX_DESC(tx_ring, i); 114 115 i -= tx_ring->count; 116 + 117 + prefetch(&vsi->state); 115 118 116 119 do { 117 120 struct ice_tx_desc *eop_desc = tx_buf->next_to_watch; ··· 207 206 smp_mb(); 208 207 if (__netif_subqueue_stopped(tx_ring->netdev, 209 208 tx_ring->q_index) && 210 - !test_bit(__ICE_DOWN, vsi->state)) { 209 + !test_bit(__ICE_DOWN, vsi->state)) { 211 210 netif_wake_subqueue(tx_ring->netdev, 212 211 tx_ring->q_index); 213 212 ++tx_ring->tx_stats.restart_q; ··· 880 879 881 880 /** 882 881 * ice_rx_csum - Indicate in skb if checksum is good 883 - * @vsi: the VSI we care about 882 + * @ring: the ring we care about 884 883 * @skb: skb currently being received and modified 885 884 * @rx_desc: the receive descriptor 886 885 * @ptype: the packet type decoded by hardware ··· 888 887 * skb->protocol must be set before this function is called 889 888 */ 890 889 static void 891 - ice_rx_csum(struct ice_vsi *vsi, struct sk_buff *skb, 890 + ice_rx_csum(struct ice_ring *ring, struct sk_buff *skb, 892 891 union ice_32b_rx_flex_desc *rx_desc, u8 ptype) 893 892 { 894 893 struct ice_rx_ptype_decoded decoded; ··· 905 904 skb_checksum_none_assert(skb); 906 905 907 906 /* check if Rx checksum is enabled */ 908 - if (!(vsi->netdev->features & NETIF_F_RXCSUM)) 907 + if (!(ring->netdev->features & NETIF_F_RXCSUM)) 909 908 return; 910 909 911 910 /* check if HW has decoded the packet and checksum */ ··· 945 944 return; 946 945 947 946 checksum_fail: 948 - vsi->back->hw_csum_rx_error++; 947 + ring->vsi->back->hw_csum_rx_error++; 949 948 } 950 949 951 950 /** ··· 969 968 /* modifies the skb - consumes the enet header */ 970 969 skb->protocol = eth_type_trans(skb, rx_ring->netdev); 971 970 972 - ice_rx_csum(rx_ring->vsi, skb, rx_desc, ptype); 971 + ice_rx_csum(rx_ring, skb, rx_desc, ptype); 973 972 } 974 973 975 974 /** ··· 1068 1067 continue; 1069 1068 } 1070 1069 1071 - rx_ptype = le16_to_cpu(rx_desc->wb.ptype_flex_flags0) & 1072 - ICE_RX_FLEX_DESC_PTYPE_M; 1073 - 1074 1070 stat_err_bits = BIT(ICE_RX_FLEX_DESC_STATUS0_L2TAG1P_S); 1075 1071 if (ice_test_staterr(rx_desc, stat_err_bits)) 1076 1072 vlan_tag = le16_to_cpu(rx_desc->wb.l2tag1); ··· 1084 1086 total_rx_bytes += skb->len; 1085 1087 1086 1088 /* populate checksum, VLAN, and protocol */ 1089 + rx_ptype = le16_to_cpu(rx_desc->wb.ptype_flex_flags0) & 1090 + ICE_RX_FLEX_DESC_PTYPE_M; 1091 + 1087 1092 ice_process_skb_fields(rx_ring, rx_desc, skb, rx_ptype); 1088 1093 1089 1094 /* send completed skb up the stack */ ··· 1226 1225 if (time_after(next_update, rc->next_update)) 1227 1226 goto clear_counts; 1228 1227 1228 + prefetch(q_vector->vsi->port_info); 1229 + 1229 1230 packets = rc->total_pkts; 1230 1231 bytes = rc->total_bytes; 1231 1232 ··· 1357 1354 1358 1355 /** 1359 1356 * ice_update_ena_itr - Update ITR and re-enable MSIX interrupt 1360 - * @vsi: the VSI associated with the q_vector 1361 1357 * @q_vector: q_vector for which ITR is being updated and interrupt enabled 1362 1358 */ 1363 - static void 1364 - ice_update_ena_itr(struct ice_vsi *vsi, struct ice_q_vector *q_vector) 1359 + static void ice_update_ena_itr(struct ice_q_vector *q_vector) 1365 1360 { 1366 1361 struct ice_ring_container *tx = &q_vector->tx; 1367 1362 struct ice_ring_container *rx = &q_vector->rx; 1363 + struct ice_vsi *vsi = q_vector->vsi; 1368 1364 u32 itr_val; 1369 1365 1370 1366 /* when exiting WB_ON_ITR lets set a low ITR value and trigger ··· 1421 1419 q_vector->itr_countdown--; 1422 1420 } 1423 1421 1424 - if (!test_bit(__ICE_DOWN, vsi->state)) 1425 - wr32(&vsi->back->hw, 1422 + if (!test_bit(__ICE_DOWN, q_vector->vsi->state)) 1423 + wr32(&q_vector->vsi->back->hw, 1426 1424 GLINT_DYN_CTL(q_vector->reg_idx), 1427 1425 itr_val); 1428 1426 } 1429 1427 1430 1428 /** 1431 1429 * ice_set_wb_on_itr - set WB_ON_ITR for this q_vector 1432 - * @vsi: pointer to the VSI structure 1433 1430 * @q_vector: q_vector to set WB_ON_ITR on 1434 1431 * 1435 1432 * We need to tell hardware to write-back completed descriptors even when ··· 1441 1440 * value that's not 0 due to ITR granularity. Also, set the INTENA_MSK bit to 1442 1441 * make sure hardware knows we aren't meddling with the INTENA_M bit. 1443 1442 */ 1444 - static void 1445 - ice_set_wb_on_itr(struct ice_vsi *vsi, struct ice_q_vector *q_vector) 1443 + static void ice_set_wb_on_itr(struct ice_q_vector *q_vector) 1446 1444 { 1445 + struct ice_vsi *vsi = q_vector->vsi; 1446 + 1447 1447 /* already in WB_ON_ITR mode no need to change it */ 1448 1448 if (q_vector->itr_countdown == ICE_IN_WB_ON_ITR_MODE) 1449 1449 return; ··· 1475 1473 { 1476 1474 struct ice_q_vector *q_vector = 1477 1475 container_of(napi, struct ice_q_vector, napi); 1478 - struct ice_vsi *vsi = q_vector->vsi; 1479 1476 bool clean_complete = true; 1480 1477 struct ice_ring *ring; 1481 1478 int budget_per_ring; ··· 1484 1483 * budget and be more aggressive about cleaning up the Tx descriptors. 1485 1484 */ 1486 1485 ice_for_each_ring(ring, q_vector->tx) 1487 - if (!ice_clean_tx_irq(vsi, ring, budget)) 1486 + if (!ice_clean_tx_irq(ring, budget)) 1488 1487 clean_complete = false; 1489 1488 1490 1489 /* Handle case where we are called by netpoll with a budget of 0 */ 1491 - if (budget <= 0) 1490 + if (unlikely(budget <= 0)) 1492 1491 return budget; 1493 1492 1494 1493 /* normally we have 1 Rx ring per q_vector */ ··· 1520 1519 * poll us due to busy-polling 1521 1520 */ 1522 1521 if (likely(napi_complete_done(napi, work_done))) 1523 - ice_update_ena_itr(vsi, q_vector); 1522 + ice_update_ena_itr(q_vector); 1524 1523 else 1525 - ice_set_wb_on_itr(vsi, q_vector); 1524 + ice_set_wb_on_itr(q_vector); 1526 1525 1527 1526 return min_t(int, work_done, budget - 1); 1528 1527 }
+23 -13
drivers/net/ethernet/intel/ice/ice_virtchnl_pf.c
··· 129 129 pfe.event = VIRTCHNL_EVENT_LINK_CHANGE; 130 130 pfe.severity = PF_EVENT_SEVERITY_INFO; 131 131 132 - if (vf->link_forced) 132 + /* Always report link is down if the VF queues aren't enabled */ 133 + if (!vf->num_qs_ena) 134 + ice_set_pfe_link(vf, &pfe, ICE_AQ_LINK_SPEED_UNKNOWN, false); 135 + else if (vf->link_forced) 133 136 ice_set_pfe_link_forced(vf, &pfe, vf->link_up); 134 137 else 135 138 ice_set_pfe_link(vf, &pfe, ls->link_speed, ls->link_info & ··· 356 353 * ice_trigger_vf_reset - Reset a VF on HW 357 354 * @vf: pointer to the VF structure 358 355 * @is_vflr: true if VFLR was issued, false if not 356 + * @is_pfr: true if the reset was triggered due to a previous PFR 359 357 * 360 358 * Trigger hardware to start a reset for a particular VF. Expects the caller 361 359 * to wait the proper amount of time to allow hardware to reset the VF before 362 360 * it cleans up and restores VF functionality. 363 361 */ 364 - static void ice_trigger_vf_reset(struct ice_vf *vf, bool is_vflr) 362 + static void ice_trigger_vf_reset(struct ice_vf *vf, bool is_vflr, bool is_pfr) 365 363 { 366 364 struct ice_pf *pf = vf->pf; 367 365 u32 reg, reg_idx, bit_idx; ··· 383 379 */ 384 380 clear_bit(ICE_VF_STATE_INIT, vf->vf_states); 385 381 386 - /* Clear the VF's ARQLEN register. This is how the VF detects reset, 387 - * since the VFGEN_RSTAT register doesn't stick at 0 after reset. 382 + /* VF_MBX_ARQLEN is cleared by PFR, so the driver needs to clear it 383 + * in the case of VFR. If this is done for PFR, it can mess up VF 384 + * resets because the VF driver may already have started cleanup 385 + * by the time we get here. 388 386 */ 389 - wr32(hw, VF_MBX_ARQLEN(vf_abs_id), 0); 387 + if (!is_pfr) 388 + wr32(hw, VF_MBX_ARQLEN(vf_abs_id), 0); 390 389 391 390 /* In the case of a VFLR, the HW has already reset the VF and we 392 391 * just need to clean up, so don't hit the VFRTRIG register. ··· 595 588 /* Update number of VF queues, in case VF had requested for queue 596 589 * changes 597 590 */ 598 - tx_rx_queue_left = min_t(int, pf->q_left_tx, pf->q_left_rx); 591 + tx_rx_queue_left = min_t(int, ice_get_avail_txq_count(pf), 592 + ice_get_avail_rxq_count(pf)); 599 593 tx_rx_queue_left += ICE_DFLT_QS_PER_VF; 600 594 if (vf->num_req_qs && vf->num_req_qs <= tx_rx_queue_left && 601 595 vf->num_req_qs != vf->num_vf_qs) ··· 899 891 * at runtime through Virtchnl, that is the reason we start by reserving 900 892 * few queues. 901 893 */ 902 - num_txq = ice_determine_res(pf, pf->q_left_tx, ICE_DFLT_QS_PER_VF, 903 - ICE_MIN_QS_PER_VF); 894 + num_txq = ice_determine_res(pf, ice_get_avail_txq_count(pf), 895 + ICE_DFLT_QS_PER_VF, ICE_MIN_QS_PER_VF); 904 896 905 - num_rxq = ice_determine_res(pf, pf->q_left_rx, ICE_DFLT_QS_PER_VF, 906 - ICE_MIN_QS_PER_VF); 897 + num_rxq = ice_determine_res(pf, ice_get_avail_rxq_count(pf), 898 + ICE_DFLT_QS_PER_VF, ICE_MIN_QS_PER_VF); 907 899 908 900 if (!num_txq || !num_rxq) 909 901 return -EIO; ··· 1080 1072 1081 1073 /* Begin reset on all VFs at once */ 1082 1074 for (v = 0; v < pf->num_alloc_vfs; v++) 1083 - ice_trigger_vf_reset(&pf->vf[v], is_vflr); 1075 + ice_trigger_vf_reset(&pf->vf[v], is_vflr, true); 1084 1076 1085 1077 for (v = 0; v < pf->num_alloc_vfs; v++) { 1086 1078 struct ice_vsi *vsi; ··· 1180 1172 if (test_and_set_bit(ICE_VF_STATE_DIS, vf->vf_states)) 1181 1173 return false; 1182 1174 1183 - ice_trigger_vf_reset(vf, is_vflr); 1175 + ice_trigger_vf_reset(vf, is_vflr, false); 1184 1176 1185 1177 vsi = pf->vsi[vf->lan_vsi_idx]; 1186 1178 ··· 2512 2504 } 2513 2505 2514 2506 cur_queues = vf->num_vf_qs; 2515 - tx_rx_queue_left = min_t(u16, pf->q_left_tx, pf->q_left_rx); 2507 + tx_rx_queue_left = min_t(u16, ice_get_avail_txq_count(pf), 2508 + ice_get_avail_rxq_count(pf)); 2516 2509 max_allowed_vf_queues = tx_rx_queue_left + cur_queues; 2517 2510 if (!req_queues) { 2518 2511 dev_err(&pf->pdev->dev, ··· 2936 2927 break; 2937 2928 case VIRTCHNL_OP_GET_VF_RESOURCES: 2938 2929 err = ice_vc_get_vf_res_msg(vf, msg); 2930 + ice_vc_notify_vf_link_state(vf); 2939 2931 break; 2940 2932 case VIRTCHNL_OP_RESET_VF: 2941 2933 ice_vc_reset_vf_msg(vf);