···11if ARCH_ACTIONS || COMPILE_TEST2233+config OWL_PM_DOMAINS_HELPER44+ bool55+36config OWL_PM_DOMAINS47 bool "Actions Semi SPS power domains"58 depends on PM99+ select OWL_PM_DOMAINS_HELPER610 select PM_GENERIC_DOMAINS711 help812 Say 'y' here to enable support for Smart Power System (SPS)
···11+/*22+ * Actions Semi Owl Smart Power System (SPS) shared helpers33+ *44+ * Copyright 2012 Actions Semi Inc.55+ * Author: Actions Semi, Inc.66+ *77+ * Copyright (c) 2017 Andreas Färber88+ *99+ * This program is free software; you can redistribute it and/or modify it1010+ * under the terms of the GNU General Public License as published by the1111+ * Free Software Foundation; either version 2 of the License, or (at your1212+ * option) any later version.1313+ */1414+1515+#include <linux/delay.h>1616+#include <linux/io.h>1717+1818+#define OWL_SPS_PG_CTL 0x01919+2020+int owl_sps_set_pg(void __iomem *base, u32 pwr_mask, u32 ack_mask, bool enable)2121+{2222+ u32 val;2323+ bool ack;2424+ int timeout;2525+2626+ val = readl(base + OWL_SPS_PG_CTL);2727+ ack = val & ack_mask;2828+ if (ack == enable)2929+ return 0;3030+3131+ if (enable)3232+ val |= pwr_mask;3333+ else3434+ val &= ~pwr_mask;3535+3636+ writel(val, base + OWL_SPS_PG_CTL);3737+3838+ for (timeout = 5000; timeout > 0; timeout -= 50) {3939+ val = readl(base + OWL_SPS_PG_CTL);4040+ if ((val & ack_mask) == (enable ? ack_mask : 0))4141+ break;4242+ udelay(50);4343+ }4444+ if (timeout <= 0)4545+ return -ETIMEDOUT;4646+4747+ udelay(10);4848+4949+ return 0;5050+}5151+EXPORT_SYMBOL_GPL(owl_sps_set_pg);
+3-31
drivers/soc/actions/owl-sps.c
···1212 * option) any later version.1313 */14141515-#include <linux/delay.h>1616-#include <linux/io.h>1715#include <linux/of_address.h>1816#include <linux/of_platform.h>1917#include <linux/pm_domain.h>1818+#include <linux/soc/actions/owl-sps.h>2019#include <dt-bindings/power/owl-s500-powergate.h>2121-2222-#define OWL_SPS_PG_CTL 0x023202421struct owl_sps_domain_info {2522 const char *name;···48514952static int owl_sps_set_power(struct owl_sps_domain *pd, bool enable)5053{5151- u32 val, pwr_mask, ack_mask;5252- int timeout;5353- bool ack;5454+ u32 pwr_mask, ack_mask;54555556 ack_mask = BIT(pd->info->ack_bit);5657 pwr_mask = BIT(pd->info->pwr_bit);5757- val = readl(pd->sps->base + OWL_SPS_PG_CTL);5858- ack = val & ack_mask;59586060- if (ack == enable)6161- return 0;6262-6363- if (enable)6464- val |= pwr_mask;6565- else6666- val &= ~pwr_mask;6767-6868- writel(val, pd->sps->base + OWL_SPS_PG_CTL);6969-7070- for (timeout = 5000; timeout > 0; timeout -= 50) {7171- val = readl(pd->sps->base + OWL_SPS_PG_CTL);7272- if ((val & ack_mask) == (enable ? ack_mask : 0))7373- break;7474- udelay(50);7575- }7676- if (timeout <= 0)7777- return -ETIMEDOUT;7878-7979- udelay(10);8080-8181- return 0;5959+ return owl_sps_set_pg(pd->sps->base, pwr_mask, ack_mask, enable);8260}83618462static int owl_sps_power_on(struct generic_pm_domain *domain)