tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
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dt-bindings: pinctrl: Add pinctrl for Sophgo SG2042 series SoC

SG2042 introduces a simple pinctrl device for all configurable pins.
For the SG2042 pinctl register file, each register (32 bits) is
responsible for two pins, each occupying the upper 16 bits and lower
16 bits of the register. It supports setting pull up/down, drive
strength and input schmitt trigger.

Add support for SG2042 pinctrl device.

Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/20250211051801.470800-6-inochiama@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

authored by

Inochi Amaoto and committed by
Linus Walleij 68ea8c87 2a85188c

+546
+129
Documentation/devicetree/bindings/pinctrl/sophgo,sg2042-pinctrl.yaml
··· 1 + # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/pinctrl/sophgo,sg2042-pinctrl.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: Sophgo SG2042 Pin Controller 8 + 9 + maintainers: 10 + - Inochi Amaoto <inochiama@outlook.com> 11 + 12 + properties: 13 + compatible: 14 + enum: 15 + - sophgo,sg2042-pinctrl 16 + - sophgo,sg2044-pinctrl 17 + 18 + reg: 19 + maxItems: 1 20 + 21 + patternProperties: 22 + '-cfg$': 23 + type: object 24 + description: 25 + A pinctrl node should contain at least one subnode representing the 26 + pinctrl groups available on the machine. 27 + 28 + additionalProperties: false 29 + 30 + patternProperties: 31 + '-pins$': 32 + type: object 33 + description: | 34 + Each subnode will list the pins it needs, and how they should 35 + be configured, with regard to muxer configuration, bias input 36 + enable/disable, input schmitt trigger enable, drive strength 37 + output enable/disable state. For configuration detail, 38 + refer to https://github.com/sophgo/sophgo-doc/. 39 + 40 + allOf: 41 + - $ref: pincfg-node.yaml# 42 + - $ref: pinmux-node.yaml# 43 + 44 + properties: 45 + pinmux: 46 + description: | 47 + The list of GPIOs and their mux settings that properties in the 48 + node apply to. This should be set using the PINMUX macro. 49 + 50 + bias-disable: true 51 + 52 + bias-pull-up: 53 + type: boolean 54 + 55 + bias-pull-down: 56 + type: boolean 57 + 58 + drive-strength-microamp: 59 + description: typical current when output low level. 60 + 61 + input-schmitt-enable: true 62 + 63 + input-schmitt-disable: true 64 + 65 + required: 66 + - pinmux 67 + 68 + additionalProperties: false 69 + 70 + required: 71 + - compatible 72 + - reg 73 + 74 + allOf: 75 + - if: 76 + properties: 77 + compatible: 78 + contains: 79 + const: sophgo,sg2042-pinctrl 80 + then: 81 + patternProperties: 82 + '-cfg$': 83 + patternProperties: 84 + '-pins$': 85 + properties: 86 + drive-strength-microamp: 87 + enum: [ 5400, 8100, 10700, 13400, 88 + 16100, 18800, 21400, 24100, 89 + 26800, 29400, 32100, 34800, 90 + 37400, 40100, 42800, 45400 ] 91 + 92 + - if: 93 + properties: 94 + compatible: 95 + contains: 96 + const: sophgo,sg2044-pinctrl 97 + then: 98 + patternProperties: 99 + '-cfg$': 100 + patternProperties: 101 + '-pins$': 102 + properties: 103 + drive-strength-microamp: 104 + enum: [ 3200, 6400, 9600, 12700, 105 + 15900, 19100, 22200, 25300, 106 + 29500, 32700, 35900, 39000, 107 + 42000, 45200, 48300, 51400] 108 + 109 + additionalProperties: false 110 + 111 + examples: 112 + - | 113 + #include <dt-bindings/pinctrl/pinctrl-sg2042.h> 114 + 115 + pinctrl@30011000 { 116 + compatible = "sophgo,sg2042-pinctrl"; 117 + reg = <30011000 0x1000>; 118 + 119 + uart0_cfg: uart0-cfg { 120 + uart0-pins { 121 + pinmux = <PINMUX(PIN_UART0_TX, 0)>, 122 + <PINMUX(PIN_UART0_RX, 0)>; 123 + bias-pull-up; 124 + drive-strength-microamp = <13400>; 125 + }; 126 + }; 127 + }; 128 + 129 + ...
+196
include/dt-bindings/pinctrl/pinctrl-sg2042.h
··· 1 + /* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */ 2 + /* 3 + * Copyright (C) 2024 Inochi Amaoto <inochiama@outlook.com> 4 + * 5 + */ 6 + 7 + #ifndef _DT_BINDINGS_PINCTRL_SG2042_H 8 + #define _DT_BINDINGS_PINCTRL_SG2042_H 9 + 10 + #define PINMUX(pin, mux) \ 11 + (((pin) & 0xffff) | (((mux) & 0xff) << 16)) 12 + 13 + #define PIN_LPC_LCLK 0 14 + #define PIN_LPC_LFRAME 1 15 + #define PIN_LPC_LAD0 2 16 + #define PIN_LPC_LAD1 3 17 + #define PIN_LPC_LAD2 4 18 + #define PIN_LPC_LAD3 5 19 + #define PIN_LPC_LDRQ0 6 20 + #define PIN_LPC_LDRQ1 7 21 + #define PIN_LPC_SERIRQ 8 22 + #define PIN_LPC_CLKRUN 9 23 + #define PIN_LPC_LPME 10 24 + #define PIN_LPC_LPCPD 11 25 + #define PIN_LPC_LSMI 12 26 + #define PIN_PCIE0_L0_RESET 13 27 + #define PIN_PCIE0_L1_RESET 14 28 + #define PIN_PCIE0_L0_WAKEUP 15 29 + #define PIN_PCIE0_L1_WAKEUP 16 30 + #define PIN_PCIE0_L0_CLKREQ_IN 17 31 + #define PIN_PCIE0_L1_CLKREQ_IN 18 32 + #define PIN_PCIE1_L0_RESET 19 33 + #define PIN_PCIE1_L1_RESET 20 34 + #define PIN_PCIE1_L0_WAKEUP 21 35 + #define PIN_PCIE1_L1_WAKEUP 22 36 + #define PIN_PCIE1_L0_CLKREQ_IN 23 37 + #define PIN_PCIE1_L1_CLKREQ_IN 24 38 + #define PIN_SPIF0_CLK_SEL1 25 39 + #define PIN_SPIF0_CLK_SEL0 26 40 + #define PIN_SPIF0_WP 27 41 + #define PIN_SPIF0_HOLD 28 42 + #define PIN_SPIF0_SDI 29 43 + #define PIN_SPIF0_CS 30 44 + #define PIN_SPIF0_SCK 31 45 + #define PIN_SPIF0_SDO 32 46 + #define PIN_SPIF1_CLK_SEL1 33 47 + #define PIN_SPIF1_CLK_SEL0 34 48 + #define PIN_SPIF1_WP 35 49 + #define PIN_SPIF1_HOLD 36 50 + #define PIN_SPIF1_SDI 37 51 + #define PIN_SPIF1_CS 38 52 + #define PIN_SPIF1_SCK 39 53 + #define PIN_SPIF1_SDO 40 54 + #define PIN_EMMC_WP 41 55 + #define PIN_EMMC_CD 42 56 + #define PIN_EMMC_RST 43 57 + #define PIN_EMMC_PWR_EN 44 58 + #define PIN_SDIO_CD 45 59 + #define PIN_SDIO_WP 46 60 + #define PIN_SDIO_RST 47 61 + #define PIN_SDIO_PWR_EN 48 62 + #define PIN_RGMII0_TXD0 49 63 + #define PIN_RGMII0_TXD1 50 64 + #define PIN_RGMII0_TXD2 51 65 + #define PIN_RGMII0_TXD3 52 66 + #define PIN_RGMII0_TXCTRL 53 67 + #define PIN_RGMII0_RXD0 54 68 + #define PIN_RGMII0_RXD1 55 69 + #define PIN_RGMII0_RXD2 56 70 + #define PIN_RGMII0_RXD3 57 71 + #define PIN_RGMII0_RXCTRL 58 72 + #define PIN_RGMII0_TXC 59 73 + #define PIN_RGMII0_RXC 60 74 + #define PIN_RGMII0_REFCLKO 61 75 + #define PIN_RGMII0_IRQ 62 76 + #define PIN_RGMII0_MDC 63 77 + #define PIN_RGMII0_MDIO 64 78 + #define PIN_PWM0 65 79 + #define PIN_PWM1 66 80 + #define PIN_PWM2 67 81 + #define PIN_PWM3 68 82 + #define PIN_FAN0 69 83 + #define PIN_FAN1 70 84 + #define PIN_FAN2 71 85 + #define PIN_FAN3 72 86 + #define PIN_IIC0_SDA 73 87 + #define PIN_IIC0_SCL 74 88 + #define PIN_IIC1_SDA 75 89 + #define PIN_IIC1_SCL 76 90 + #define PIN_IIC2_SDA 77 91 + #define PIN_IIC2_SCL 78 92 + #define PIN_IIC3_SDA 79 93 + #define PIN_IIC3_SCL 80 94 + #define PIN_UART0_TX 81 95 + #define PIN_UART0_RX 82 96 + #define PIN_UART0_RTS 83 97 + #define PIN_UART0_CTS 84 98 + #define PIN_UART1_TX 85 99 + #define PIN_UART1_RX 86 100 + #define PIN_UART1_RTS 87 101 + #define PIN_UART1_CTS 88 102 + #define PIN_UART2_TX 89 103 + #define PIN_UART2_RX 90 104 + #define PIN_UART2_RTS 91 105 + #define PIN_UART2_CTS 92 106 + #define PIN_UART3_TX 93 107 + #define PIN_UART3_RX 94 108 + #define PIN_UART3_RTS 95 109 + #define PIN_UART3_CTS 96 110 + #define PIN_SPI0_CS0 97 111 + #define PIN_SPI0_CS1 98 112 + #define PIN_SPI0_SDI 99 113 + #define PIN_SPI0_SDO 100 114 + #define PIN_SPI0_SCK 101 115 + #define PIN_SPI1_CS0 102 116 + #define PIN_SPI1_CS1 103 117 + #define PIN_SPI1_SDI 104 118 + #define PIN_SPI1_SDO 105 119 + #define PIN_SPI1_SCK 106 120 + #define PIN_JTAG0_TDO 107 121 + #define PIN_JTAG0_TCK 108 122 + #define PIN_JTAG0_TDI 109 123 + #define PIN_JTAG0_TMS 110 124 + #define PIN_JTAG0_TRST 111 125 + #define PIN_JTAG0_SRST 112 126 + #define PIN_JTAG1_TDO 113 127 + #define PIN_JTAG1_TCK 114 128 + #define PIN_JTAG1_TDI 115 129 + #define PIN_JTAG1_TMS 116 130 + #define PIN_JTAG1_TRST 117 131 + #define PIN_JTAG1_SRST 118 132 + #define PIN_JTAG2_TDO 119 133 + #define PIN_JTAG2_TCK 120 134 + #define PIN_JTAG2_TDI 121 135 + #define PIN_JTAG2_TMS 122 136 + #define PIN_JTAG2_TRST 123 137 + #define PIN_JTAG2_SRST 124 138 + #define PIN_GPIO0 125 139 + #define PIN_GPIO1 126 140 + #define PIN_GPIO2 127 141 + #define PIN_GPIO3 128 142 + #define PIN_GPIO4 129 143 + #define PIN_GPIO5 130 144 + #define PIN_GPIO6 131 145 + #define PIN_GPIO7 132 146 + #define PIN_GPIO8 133 147 + #define PIN_GPIO9 134 148 + #define PIN_GPIO10 135 149 + #define PIN_GPIO11 136 150 + #define PIN_GPIO12 137 151 + #define PIN_GPIO13 138 152 + #define PIN_GPIO14 139 153 + #define PIN_GPIO15 140 154 + #define PIN_GPIO16 141 155 + #define PIN_GPIO17 142 156 + #define PIN_GPIO18 143 157 + #define PIN_GPIO19 144 158 + #define PIN_GPIO20 145 159 + #define PIN_GPIO21 146 160 + #define PIN_GPIO22 147 161 + #define PIN_GPIO23 148 162 + #define PIN_GPIO24 149 163 + #define PIN_GPIO25 150 164 + #define PIN_GPIO26 151 165 + #define PIN_GPIO27 152 166 + #define PIN_GPIO28 153 167 + #define PIN_GPIO29 154 168 + #define PIN_GPIO30 155 169 + #define PIN_GPIO31 156 170 + #define PIN_MODE_SEL0 157 171 + #define PIN_MODE_SEL1 158 172 + #define PIN_MODE_SEL2 159 173 + #define PIN_BOOT_SEL0 160 174 + #define PIN_BOOT_SEL1 161 175 + #define PIN_BOOT_SEL2 162 176 + #define PIN_BOOT_SEL3 163 177 + #define PIN_BOOT_SEL4 164 178 + #define PIN_BOOT_SEL5 165 179 + #define PIN_BOOT_SEL6 166 180 + #define PIN_BOOT_SEL7 167 181 + #define PIN_MULTI_SCKT 168 182 + #define PIN_SCKT_ID0 169 183 + #define PIN_SCKT_ID1 170 184 + #define PIN_PLL_CLK_IN_MAIN 171 185 + #define PIN_PLL_CLK_IN_DDR_L 172 186 + #define PIN_PLL_CLK_IN_DDR_R 173 187 + #define PIN_XTAL_32K 174 188 + #define PIN_SYS_RST 175 189 + #define PIN_PWR_BUTTON 176 190 + #define PIN_TEST_EN 177 191 + #define PIN_TEST_MODE_MBIST 178 192 + #define PIN_TEST_MODE_SCAN 179 193 + #define PIN_TEST_MODE_BSD 180 194 + #define PIN_BISR_BYP 181 195 + 196 + #endif /* _DT_BINDINGS_PINCTRL_SG2042_H */
+221
include/dt-bindings/pinctrl/pinctrl-sg2044.h
··· 1 + /* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */ 2 + /* 3 + * Copyright (C) 2024 Inochi Amaoto <inochiama@outlook.com> 4 + * 5 + */ 6 + 7 + #ifndef _DT_BINDINGS_PINCTRL_SG2044_H 8 + #define _DT_BINDINGS_PINCTRL_SG2044_H 9 + 10 + #define PINMUX(pin, mux) \ 11 + (((pin) & 0xffff) | (((mux) & 0xff) << 16)) 12 + 13 + #define PIN_IIC0_SMBSUS_IN 0 14 + #define PIN_IIC0_SMBSUS_OUT 1 15 + #define PIN_IIC0_SMBALERT 2 16 + #define PIN_IIC1_SMBSUS_IN 3 17 + #define PIN_IIC1_SMBSUS_OUT 4 18 + #define PIN_IIC1_SMBALERT 5 19 + #define PIN_IIC2_SMBSUS_IN 6 20 + #define PIN_IIC2_SMBSUS_OUT 7 21 + #define PIN_IIC2_SMBALERT 8 22 + #define PIN_IIC3_SMBSUS_IN 9 23 + #define PIN_IIC3_SMBSUS_OUT 10 24 + #define PIN_IIC3_SMBALERT 11 25 + #define PIN_PCIE0_L0_RESET 12 26 + #define PIN_PCIE0_L1_RESET 13 27 + #define PIN_PCIE0_L0_WAKEUP 14 28 + #define PIN_PCIE0_L1_WAKEUP 15 29 + #define PIN_PCIE0_L0_CLKREQ_IN 16 30 + #define PIN_PCIE0_L1_CLKREQ_IN 17 31 + #define PIN_PCIE1_L0_RESET 18 32 + #define PIN_PCIE1_L1_RESET 19 33 + #define PIN_PCIE1_L0_WAKEUP 20 34 + #define PIN_PCIE1_L1_WAKEUP 21 35 + #define PIN_PCIE1_L0_CLKREQ_IN 22 36 + #define PIN_PCIE1_L1_CLKREQ_IN 23 37 + #define PIN_PCIE2_L0_RESET 24 38 + #define PIN_PCIE2_L1_RESET 25 39 + #define PIN_PCIE2_L0_WAKEUP 26 40 + #define PIN_PCIE2_L1_WAKEUP 27 41 + #define PIN_PCIE2_L0_CLKREQ_IN 28 42 + #define PIN_PCIE2_L1_CLKREQ_IN 29 43 + #define PIN_PCIE3_L0_RESET 30 44 + #define PIN_PCIE3_L1_RESET 31 45 + #define PIN_PCIE3_L0_WAKEUP 32 46 + #define PIN_PCIE3_L1_WAKEUP 33 47 + #define PIN_PCIE3_L0_CLKREQ_IN 34 48 + #define PIN_PCIE3_L1_CLKREQ_IN 35 49 + #define PIN_PCIE4_L0_RESET 36 50 + #define PIN_PCIE4_L1_RESET 37 51 + #define PIN_PCIE4_L0_WAKEUP 38 52 + #define PIN_PCIE4_L1_WAKEUP 39 53 + #define PIN_PCIE4_L0_CLKREQ_IN 40 54 + #define PIN_PCIE4_L1_CLKREQ_IN 41 55 + #define PIN_SPIF0_CLK_SEL1 42 56 + #define PIN_SPIF0_CLK_SEL0 43 57 + #define PIN_SPIF0_WP 44 58 + #define PIN_SPIF0_HOLD 45 59 + #define PIN_SPIF0_SDI 46 60 + #define PIN_SPIF0_CS 47 61 + #define PIN_SPIF0_SCK 48 62 + #define PIN_SPIF0_SDO 49 63 + #define PIN_SPIF1_CLK_SEL1 50 64 + #define PIN_SPIF1_CLK_SEL0 51 65 + #define PIN_SPIF1_WP 52 66 + #define PIN_SPIF1_HOLD 53 67 + #define PIN_SPIF1_SDI 54 68 + #define PIN_SPIF1_CS 55 69 + #define PIN_SPIF1_SCK 56 70 + #define PIN_SPIF1_SDO 57 71 + #define PIN_EMMC_WP 58 72 + #define PIN_EMMC_CD 59 73 + #define PIN_EMMC_RST 60 74 + #define PIN_EMMC_PWR_EN 61 75 + #define PIN_SDIO_CD 62 76 + #define PIN_SDIO_WP 63 77 + #define PIN_SDIO_RST 64 78 + #define PIN_SDIO_PWR_EN 65 79 + #define PIN_RGMII0_TXD0 66 80 + #define PIN_RGMII0_TXD1 67 81 + #define PIN_RGMII0_TXD2 68 82 + #define PIN_RGMII0_TXD3 69 83 + #define PIN_RGMII0_TXCTRL 70 84 + #define PIN_RGMII0_RXD0 71 85 + #define PIN_RGMII0_RXD1 72 86 + #define PIN_RGMII0_RXD2 73 87 + #define PIN_RGMII0_RXD3 74 88 + #define PIN_RGMII0_RXCTRL 75 89 + #define PIN_RGMII0_TXC 76 90 + #define PIN_RGMII0_RXC 77 91 + #define PIN_RGMII0_REFCLKO 78 92 + #define PIN_RGMII0_IRQ 79 93 + #define PIN_RGMII0_MDC 80 94 + #define PIN_RGMII0_MDIO 81 95 + #define PIN_PWM0 82 96 + #define PIN_PWM1 83 97 + #define PIN_PWM2 84 98 + #define PIN_PWM3 85 99 + #define PIN_FAN0 86 100 + #define PIN_FAN1 87 101 + #define PIN_FAN2 88 102 + #define PIN_FAN3 89 103 + #define PIN_IIC0_SDA 90 104 + #define PIN_IIC0_SCL 91 105 + #define PIN_IIC1_SDA 92 106 + #define PIN_IIC1_SCL 93 107 + #define PIN_IIC2_SDA 94 108 + #define PIN_IIC2_SCL 95 109 + #define PIN_IIC3_SDA 96 110 + #define PIN_IIC3_SCL 97 111 + #define PIN_UART0_TX 98 112 + #define PIN_UART0_RX 99 113 + #define PIN_UART0_RTS 100 114 + #define PIN_UART0_CTS 101 115 + #define PIN_UART1_TX 102 116 + #define PIN_UART1_RX 103 117 + #define PIN_UART1_RTS 104 118 + #define PIN_UART1_CTS 105 119 + #define PIN_UART2_TX 106 120 + #define PIN_UART2_RX 107 121 + #define PIN_UART2_RTS 108 122 + #define PIN_UART2_CTS 109 123 + #define PIN_UART3_TX 110 124 + #define PIN_UART3_RX 111 125 + #define PIN_UART3_RTS 112 126 + #define PIN_UART3_CTS 113 127 + #define PIN_SPI0_CS0 114 128 + #define PIN_SPI0_CS1 115 129 + #define PIN_SPI0_SDI 116 130 + #define PIN_SPI0_SDO 117 131 + #define PIN_SPI0_SCK 118 132 + #define PIN_SPI1_CS0 119 133 + #define PIN_SPI1_CS1 120 134 + #define PIN_SPI1_SDI 121 135 + #define PIN_SPI1_SDO 122 136 + #define PIN_SPI1_SCK 123 137 + #define PIN_JTAG0_TDO 124 138 + #define PIN_JTAG0_TCK 125 139 + #define PIN_JTAG0_TDI 126 140 + #define PIN_JTAG0_TMS 127 141 + #define PIN_JTAG0_TRST 128 142 + #define PIN_JTAG0_SRST 129 143 + #define PIN_JTAG1_TDO 130 144 + #define PIN_JTAG1_TCK 131 145 + #define PIN_JTAG1_TDI 132 146 + #define PIN_JTAG1_TMS 133 147 + #define PIN_JTAG1_TRST 134 148 + #define PIN_JTAG1_SRST 135 149 + #define PIN_JTAG2_TDO 136 150 + #define PIN_JTAG2_TCK 137 151 + #define PIN_JTAG2_TDI 138 152 + #define PIN_JTAG2_TMS 139 153 + #define PIN_JTAG2_TRST 140 154 + #define PIN_JTAG2_SRST 141 155 + #define PIN_JTAG3_TDO 142 156 + #define PIN_JTAG3_TCK 143 157 + #define PIN_JTAG3_TDI 144 158 + #define PIN_JTAG3_TMS 145 159 + #define PIN_JTAG3_TRST 146 160 + #define PIN_JTAG3_SRST 147 161 + #define PIN_GPIO0 148 162 + #define PIN_GPIO1 149 163 + #define PIN_GPIO2 150 164 + #define PIN_GPIO3 151 165 + #define PIN_GPIO4 152 166 + #define PIN_GPIO5 153 167 + #define PIN_GPIO6 154 168 + #define PIN_GPIO7 155 169 + #define PIN_GPIO8 156 170 + #define PIN_GPIO9 157 171 + #define PIN_GPIO10 158 172 + #define PIN_GPIO11 159 173 + #define PIN_GPIO12 160 174 + #define PIN_GPIO13 161 175 + #define PIN_GPIO14 162 176 + #define PIN_GPIO15 163 177 + #define PIN_GPIO16 164 178 + #define PIN_GPIO17 165 179 + #define PIN_GPIO18 166 180 + #define PIN_GPIO19 167 181 + #define PIN_GPIO20 168 182 + #define PIN_GPIO21 169 183 + #define PIN_GPIO22 170 184 + #define PIN_GPIO23 171 185 + #define PIN_GPIO24 172 186 + #define PIN_GPIO25 173 187 + #define PIN_GPIO26 174 188 + #define PIN_GPIO27 175 189 + #define PIN_GPIO28 176 190 + #define PIN_GPIO29 177 191 + #define PIN_GPIO30 178 192 + #define PIN_GPIO31 179 193 + #define PIN_MODE_SEL0 180 194 + #define PIN_MODE_SEL1 181 195 + #define PIN_MODE_SEL2 182 196 + #define PIN_BOOT_SEL0 183 197 + #define PIN_BOOT_SEL1 184 198 + #define PIN_BOOT_SEL2 185 199 + #define PIN_BOOT_SEL3 186 200 + #define PIN_BOOT_SEL4 187 201 + #define PIN_BOOT_SEL5 188 202 + #define PIN_BOOT_SEL6 189 203 + #define PIN_BOOT_SEL7 190 204 + #define PIN_MULTI_SCKT 191 205 + #define PIN_SCKT_ID0 192 206 + #define PIN_SCKT_ID1 193 207 + #define PIN_PLL_CLK_IN_MAIN 194 208 + #define PIN_PLL_CLK_IN_DDR_0 195 209 + #define PIN_PLL_CLK_IN_DDR_1 196 210 + #define PIN_PLL_CLK_IN_DDR_2 197 211 + #define PIN_PLL_CLK_IN_DDR_3 198 212 + #define PIN_XTAL_32K 199 213 + #define PIN_SYS_RST 200 214 + #define PIN_PWR_BUTTON 201 215 + #define PIN_TEST_EN 202 216 + #define PIN_TEST_MODE_MBIST 203 217 + #define PIN_TEST_MODE_SCAN 204 218 + #define PIN_TEST_MODE_BSD 205 219 + #define PIN_BISR_BYP 206 220 + 221 + #endif /* _DT_BINDINGS_PINCTRL_SG2044_H */