tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
arm64: KVM: VHE: Implement VHE activate/deactivate_traps
Running the kernel in HYP mode requires the HCR_E2H bit to be set
at all times, and the HCR_TGE bit to be set when running as a host
(and cleared when running as a guest). At the same time, the vector
must be set to the current role of the kernel (either host or
hypervisor), and a couple of system registers differ between VHE
and non-VHE.
We implement these by using another set of alternate functions
that get dynamically patched.
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
+53
-8
+2
-1
arch/arm64/include/asm/kvm_arm.h
+2
-1
arch/arm64/include/asm/kvm_arm.h
···
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#include <asm/types.h>
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/* Hyp Configuration Register (HCR) bits */
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#define HCR_E2H (UL(1) << 34)
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#define HCR_ID (UL(1) << 33)
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#define HCR_CD (UL(1) << 32)
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#define HCR_RW_SHIFT 31
···
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HCR_AMO | HCR_SWIO | HCR_TIDCP | HCR_RW)
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#define HCR_VIRT_EXCP_MASK (HCR_VA | HCR_VI | HCR_VF)
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#define HCR_INT_OVERRIDE (HCR_FMO | HCR_IMO)
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-
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#define HCR_HOST_VHE_FLAGS (HCR_RW | HCR_TGE | HCR_E2H)
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/* Hyp System Control Register (SCTLR_EL2) bits */
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#define SCTLR_EL2_EE (1 << 25)
+3
arch/arm64/include/asm/kvm_emulate.h
+3
arch/arm64/include/asm/kvm_emulate.h
···
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#include <asm/kvm_mmio.h>
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#include <asm/ptrace.h>
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#include <asm/cputype.h>
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#include <asm/virt.h>
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unsigned long *vcpu_reg32(const struct kvm_vcpu *vcpu, u8 reg_num);
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unsigned long *vcpu_spsr32(const struct kvm_vcpu *vcpu);
···
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static inline void vcpu_reset_hcr(struct kvm_vcpu *vcpu)
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{
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vcpu->arch.hcr_el2 = HCR_GUEST_FLAGS;
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if (is_kernel_in_hyp_mode())
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vcpu->arch.hcr_el2 |= HCR_E2H;
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if (test_bit(KVM_ARM_VCPU_EL1_32BIT, vcpu->arch.features))
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vcpu->arch.hcr_el2 &= ~HCR_RW;
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}
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-7
arch/arm64/kvm/hyp/switch.c
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-7
arch/arm64/kvm/hyp/switch.c
···
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <asm/kvm_asm.h>
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#include "hyp.h"
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static bool __hyp_text __fpsimd_enabled_nvhe(void)
···
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return __fpsimd_is_enabled()();
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}
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static void __hyp_text __activate_traps_vhe(void)
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{
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u64 val;
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val = read_sysreg(cpacr_el1);
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val |= CPACR_EL1_TTA;
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val &= ~CPACR_EL1_FPEN;
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write_sysreg(val, cpacr_el1);
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write_sysreg(__kvm_hyp_vector, vbar_el1);
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}
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static void __hyp_text __activate_traps_nvhe(void)
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{
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u64 val;
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val = CPTR_EL2_DEFAULT;
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val |= CPTR_EL2_TTA | CPTR_EL2_TFP;
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write_sysreg(val, cptr_el2);
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}
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static hyp_alternate_select(__activate_traps_arch,
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__activate_traps_nvhe, __activate_traps_vhe,
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ARM64_HAS_VIRT_HOST_EXTN);
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static void __hyp_text __activate_traps(struct kvm_vcpu *vcpu)
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{
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u64 val;
···
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write_sysreg(val, hcr_el2);
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/* Trap on AArch32 cp15 c15 accesses (EL1 or EL0) */
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write_sysreg(1 << 15, hstr_el2);
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val = CPTR_EL2_DEFAULT;
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val |= CPTR_EL2_TTA | CPTR_EL2_TFP;
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write_sysreg(val, cptr_el2);
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write_sysreg(vcpu->arch.mdcr_el2, mdcr_el2);
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__activate_traps_arch()();
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}
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static void __hyp_text __deactivate_traps_vhe(void)
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{
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extern char vectors[]; /* kernel exception vectors */
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write_sysreg(HCR_HOST_VHE_FLAGS, hcr_el2);
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write_sysreg(CPACR_EL1_FPEN, cpacr_el1);
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write_sysreg(vectors, vbar_el1);
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}
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static void __hyp_text __deactivate_traps_nvhe(void)
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{
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write_sysreg(HCR_RW, hcr_el2);
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write_sysreg(CPTR_EL2_DEFAULT, cptr_el2);
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}
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static hyp_alternate_select(__deactivate_traps_arch,
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__deactivate_traps_nvhe, __deactivate_traps_vhe,
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ARM64_HAS_VIRT_HOST_EXTN);
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static void __hyp_text __deactivate_traps(struct kvm_vcpu *vcpu)
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{
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-
write_sysreg(HCR_RW, hcr_el2);
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__deactivate_traps_arch()();
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write_sysreg(0, hstr_el2);
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write_sysreg(read_sysreg(mdcr_el2) & MDCR_EL2_HPMN_MASK, mdcr_el2);
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write_sysreg(CPTR_EL2_DEFAULT, cptr_el2);
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}
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static void __hyp_text __activate_vm(struct kvm_vcpu *vcpu)