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kernel os linux

powerpc: Change CONFIG_E500 to CONFIG_PPC_E500

It will be used outside arch/powerpc, make it clear its a
powerpc configuration item.

And we already have CONFIG_PPC_E500MC, so that will make
it more consistent.

Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/e63b22083c11c4300f4a82d3123a46e5fdd54fa6.1663606876.git.christophe.leroy@csgroup.eu

authored by

Christophe Leroy and committed by
Michael Ellerman
688de017 1df39901

+38 -38
+1 -1
arch/powerpc/Makefile
··· 210 210 cpu-as-$(CONFIG_40x) += -Wa,-m405 211 211 cpu-as-$(CONFIG_44x) += -Wa,-m440 212 212 cpu-as-$(CONFIG_ALTIVEC) += $(call as-option,-Wa$(comma)-maltivec) 213 - cpu-as-$(CONFIG_E500) += -Wa,-me500 213 + cpu-as-$(CONFIG_PPC_E500) += -Wa,-me500 214 214 215 215 # When using '-many -mpower4' gas will first try and find a matching power4 216 216 # mnemonic and failing that it will allow any valid mnemonic that GAS knows
+2 -2
arch/powerpc/include/asm/cputable.h
··· 510 510 #elif defined(CONFIG_44x) 511 511 CPU_FTRS_44X | CPU_FTRS_440x6 | 512 512 #endif 513 - #ifdef CONFIG_E500 513 + #ifdef CONFIG_PPC_E500 514 514 CPU_FTRS_E500 | CPU_FTRS_E500_2 | 515 515 #endif 516 516 #ifdef CONFIG_PPC_E500MC ··· 584 584 #elif defined(CONFIG_44x) 585 585 CPU_FTRS_44X & CPU_FTRS_440x6 & 586 586 #endif 587 - #ifdef CONFIG_E500 587 + #ifdef CONFIG_PPC_E500 588 588 CPU_FTRS_E500 & CPU_FTRS_E500_2 & 589 589 #endif 590 590 #ifdef CONFIG_PPC_E500MC
+1 -1
arch/powerpc/include/asm/kgdb.h
··· 52 52 /* On non-E500 family PPC32 we determine the size by picking the last 53 53 * register we need, but on E500 we skip sections so we list what we 54 54 * need to store, and add it up. */ 55 - #ifndef CONFIG_E500 55 + #ifndef CONFIG_PPC_E500 56 56 #define MAXREG (PT_FPSCR+1) 57 57 #else 58 58 /* 32 GPRs (8 bytes), nip, msr, ccr, link, ctr, xer, acc (8 bytes), spefscr*/
+2 -2
arch/powerpc/include/asm/mmu.h
··· 162 162 #elif defined(CONFIG_44x) 163 163 MMU_FTR_TYPE_44x | 164 164 #endif 165 - #ifdef CONFIG_E500 165 + #ifdef CONFIG_PPC_E500 166 166 MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | MMU_FTR_USE_TLBILX | 167 167 #endif 168 168 #ifdef CONFIG_PPC_BOOK3S_32 ··· 211 211 #elif defined(CONFIG_44x) 212 212 #define MMU_FTRS_ALWAYS MMU_FTR_TYPE_44x 213 213 #endif 214 - #ifdef CONFIG_E500 214 + #ifdef CONFIG_PPC_E500 215 215 #define MMU_FTRS_ALWAYS MMU_FTR_TYPE_FSL_E 216 216 #endif 217 217
+3 -3
arch/powerpc/include/asm/reg_booke.h
··· 246 246 #define PPC47x_MCSR_FPR 0x00800000 /* FPR parity error */ 247 247 #define PPC47x_MCSR_IPR 0x00400000 /* Imprecise Machine Check Exception */ 248 248 249 - #ifdef CONFIG_E500 249 + #ifdef CONFIG_PPC_E500 250 250 /* All e500 */ 251 251 #define MCSR_MCP 0x80000000UL /* Machine Check Input Pin */ 252 252 #define MCSR_ICPERR 0x40000000UL /* I-Cache Parity Error */ ··· 282 282 #endif 283 283 284 284 /* Bit definitions for the HID1 */ 285 - #ifdef CONFIG_E500 285 + #ifdef CONFIG_PPC_E500 286 286 /* e500v1/v2 */ 287 287 #define HID1_PLL_CFG_MASK 0xfc000000 /* PLL_CFG input pins */ 288 288 #define HID1_RFXE 0x00020000 /* Read fault exception enable */ ··· 545 545 #define TCR_FIE 0x00800000 /* FIT Interrupt Enable */ 546 546 #define TCR_ARE 0x00400000 /* Auto Reload Enable */ 547 547 548 - #ifdef CONFIG_E500 548 + #ifdef CONFIG_PPC_E500 549 549 #define TCR_GET_WP(tcr) ((((tcr) & 0xC0000000) >> 30) | \ 550 550 (((tcr) & 0x1E0000) >> 15)) 551 551 #else
+1 -1
arch/powerpc/include/asm/synch.h
··· 44 44 45 45 #if defined(__powerpc64__) 46 46 # define LWSYNC lwsync 47 - #elif defined(CONFIG_E500) 47 + #elif defined(CONFIG_PPC_E500) 48 48 # define LWSYNC \ 49 49 START_LWSYNC_SECTION(96); \ 50 50 sync; \
+1 -1
arch/powerpc/include/asm/vdso/timebase.h
··· 12 12 * We use __powerpc64__ here because we want the compat VDSO to use the 32-bit 13 13 * version below in the else case of the ifdef. 14 14 */ 15 - #if defined(__powerpc64__) && (defined(CONFIG_PPC_CELL) || defined(CONFIG_E500)) 15 + #if defined(__powerpc64__) && (defined(CONFIG_PPC_CELL) || defined(CONFIG_PPC_E500)) 16 16 #define mftb() ({unsigned long rval; \ 17 17 asm volatile( \ 18 18 "90: mfspr %0, %2;\n" \
+1 -1
arch/powerpc/kernel/Makefile
··· 101 101 obj-$(CONFIG_FA_DUMP) += fadump.o 102 102 obj-$(CONFIG_PRESERVE_FA_DUMP) += fadump.o 103 103 ifdef CONFIG_PPC32 104 - obj-$(CONFIG_E500) += idle_e500.o 104 + obj-$(CONFIG_PPC_E500) += idle_e500.o 105 105 endif 106 106 obj-$(CONFIG_PPC_BOOK3S_32) += idle_6xx.o l2cr_6xx.o cpu_setup_6xx.o 107 107 obj-$(CONFIG_TAU) += tau_6xx.o
+2 -2
arch/powerpc/kernel/cpu_setup_fsl_booke.S
··· 108 108 #endif /* CONFIG_PPC_E500MC */ 109 109 110 110 #ifdef CONFIG_PPC32 111 - #ifdef CONFIG_E500 111 + #ifdef CONFIG_PPC_E500 112 112 #ifndef CONFIG_PPC_E500MC 113 113 _GLOBAL(__setup_cpu_e500v1) 114 114 _GLOBAL(__setup_cpu_e500v2) ··· 156 156 mtlr r5 157 157 blr 158 158 #endif /* CONFIG_PPC_E500MC */ 159 - #endif /* CONFIG_E500 */ 159 + #endif /* CONFIG_PPC_E500 */ 160 160 #endif /* CONFIG_PPC32 */ 161 161 162 162 #ifdef CONFIG_PPC_BOOK3E_64
+2 -2
arch/powerpc/kernel/entry_32.S
··· 49 49 */ 50 50 .align 12 51 51 52 - #if defined(CONFIG_PPC_BOOK3S_32) || defined(CONFIG_E500) 52 + #if defined(CONFIG_PPC_BOOK3S_32) || defined(CONFIG_PPC_E500) 53 53 .globl prepare_transfer_to_handler 54 54 prepare_transfer_to_handler: 55 55 /* if from kernel, check interrupted DOZE/NAP mode */ ··· 71 71 lwz r2, GPR2(r11) 72 72 b fast_exception_return 73 73 _ASM_NOKPROBE_SYMBOL(prepare_transfer_to_handler) 74 - #endif /* CONFIG_PPC_BOOK3S_32 || CONFIG_E500 */ 74 + #endif /* CONFIG_PPC_BOOK3S_32 || CONFIG_PPC_E500 */ 75 75 76 76 #if defined(CONFIG_PPC_KUEP) && defined(CONFIG_PPC_BOOK3S_32) 77 77 .globl __kuep_lock
+2 -2
arch/powerpc/kernel/head_85xx.S
··· 912 912 * Global functions 913 913 */ 914 914 915 - #ifdef CONFIG_E500 915 + #ifdef CONFIG_PPC_E500 916 916 #ifndef CONFIG_PPC_E500MC 917 917 /* Adjust or setup IVORs for e500v1/v2 */ 918 918 _GLOBAL(__setup_e500_ivors) ··· 955 955 sync 956 956 blr 957 957 #endif /* CONFIG_PPC_E500MC */ 958 - #endif /* CONFIG_E500 */ 958 + #endif /* CONFIG_PPC_E500 */ 959 959 960 960 #ifdef CONFIG_SPE 961 961 /*
+1 -1
arch/powerpc/kernel/head_booke.h
··· 103 103 .endm 104 104 105 105 .macro prepare_transfer_to_handler 106 - #ifdef CONFIG_E500 106 + #ifdef CONFIG_PPC_E500 107 107 andi. r12,r9,MSR_PR 108 108 bne 777f 109 109 bl prepare_transfer_to_handler
+1 -1
arch/powerpc/kernel/setup_32.c
··· 207 207 ppc_md.power_save = ppc6xx_idle; 208 208 #endif 209 209 210 - #ifdef CONFIG_E500 210 + #ifdef CONFIG_PPC_E500 211 211 if (cpu_has_feature(CPU_FTR_CAN_DOZE) || 212 212 cpu_has_feature(CPU_FTR_CAN_NAP)) 213 213 ppc_md.power_save = e500_idle;
+1 -1
arch/powerpc/kernel/traps.c
··· 600 600 601 601 #define inst_length(reason) (((reason) & REASON_PREFIXED) ? 8 : 4) 602 602 603 - #if defined(CONFIG_E500) 603 + #if defined(CONFIG_PPC_E500) 604 604 int machine_check_e500mc(struct pt_regs *regs) 605 605 { 606 606 unsigned long mcsr = mfspr(SPRN_MCSR);
+2 -2
arch/powerpc/kvm/Kconfig
··· 189 189 190 190 config KVM_E500V2 191 191 bool "KVM support for PowerPC E500v2 processors" 192 - depends on E500 && !PPC_E500MC 192 + depends on PPC_E500 && !PPC_E500MC 193 193 select KVM 194 194 select KVM_MMIO 195 195 select MMU_NOTIFIER ··· 220 220 221 221 config KVM_MPIC 222 222 bool "KVM in-kernel MPIC emulation" 223 - depends on KVM && E500 223 + depends on KVM && PPC_E500 224 224 select HAVE_KVM_IRQCHIP 225 225 select HAVE_KVM_IRQFD 226 226 select HAVE_KVM_IRQ_ROUTING
+13 -13
arch/powerpc/platforms/Kconfig.cputype
··· 33 33 34 34 config PPC_85xx 35 35 bool "Freescale 85xx" 36 - select E500 36 + select PPC_E500 37 37 38 38 config PPC_8xx 39 39 bool "Freescale 8xx" ··· 108 108 config PPC_BOOK3E_64 109 109 bool "Embedded processors" 110 110 select PPC_FSL_BOOK3E 111 - select E500 111 + select PPC_E500 112 112 select PPC_E500MC 113 113 select PPC_FPU # Make it a choice ? 114 114 select PPC_SMP_MUXED_IPI ··· 175 175 176 176 config E5500_CPU 177 177 bool "Freescale e5500" 178 - depends on PPC64 && E500 178 + depends on PPC64 && PPC_E500 179 179 180 180 config E6500_CPU 181 181 bool "Freescale e6500" 182 - depends on PPC64 && E500 182 + depends on PPC64 && PPC_E500 183 183 184 184 config 405_CPU 185 185 bool "40x family" ··· 257 257 def_bool y 258 258 depends on PPC_BOOK3S_32 || PPC_BOOK3S_64 259 259 260 - config E500 260 + config PPC_E500 261 261 select FSL_EMB_PERFMON 262 262 select PPC_FSL_BOOK3E 263 263 bool ··· 266 266 bool "e500mc Support" 267 267 select PPC_FPU 268 268 select COMMON_CLK 269 - depends on E500 269 + depends on PPC_E500 270 270 help 271 271 This must be enabled for running on e500mc (and derivatives 272 272 such as e5500/e6500), and must be disabled for running on ··· 289 289 290 290 config FSL_EMB_PERFMON 291 291 bool "Freescale Embedded Perfmon" 292 - depends on E500 || PPC_83xx 292 + depends on PPC_E500 || PPC_83xx 293 293 help 294 294 This is the Performance Monitor support found on the e500 core 295 295 and some e300 cores (c3 and c4). Select this only if your ··· 302 302 303 303 config FSL_EMB_PERF_EVENT_E500 304 304 bool 305 - depends on FSL_EMB_PERF_EVENT && E500 305 + depends on FSL_EMB_PERF_EVENT && PPC_E500 306 306 default y 307 307 308 308 config 4xx ··· 312 312 313 313 config BOOKE 314 314 bool 315 - depends on E500 || 44x || PPC_BOOK3E_64 315 + depends on PPC_E500 || 44x || PPC_BOOK3E_64 316 316 default y 317 317 318 318 config BOOKE_OR_40x ··· 332 332 333 333 config PTE_64BIT 334 334 bool 335 - depends on 44x || E500 || PPC_86xx 335 + depends on 44x || PPC_E500 || PPC_86xx 336 336 default y if PHYS_64BIT 337 337 338 338 config PHYS_64BIT 339 - bool 'Large physical address support' if E500 || PPC_86xx 340 - depends on (44x || E500 || PPC_86xx) && !PPC_83xx && !PPC_82xx 339 + bool 'Large physical address support' if PPC_E500 || PPC_86xx 340 + depends on (44x || PPC_E500 || PPC_86xx) && !PPC_83xx && !PPC_82xx 341 341 select PHYS_ADDR_T_64BIT 342 342 help 343 343 This option enables kernel support for larger than 32-bit physical ··· 384 384 385 385 config SPE_POSSIBLE 386 386 def_bool y 387 - depends on E500 && !PPC_E500MC 387 + depends on PPC_E500 && !PPC_E500MC 388 388 389 389 config SPE 390 390 bool "SPE Support"
+1 -1
arch/powerpc/sysdev/fsl_pci.c
··· 943 943 return 0; 944 944 } 945 945 946 - #ifdef CONFIG_E500 946 + #ifdef CONFIG_PPC_E500 947 947 static int mcheck_handle_load(struct pt_regs *regs, u32 inst) 948 948 { 949 949 unsigned int rd, ra, rb, d;
+1 -1
arch/powerpc/sysdev/fsl_rio.c
··· 98 98 struct fsl_rio_dbell *dbell; 99 99 struct fsl_rio_pw *pw; 100 100 101 - #ifdef CONFIG_E500 101 + #ifdef CONFIG_PPC_E500 102 102 int fsl_rio_mcheck_exception(struct pt_regs *regs) 103 103 { 104 104 const struct exception_table_entry *entry;