Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

gpu: host1x: Add DMA fence implementation

Add an implementation of dma_fences based on syncpoints. Syncpoint
interrupts are used to signal fences. Additionally, after
software signaling has been enabled, a 30 second timeout is started.
If the syncpoint threshold is not reached within this period,
the fence is signalled with an -ETIMEDOUT error code. This is to
allow fences that would never reach their syncpoint threshold to
be cleaned up. The timeout can potentially be removed in the future
after job tracking code has been refactored.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

authored by

Mikko Perttunen and committed by
Thierry Reding
687db220 e73f0f0e

+195
+1
drivers/gpu/host1x/Makefile
··· 9 9 job.o \ 10 10 debug.o \ 11 11 mipi.o \ 12 + fence.o \ 12 13 hw/host1x01.o \ 13 14 hw/host1x02.o \ 14 15 hw/host1x04.o \
+168
drivers/gpu/host1x/fence.c
··· 1 + // SPDX-License-Identifier: GPL-2.0-only 2 + /* 3 + * Syncpoint dma_fence implementation 4 + * 5 + * Copyright (c) 2020, NVIDIA Corporation. 6 + */ 7 + 8 + #include <linux/dma-fence.h> 9 + #include <linux/file.h> 10 + #include <linux/fs.h> 11 + #include <linux/slab.h> 12 + #include <linux/sync_file.h> 13 + 14 + #include "fence.h" 15 + #include "intr.h" 16 + #include "syncpt.h" 17 + 18 + DEFINE_SPINLOCK(lock); 19 + 20 + struct host1x_syncpt_fence { 21 + struct dma_fence base; 22 + 23 + atomic_t signaling; 24 + 25 + struct host1x_syncpt *sp; 26 + u32 threshold; 27 + 28 + struct host1x_waitlist *waiter; 29 + void *waiter_ref; 30 + 31 + struct delayed_work timeout_work; 32 + }; 33 + 34 + static const char *host1x_syncpt_fence_get_driver_name(struct dma_fence *f) 35 + { 36 + return "host1x"; 37 + } 38 + 39 + static const char *host1x_syncpt_fence_get_timeline_name(struct dma_fence *f) 40 + { 41 + return "syncpoint"; 42 + } 43 + 44 + static struct host1x_syncpt_fence *to_host1x_fence(struct dma_fence *f) 45 + { 46 + return container_of(f, struct host1x_syncpt_fence, base); 47 + } 48 + 49 + static bool host1x_syncpt_fence_enable_signaling(struct dma_fence *f) 50 + { 51 + struct host1x_syncpt_fence *sf = to_host1x_fence(f); 52 + int err; 53 + 54 + if (host1x_syncpt_is_expired(sf->sp, sf->threshold)) 55 + return false; 56 + 57 + dma_fence_get(f); 58 + 59 + /* 60 + * The dma_fence framework requires the fence driver to keep a 61 + * reference to any fences for which 'enable_signaling' has been 62 + * called (and that have not been signalled). 63 + * 64 + * We provide a userspace API to create arbitrary syncpoint fences, 65 + * so we cannot normally guarantee that all fences get signalled. 66 + * As such, setup a timeout, so that long-lasting fences will get 67 + * reaped eventually. 68 + */ 69 + schedule_delayed_work(&sf->timeout_work, msecs_to_jiffies(30000)); 70 + 71 + err = host1x_intr_add_action(sf->sp->host, sf->sp, sf->threshold, 72 + HOST1X_INTR_ACTION_SIGNAL_FENCE, f, 73 + sf->waiter, &sf->waiter_ref); 74 + if (err) { 75 + cancel_delayed_work_sync(&sf->timeout_work); 76 + dma_fence_put(f); 77 + return false; 78 + } 79 + 80 + /* intr framework takes ownership of waiter */ 81 + sf->waiter = NULL; 82 + 83 + /* 84 + * The fence may get signalled at any time after the above call, 85 + * so we need to initialize all state used by signalling 86 + * before it. 87 + */ 88 + 89 + return true; 90 + } 91 + 92 + static void host1x_syncpt_fence_release(struct dma_fence *f) 93 + { 94 + struct host1x_syncpt_fence *sf = to_host1x_fence(f); 95 + 96 + if (sf->waiter) 97 + kfree(sf->waiter); 98 + 99 + dma_fence_free(f); 100 + } 101 + 102 + const struct dma_fence_ops host1x_syncpt_fence_ops = { 103 + .get_driver_name = host1x_syncpt_fence_get_driver_name, 104 + .get_timeline_name = host1x_syncpt_fence_get_timeline_name, 105 + .enable_signaling = host1x_syncpt_fence_enable_signaling, 106 + .release = host1x_syncpt_fence_release, 107 + }; 108 + 109 + void host1x_fence_signal(struct host1x_syncpt_fence *f) 110 + { 111 + if (atomic_xchg(&f->signaling, 1)) 112 + return; 113 + 114 + /* 115 + * Cancel pending timeout work - if it races, it will 116 + * not get 'f->signaling' and return. 117 + */ 118 + cancel_delayed_work_sync(&f->timeout_work); 119 + 120 + host1x_intr_put_ref(f->sp->host, f->sp->id, f->waiter_ref, false); 121 + 122 + dma_fence_signal(&f->base); 123 + dma_fence_put(&f->base); 124 + } 125 + 126 + static void do_fence_timeout(struct work_struct *work) 127 + { 128 + struct delayed_work *dwork = (struct delayed_work *)work; 129 + struct host1x_syncpt_fence *f = 130 + container_of(dwork, struct host1x_syncpt_fence, timeout_work); 131 + 132 + if (atomic_xchg(&f->signaling, 1)) 133 + return; 134 + 135 + /* 136 + * Cancel pending timeout work - if it races, it will 137 + * not get 'f->signaling' and return. 138 + */ 139 + host1x_intr_put_ref(f->sp->host, f->sp->id, f->waiter_ref, true); 140 + 141 + dma_fence_set_error(&f->base, -ETIMEDOUT); 142 + dma_fence_signal(&f->base); 143 + dma_fence_put(&f->base); 144 + } 145 + 146 + struct dma_fence *host1x_fence_create(struct host1x_syncpt *sp, u32 threshold) 147 + { 148 + struct host1x_syncpt_fence *fence; 149 + 150 + fence = kzalloc(sizeof(*fence), GFP_KERNEL); 151 + if (!fence) 152 + return ERR_PTR(-ENOMEM); 153 + 154 + fence->waiter = kzalloc(sizeof(*fence->waiter), GFP_KERNEL); 155 + if (!fence->waiter) 156 + return ERR_PTR(-ENOMEM); 157 + 158 + fence->sp = sp; 159 + fence->threshold = threshold; 160 + 161 + dma_fence_init(&fence->base, &host1x_syncpt_fence_ops, &lock, 162 + dma_fence_context_alloc(1), 0); 163 + 164 + INIT_DELAYED_WORK(&fence->timeout_work, do_fence_timeout); 165 + 166 + return &fence->base; 167 + } 168 + EXPORT_SYMBOL(host1x_fence_create);
+13
drivers/gpu/host1x/fence.h
··· 1 + /* SPDX-License-Identifier: GPL-2.0-only */ 2 + /* 3 + * Copyright (c) 2020, NVIDIA Corporation. 4 + */ 5 + 6 + #ifndef HOST1X_FENCE_H 7 + #define HOST1X_FENCE_H 8 + 9 + struct host1x_syncpt_fence; 10 + 11 + void host1x_fence_signal(struct host1x_syncpt_fence *fence); 12 + 13 + #endif
+9
drivers/gpu/host1x/intr.c
··· 13 13 #include <trace/events/host1x.h> 14 14 #include "channel.h" 15 15 #include "dev.h" 16 + #include "fence.h" 16 17 #include "intr.h" 17 18 18 19 /* Wait list management */ ··· 122 121 wake_up_interruptible(wq); 123 122 } 124 123 124 + static void action_signal_fence(struct host1x_waitlist *waiter) 125 + { 126 + struct host1x_syncpt_fence *f = waiter->data; 127 + 128 + host1x_fence_signal(f); 129 + } 130 + 125 131 typedef void (*action_handler)(struct host1x_waitlist *waiter); 126 132 127 133 static const action_handler action_handlers[HOST1X_INTR_ACTION_COUNT] = { 128 134 action_submit_complete, 129 135 action_wakeup, 130 136 action_wakeup_interruptible, 137 + action_signal_fence, 131 138 }; 132 139 133 140 static void run_handlers(struct list_head completed[HOST1X_INTR_ACTION_COUNT])
+2
drivers/gpu/host1x/intr.h
··· 33 33 */ 34 34 HOST1X_INTR_ACTION_WAKEUP_INTERRUPTIBLE, 35 35 36 + HOST1X_INTR_ACTION_SIGNAL_FENCE, 37 + 36 38 HOST1X_INTR_ACTION_COUNT 37 39 }; 38 40
+2
include/linux/host1x.h
··· 170 170 void host1x_syncpt_release_vblank_reservation(struct host1x_client *client, 171 171 u32 syncpt_id); 172 172 173 + struct dma_fence *host1x_fence_create(struct host1x_syncpt *sp, u32 threshold); 174 + 173 175 /* 174 176 * host1x channel 175 177 */