tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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[PATCH] ARM: bitops

Convert ARM bitop assembly to a macro. All bitops follow the same
format, so it's silly duplicating the code when only one or two
instructions are different.

Signed-off-by: Russell King <rmk@arm.linux.org.uk>

Russell King 684f970e 652a12ef

+12 -68
+2 -9
arch/arm/lib/changebit.S
··· 9 9 */ 10 10 #include <linux/linkage.h> 11 11 #include <asm/assembler.h> 12 + #include "bitops.h" 12 13 .text 13 14 14 15 /* Purpose : Function to change a bit ··· 18 17 ENTRY(_change_bit_be) 19 18 eor r0, r0, #0x18 @ big endian byte ordering 20 19 ENTRY(_change_bit_le) 21 - and r2, r0, #7 22 - mov r3, #1 23 - mov r3, r3, lsl r2 24 - save_and_disable_irqs ip, r2 25 - ldrb r2, [r1, r0, lsr #3] 26 - eor r2, r2, r3 27 - strb r2, [r1, r0, lsr #3] 28 - restore_irqs ip 29 - RETINSTR(mov,pc,lr) 20 + bitop eor
+2 -11
arch/arm/lib/clearbit.S
··· 9 9 */ 10 10 #include <linux/linkage.h> 11 11 #include <asm/assembler.h> 12 + #include "bitops.h" 12 13 .text 13 14 14 15 /* ··· 19 18 ENTRY(_clear_bit_be) 20 19 eor r0, r0, #0x18 @ big endian byte ordering 21 20 ENTRY(_clear_bit_le) 22 - and r2, r0, #7 23 - mov r3, #1 24 - mov r3, r3, lsl r2 25 - save_and_disable_irqs ip, r2 26 - ldrb r2, [r1, r0, lsr #3] 27 - bic r2, r2, r3 28 - strb r2, [r1, r0, lsr #3] 29 - restore_irqs ip 30 - RETINSTR(mov,pc,lr) 31 - 32 - 21 + bitop bic
+2 -9
arch/arm/lib/setbit.S
··· 9 9 */ 10 10 #include <linux/linkage.h> 11 11 #include <asm/assembler.h> 12 + #include "bitops.h" 12 13 .text 13 14 14 15 /* ··· 19 18 ENTRY(_set_bit_be) 20 19 eor r0, r0, #0x18 @ big endian byte ordering 21 20 ENTRY(_set_bit_le) 22 - and r2, r0, #7 23 - mov r3, #1 24 - mov r3, r3, lsl r2 25 - save_and_disable_irqs ip, r2 26 - ldrb r2, [r1, r0, lsr #3] 27 - orr r2, r2, r3 28 - strb r2, [r1, r0, lsr #3] 29 - restore_irqs ip 30 - RETINSTR(mov,pc,lr) 21 + bitop orr
+2 -13
arch/arm/lib/testchangebit.S
··· 9 9 */ 10 10 #include <linux/linkage.h> 11 11 #include <asm/assembler.h> 12 + #include "bitops.h" 12 13 .text 13 14 14 15 ENTRY(_test_and_change_bit_be) 15 16 eor r0, r0, #0x18 @ big endian byte ordering 16 17 ENTRY(_test_and_change_bit_le) 17 - add r1, r1, r0, lsr #3 18 - and r3, r0, #7 19 - mov r0, #1 20 - save_and_disable_irqs ip, r2 21 - ldrb r2, [r1] 22 - tst r2, r0, lsl r3 23 - eor r2, r2, r0, lsl r3 24 - strb r2, [r1] 25 - restore_irqs ip 26 - moveq r0, #0 27 - RETINSTR(mov,pc,lr) 28 - 29 - 18 + testop eor, strb
+2 -13
arch/arm/lib/testclearbit.S
··· 9 9 */ 10 10 #include <linux/linkage.h> 11 11 #include <asm/assembler.h> 12 + #include "bitops.h" 12 13 .text 13 14 14 15 ENTRY(_test_and_clear_bit_be) 15 16 eor r0, r0, #0x18 @ big endian byte ordering 16 17 ENTRY(_test_and_clear_bit_le) 17 - add r1, r1, r0, lsr #3 @ Get byte offset 18 - and r3, r0, #7 @ Get bit offset 19 - mov r0, #1 20 - save_and_disable_irqs ip, r2 21 - ldrb r2, [r1] 22 - tst r2, r0, lsl r3 23 - bic r2, r2, r0, lsl r3 24 - strb r2, [r1] 25 - restore_irqs ip 26 - moveq r0, #0 27 - RETINSTR(mov,pc,lr) 28 - 29 - 18 + testop bicne, strneb
+2 -13
arch/arm/lib/testsetbit.S
··· 9 9 */ 10 10 #include <linux/linkage.h> 11 11 #include <asm/assembler.h> 12 + #include "bitops.h" 12 13 .text 13 14 14 15 ENTRY(_test_and_set_bit_be) 15 16 eor r0, r0, #0x18 @ big endian byte ordering 16 17 ENTRY(_test_and_set_bit_le) 17 - add r1, r1, r0, lsr #3 @ Get byte offset 18 - and r3, r0, #7 @ Get bit offset 19 - mov r0, #1 20 - save_and_disable_irqs ip, r2 21 - ldrb r2, [r1] 22 - tst r2, r0, lsl r3 23 - orr r2, r2, r0, lsl r3 24 - strb r2, [r1] 25 - restore_irqs ip 26 - moveq r0, #0 27 - RETINSTR(mov,pc,lr) 28 - 29 - 18 + testop orreq, streqb