tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
fork atom

drm/i915: rename vlv_sideband*.[ch] to vlv_iosf_sb*.[ch]

Be more specific in the naming, and follow the existing function naming
pattern of vlv_iosf_sb_*() in the file.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://lore.kernel.org/r/d3d97d34a197ba801c558c3fd72b29f9e5c783af.1747061743.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Jani Nikula 6819b5a6 f77d8675

+31 -31
+1 -1
drivers/gpu/drm/i915/Makefile
··· 45 45 intel_uncore.o \ 46 46 intel_uncore_trace.o \ 47 47 intel_wakeref.o \ 48 - vlv_sideband.o \ 48 + vlv_iosf_sb.o \ 49 49 vlv_suspend.o 50 50 51 51 # core peripheral code
+1 -1
drivers/gpu/drm/i915/display/i9xx_wm.c
··· 16 16 #include "intel_mchbar_regs.h" 17 17 #include "intel_wm.h" 18 18 #include "skl_watermark.h" 19 - #include "vlv_sideband.h" 19 + #include "vlv_iosf_sb.h" 20 20 21 21 struct intel_watermark_params { 22 22 u16 fifo_size;
+1 -1
drivers/gpu/drm/i915/display/intel_cdclk.c
··· 47 47 #include "skl_watermark.h" 48 48 #include "skl_watermark_regs.h" 49 49 #include "vlv_dsi.h" 50 - #include "vlv_sideband.h" 50 + #include "vlv_iosf_sb.h" 51 51 52 52 /** 53 53 * DOC: CDCLK / RAWCLK
+1 -1
drivers/gpu/drm/i915/display/intel_display.c
··· 131 131 #include "vlv_dsi.h" 132 132 #include "vlv_dsi_pll.h" 133 133 #include "vlv_dsi_regs.h" 134 - #include "vlv_sideband.h" 134 + #include "vlv_iosf_sb.h" 135 135 136 136 static void intel_set_transcoder_timings(const struct intel_crtc_state *crtc_state); 137 137 static void intel_set_pipe_src_size(const struct intel_crtc_state *crtc_state);
+1 -1
drivers/gpu/drm/i915/display/intel_display_power.c
··· 27 27 #include "intel_snps_phy.h" 28 28 #include "skl_watermark.h" 29 29 #include "skl_watermark_regs.h" 30 - #include "vlv_sideband.h" 30 + #include "vlv_iosf_sb.h" 31 31 32 32 #define for_each_power_domain_well(__display, __power_well, __domain) \ 33 33 for_each_power_well((__display), __power_well) \
+1 -1
drivers/gpu/drm/i915/display/intel_display_power_map.c
··· 10 10 #include "intel_display_power_map.h" 11 11 #include "intel_display_power_well.h" 12 12 #include "intel_display_types.h" 13 - #include "vlv_sideband_reg.h" 13 + #include "vlv_iosf_sb_reg.h" 14 14 15 15 #define __LIST_INLINE_ELEMS(__elem_type, ...) \ 16 16 ((__elem_type[]) { __VA_ARGS__ })
+2 -2
drivers/gpu/drm/i915/display/intel_display_power_well.c
··· 30 30 #include "intel_vga.h" 31 31 #include "skl_watermark.h" 32 32 #include "vlv_dpio_phy_regs.h" 33 - #include "vlv_sideband.h" 34 - #include "vlv_sideband_reg.h" 33 + #include "vlv_iosf_sb.h" 34 + #include "vlv_iosf_sb_reg.h" 35 35 36 36 struct i915_power_well_regs { 37 37 i915_reg_t bios;
+1 -1
drivers/gpu/drm/i915/display/intel_dpio_phy.c
··· 32 32 #include "intel_dp.h" 33 33 #include "intel_dpio_phy.h" 34 34 #include "vlv_dpio_phy_regs.h" 35 - #include "vlv_sideband.h" 35 + #include "vlv_iosf_sb.h" 36 36 37 37 /** 38 38 * DOC: DPIO
+1 -1
drivers/gpu/drm/i915/display/intel_dpll.c
··· 22 22 #include "intel_pps.h" 23 23 #include "intel_snps_phy.h" 24 24 #include "vlv_dpio_phy_regs.h" 25 - #include "vlv_sideband.h" 25 + #include "vlv_iosf_sb.h" 26 26 27 27 struct intel_dpll_funcs { 28 28 int (*crtc_compute_clock)(struct intel_atomic_state *state,
+1 -1
drivers/gpu/drm/i915/display/intel_dsi_vbt.c
··· 49 49 #include "intel_pps_regs.h" 50 50 #include "vlv_dsi.h" 51 51 #include "vlv_dsi_regs.h" 52 - #include "vlv_sideband.h" 52 + #include "vlv_iosf_sb.h" 53 53 54 54 #define MIPI_TRANSFER_MODE_SHIFT 0 55 55 #define MIPI_VIRTUAL_CHANNEL_SHIFT 1
+1 -1
drivers/gpu/drm/i915/display/vlv_dsi.c
··· 49 49 #include "vlv_dsi.h" 50 50 #include "vlv_dsi_pll.h" 51 51 #include "vlv_dsi_regs.h" 52 - #include "vlv_sideband.h" 52 + #include "vlv_iosf_sb.h" 53 53 54 54 /* return pixels in terms of txbyteclkhs */ 55 55 static u16 txbyteclkhs(u16 pixels, int bpp, int lane_count,
+1 -1
drivers/gpu/drm/i915/display/vlv_dsi_pll.c
··· 34 34 #include "intel_dsi.h" 35 35 #include "vlv_dsi_pll.h" 36 36 #include "vlv_dsi_pll_regs.h" 37 - #include "vlv_sideband.h" 37 + #include "vlv_iosf_sb.h" 38 38 39 39 static const u16 lfsr_converts[] = { 40 40 426, 469, 234, 373, 442, 221, 110, 311, 411, /* 62 - 70 */
+1 -1
drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c
··· 22 22 #include "intel_rps.h" 23 23 #include "intel_runtime_pm.h" 24 24 #include "intel_uncore.h" 25 - #include "vlv_sideband.h" 25 + #include "vlv_iosf_sb.h" 26 26 27 27 void intel_gt_pm_debugfs_forcewake_user_open(struct intel_gt *gt) 28 28 {
+1 -1
drivers/gpu/drm/i915/gt/intel_rps.c
··· 23 23 #include "intel_mchbar_regs.h" 24 24 #include "intel_pcode.h" 25 25 #include "intel_rps.h" 26 - #include "vlv_sideband.h" 26 + #include "vlv_iosf_sb.h" 27 27 #include "../../../platform/x86/intel_ips.h" 28 28 29 29 #define BUSY_MAX_EI 20u /* ms */
+1 -1
drivers/gpu/drm/i915/i915_driver.c
··· 108 108 #include "intel_pcode.h" 109 109 #include "intel_region_ttm.h" 110 110 #include "intel_sbi.h" 111 - #include "vlv_sideband.h" 111 + #include "vlv_iosf_sb.h" 112 112 #include "vlv_suspend.h" 113 113 114 114 static const struct drm_driver i915_drm_driver;
+1 -1
drivers/gpu/drm/i915/intel_clock_gating.c
··· 37 37 #include "i915_reg.h" 38 38 #include "intel_clock_gating.h" 39 39 #include "intel_mchbar_regs.h" 40 - #include "vlv_sideband.h" 40 + #include "vlv_iosf_sb.h" 41 41 42 42 struct drm_i915_clock_gating_funcs { 43 43 void (*init_clock_gating)(struct drm_i915_private *i915);
+1 -1
drivers/gpu/drm/i915/soc/intel_dram.c
··· 10 10 #include "intel_dram.h" 11 11 #include "intel_mchbar_regs.h" 12 12 #include "intel_pcode.h" 13 - #include "vlv_sideband.h" 13 + #include "vlv_iosf_sb.h" 14 14 15 15 struct dram_dimm_info { 16 16 u16 size;
+1 -1
drivers/gpu/drm/i915/vlv_sideband.c drivers/gpu/drm/i915/vlv_iosf_sb.c
··· 6 6 #include "i915_drv.h" 7 7 #include "i915_iosf_mbi.h" 8 8 #include "i915_reg.h" 9 - #include "vlv_sideband.h" 9 + #include "vlv_iosf_sb.h" 10 10 11 11 #include "display/intel_dpio_phy.h" 12 12
+4 -4
drivers/gpu/drm/i915/vlv_sideband.h drivers/gpu/drm/i915/vlv_iosf_sb.h
··· 3 3 * Copyright © 2013-2021 Intel Corporation 4 4 */ 5 5 6 - #ifndef _VLV_SIDEBAND_H_ 7 - #define _VLV_SIDEBAND_H_ 6 + #ifndef _VLV_IOSF_SB_H_ 7 + #define _VLV_IOSF_SB_H_ 8 8 9 9 #include <linux/bitops.h> 10 10 #include <linux/types.h> 11 11 12 - #include "vlv_sideband_reg.h" 12 + #include "vlv_iosf_sb_reg.h" 13 13 14 14 enum dpio_phy; 15 15 struct drm_i915_private; ··· 122 122 vlv_iosf_sb_put(i915, BIT(VLV_IOSF_SB_PUNIT)); 123 123 } 124 124 125 - #endif /* _VLV_SIDEBAND_H_ */ 125 + #endif /* _VLV_IOSF_SB_H_ */
+3 -3
drivers/gpu/drm/i915/vlv_sideband_reg.h drivers/gpu/drm/i915/vlv_iosf_sb_reg.h
··· 3 3 * Copyright © 2022 Intel Corporation 4 4 */ 5 5 6 - #ifndef _VLV_SIDEBAND_REG_H_ 7 - #define _VLV_SIDEBAND_REG_H_ 6 + #ifndef _VLV_IOSF_SB_REG_H_ 7 + #define _VLV_IOSF_SB_REG_H_ 8 8 9 9 /* See configdb bunit SB addr map */ 10 10 #define BUNIT_REG_BISOC 0x11 ··· 177 177 #define CCK_FREQUENCY_STATUS_SHIFT 8 178 178 #define CCK_FREQUENCY_VALUES (0x1f << 0) 179 179 180 - #endif /* _VLV_SIDEBAND_REG_H_ */ 180 + #endif /* _VLV_IOSF_SB_REG_H_ */
+4 -4
drivers/gpu/drm/xe/compat-i915-headers/vlv_sideband.h drivers/gpu/drm/xe/compat-i915-headers/vlv_iosf_sb.h
··· 3 3 * Copyright © 2013-2021 Intel Corporation 4 4 */ 5 5 6 - #ifndef _VLV_SIDEBAND_H_ 7 - #define _VLV_SIDEBAND_H_ 6 + #ifndef _VLV_IOSF_SB_H_ 7 + #define _VLV_IOSF_SB_H_ 8 8 9 9 #include <linux/types.h> 10 10 11 - #include "vlv_sideband_reg.h" 11 + #include "vlv_iosf_sb_reg.h" 12 12 13 13 enum pipe; 14 14 struct drm_i915_private; ··· 129 129 { 130 130 } 131 131 132 - #endif /* _VLV_SIDEBAND_H_ */ 132 + #endif /* _VLV_IOSF_SB_H_ */
+1 -1
drivers/gpu/drm/xe/compat-i915-headers/vlv_sideband_reg.h drivers/gpu/drm/xe/compat-i915-headers/vlv_iosf_sb_reg.h
··· 3 3 * Copyright © 2023 Intel Corporation 4 4 */ 5 5 6 - #include "../../i915/vlv_sideband_reg.h" 6 + #include "../../i915/vlv_iosf_sb_reg.h"