Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

mfd: rsmu: Support 32-bit address space

We used to assume 0x2010xxxx address. Now that we need to access
0x2011xxxx address, we need to support read/write the whole 32-bit
address space.

Also defined RSMU_MAX_WRITE_COUNT and RSMU_MAX_READ_COUNT for readability

Signed-off-by: Min Li <min.li.xe@renesas.com>
Signed-off-by: Lee Jones <lee@kernel.org>
Link: https://lore.kernel.org/r/MW5PR03MB693295AF31ABCAF6AE52EE74A08B9@MW5PR03MB6932.namprd03.prod.outlook.com

authored by

Min Li and committed by
Lee Jones
67d6c76f fb9d4960

+176 -58
+2
drivers/mfd/rsmu.h
··· 10 10 11 11 #include <linux/mfd/rsmu.h> 12 12 13 + #define RSMU_CM_SCSR_BASE 0x20100000 14 + 13 15 int rsmu_core_init(struct rsmu_ddata *rsmu); 14 16 void rsmu_core_exit(struct rsmu_ddata *rsmu); 15 17
+137 -38
drivers/mfd/rsmu_i2c.c
··· 18 18 #include "rsmu.h" 19 19 20 20 /* 21 - * 16-bit register address: the lower 8 bits of the register address come 22 - * from the offset addr byte and the upper 8 bits come from the page register. 21 + * 32-bit register address: the lower 8 bits of the register address come 22 + * from the offset addr byte and the upper 24 bits come from the page register. 23 23 */ 24 - #define RSMU_CM_PAGE_ADDR 0xFD 25 - #define RSMU_CM_PAGE_WINDOW 256 24 + #define RSMU_CM_PAGE_ADDR 0xFC 25 + #define RSMU_CM_PAGE_MASK 0xFFFFFF00 26 + #define RSMU_CM_ADDRESS_MASK 0x000000FF 26 27 27 28 /* 28 29 * 15-bit register address: the lower 7 bits of the register address come ··· 31 30 */ 32 31 #define RSMU_SABRE_PAGE_ADDR 0x7F 33 32 #define RSMU_SABRE_PAGE_WINDOW 128 34 - 35 - static const struct regmap_range_cfg rsmu_cm_range_cfg[] = { 36 - { 37 - .range_min = 0, 38 - .range_max = 0xD000, 39 - .selector_reg = RSMU_CM_PAGE_ADDR, 40 - .selector_mask = 0xFF, 41 - .selector_shift = 0, 42 - .window_start = 0, 43 - .window_len = RSMU_CM_PAGE_WINDOW, 44 - } 45 - }; 46 33 47 34 static const struct regmap_range_cfg rsmu_sabre_range_cfg[] = { 48 35 { ··· 44 55 } 45 56 }; 46 57 47 - static bool rsmu_cm_volatile_reg(struct device *dev, unsigned int reg) 48 - { 49 - switch (reg) { 50 - case RSMU_CM_PAGE_ADDR: 51 - return false; 52 - default: 53 - return true; 54 - } 55 - } 56 - 57 58 static bool rsmu_sabre_volatile_reg(struct device *dev, unsigned int reg) 58 59 { 59 60 switch (reg) { ··· 54 75 } 55 76 } 56 77 78 + static int rsmu_read_device(struct rsmu_ddata *rsmu, u8 reg, u8 *buf, u16 bytes) 79 + { 80 + struct i2c_client *client = to_i2c_client(rsmu->dev); 81 + struct i2c_msg msg[2]; 82 + int cnt; 83 + 84 + msg[0].addr = client->addr; 85 + msg[0].flags = 0; 86 + msg[0].len = 1; 87 + msg[0].buf = &reg; 88 + 89 + msg[1].addr = client->addr; 90 + msg[1].flags = I2C_M_RD; 91 + msg[1].len = bytes; 92 + msg[1].buf = buf; 93 + 94 + cnt = i2c_transfer(client->adapter, msg, 2); 95 + 96 + if (cnt < 0) { 97 + dev_err(rsmu->dev, "i2c_transfer failed at addr: %04x!", reg); 98 + return cnt; 99 + } else if (cnt != 2) { 100 + dev_err(rsmu->dev, 101 + "i2c_transfer sent only %d of 2 messages", cnt); 102 + return -EIO; 103 + } 104 + 105 + return 0; 106 + } 107 + 108 + static int rsmu_write_device(struct rsmu_ddata *rsmu, u8 reg, u8 *buf, u16 bytes) 109 + { 110 + struct i2c_client *client = to_i2c_client(rsmu->dev); 111 + u8 msg[RSMU_MAX_WRITE_COUNT + 1]; /* 1 Byte added for the device register */ 112 + int cnt; 113 + 114 + if (bytes > RSMU_MAX_WRITE_COUNT) 115 + return -EINVAL; 116 + 117 + msg[0] = reg; 118 + memcpy(&msg[1], buf, bytes); 119 + 120 + cnt = i2c_master_send(client, msg, bytes + 1); 121 + 122 + if (cnt < 0) { 123 + dev_err(&client->dev, 124 + "i2c_master_send failed at addr: %04x!", reg); 125 + return cnt; 126 + } 127 + 128 + return 0; 129 + } 130 + 131 + static int rsmu_write_page_register(struct rsmu_ddata *rsmu, u32 reg) 132 + { 133 + u32 page = reg & RSMU_CM_PAGE_MASK; 134 + u8 buf[4]; 135 + int err; 136 + 137 + /* Do not modify offset register for none-scsr registers */ 138 + if (reg < RSMU_CM_SCSR_BASE) 139 + return 0; 140 + 141 + /* Simply return if we are on the same page */ 142 + if (rsmu->page == page) 143 + return 0; 144 + 145 + buf[0] = 0x0; 146 + buf[1] = (u8)((page >> 8) & 0xFF); 147 + buf[2] = (u8)((page >> 16) & 0xFF); 148 + buf[3] = (u8)((page >> 24) & 0xFF); 149 + 150 + err = rsmu_write_device(rsmu, RSMU_CM_PAGE_ADDR, buf, sizeof(buf)); 151 + if (err) 152 + dev_err(rsmu->dev, "Failed to set page offset 0x%x\n", page); 153 + else 154 + /* Remember the last page */ 155 + rsmu->page = page; 156 + 157 + return err; 158 + } 159 + 160 + static int rsmu_reg_read(void *context, unsigned int reg, unsigned int *val) 161 + { 162 + struct rsmu_ddata *rsmu = i2c_get_clientdata((struct i2c_client *)context); 163 + u8 addr = (u8)(reg & RSMU_CM_ADDRESS_MASK); 164 + int err; 165 + 166 + err = rsmu_write_page_register(rsmu, reg); 167 + if (err) 168 + return err; 169 + 170 + err = rsmu_read_device(rsmu, addr, (u8 *)val, 1); 171 + if (err) 172 + dev_err(rsmu->dev, "Failed to read offset address 0x%x\n", addr); 173 + 174 + return err; 175 + } 176 + 177 + static int rsmu_reg_write(void *context, unsigned int reg, unsigned int val) 178 + { 179 + struct rsmu_ddata *rsmu = i2c_get_clientdata((struct i2c_client *)context); 180 + u8 addr = (u8)(reg & RSMU_CM_ADDRESS_MASK); 181 + u8 data = (u8)val; 182 + int err; 183 + 184 + err = rsmu_write_page_register(rsmu, reg); 185 + if (err) 186 + return err; 187 + 188 + err = rsmu_write_device(rsmu, addr, &data, 1); 189 + if (err) 190 + dev_err(rsmu->dev, 191 + "Failed to write offset address 0x%x\n", addr); 192 + 193 + return err; 194 + } 195 + 57 196 static const struct regmap_config rsmu_cm_regmap_config = { 58 - .reg_bits = 8, 197 + .reg_bits = 32, 59 198 .val_bits = 8, 60 - .max_register = 0xD000, 61 - .ranges = rsmu_cm_range_cfg, 62 - .num_ranges = ARRAY_SIZE(rsmu_cm_range_cfg), 63 - .volatile_reg = rsmu_cm_volatile_reg, 64 - .cache_type = REGCACHE_RBTREE, 65 - .can_multi_write = true, 199 + .max_register = 0x20120000, 200 + .reg_read = rsmu_reg_read, 201 + .reg_write = rsmu_reg_write, 202 + .cache_type = REGCACHE_NONE, 66 203 }; 67 204 68 205 static const struct regmap_config rsmu_sabre_regmap_config = { ··· 196 101 .reg_bits = 16, 197 102 .val_bits = 8, 198 103 .reg_format_endian = REGMAP_ENDIAN_BIG, 199 - .max_register = 0x339, 104 + .max_register = 0x340, 200 105 .cache_type = REGCACHE_NONE, 201 106 .can_multi_write = true, 202 107 }; 203 108 204 - static int rsmu_i2c_probe(struct i2c_client *client) 109 + static int rsmu_i2c_probe(struct i2c_client *client, 110 + const struct i2c_device_id *id) 205 111 { 206 - const struct i2c_device_id *id = i2c_client_get_device_id(client); 207 112 const struct regmap_config *cfg; 208 113 struct rsmu_ddata *rsmu; 209 114 int ret; ··· 231 136 dev_err(rsmu->dev, "Unsupported RSMU device type: %d\n", rsmu->type); 232 137 return -ENODEV; 233 138 } 234 - rsmu->regmap = devm_regmap_init_i2c(client, cfg); 139 + 140 + if (rsmu->type == RSMU_CM) 141 + rsmu->regmap = devm_regmap_init(&client->dev, NULL, client, cfg); 142 + else 143 + rsmu->regmap = devm_regmap_init_i2c(client, cfg); 235 144 if (IS_ERR(rsmu->regmap)) { 236 145 ret = PTR_ERR(rsmu->regmap); 237 146 dev_err(rsmu->dev, "Failed to allocate register map: %d\n", ret); ··· 279 180 .name = "rsmu-i2c", 280 181 .of_match_table = of_match_ptr(rsmu_i2c_of_match), 281 182 }, 282 - .probe_new = rsmu_i2c_probe, 183 + .probe = rsmu_i2c_probe, 283 184 .remove = rsmu_i2c_remove, 284 185 .id_table = rsmu_i2c_id, 285 186 };
+33 -19
drivers/mfd/rsmu_spi.c
··· 19 19 20 20 #define RSMU_CM_PAGE_ADDR 0x7C 21 21 #define RSMU_SABRE_PAGE_ADDR 0x7F 22 - #define RSMU_HIGHER_ADDR_MASK 0xFF80 23 - #define RSMU_HIGHER_ADDR_SHIFT 7 24 - #define RSMU_LOWER_ADDR_MASK 0x7F 22 + #define RSMU_PAGE_MASK 0xFFFFFF80 23 + #define RSMU_ADDR_MASK 0x7F 25 24 26 25 static int rsmu_read_device(struct rsmu_ddata *rsmu, u8 reg, u8 *buf, u16 bytes) 27 26 { 28 27 struct spi_device *client = to_spi_device(rsmu->dev); 29 28 struct spi_transfer xfer = {0}; 30 29 struct spi_message msg; 31 - u8 cmd[256] = {0}; 32 - u8 rsp[256] = {0}; 30 + u8 cmd[RSMU_MAX_READ_COUNT + 1] = {0}; 31 + u8 rsp[RSMU_MAX_READ_COUNT + 1] = {0}; 33 32 int ret; 33 + 34 + if (bytes > RSMU_MAX_READ_COUNT) 35 + return -EINVAL; 34 36 35 37 cmd[0] = reg | 0x80; 36 38 xfer.rx_buf = rsp; ··· 68 66 struct spi_device *client = to_spi_device(rsmu->dev); 69 67 struct spi_transfer xfer = {0}; 70 68 struct spi_message msg; 71 - u8 cmd[256] = {0}; 69 + u8 cmd[RSMU_MAX_WRITE_COUNT + 1] = {0}; 70 + 71 + if (bytes > RSMU_MAX_WRITE_COUNT) 72 + return -EINVAL; 72 73 73 74 cmd[0] = reg; 74 75 memcpy(&cmd[1], buf, bytes); ··· 91 86 * 16-bit register address: the lower 7 bits of the register address come 92 87 * from the offset addr byte and the upper 9 bits come from the page register. 93 88 */ 94 - static int rsmu_write_page_register(struct rsmu_ddata *rsmu, u16 reg) 89 + static int rsmu_write_page_register(struct rsmu_ddata *rsmu, u32 reg) 95 90 { 96 91 u8 page_reg; 97 - u8 buf[2]; 92 + u8 buf[4]; 98 93 u16 bytes; 99 - u16 page; 94 + u32 page; 100 95 int err; 101 96 102 97 switch (rsmu->type) { 103 98 case RSMU_CM: 99 + /* Do not modify page register for none-scsr registers */ 100 + if (reg < RSMU_CM_SCSR_BASE) 101 + return 0; 104 102 page_reg = RSMU_CM_PAGE_ADDR; 105 - page = reg & RSMU_HIGHER_ADDR_MASK; 103 + page = reg & RSMU_PAGE_MASK; 106 104 buf[0] = (u8)(page & 0xff); 107 105 buf[1] = (u8)((page >> 8) & 0xff); 108 - bytes = 2; 106 + buf[2] = (u8)((page >> 16) & 0xff); 107 + buf[3] = (u8)((page >> 24) & 0xff); 108 + bytes = 4; 109 109 break; 110 110 case RSMU_SABRE: 111 + /* Do not modify page register if reg is page register itself */ 112 + if ((reg & RSMU_ADDR_MASK) == RSMU_ADDR_MASK) 113 + return 0; 111 114 page_reg = RSMU_SABRE_PAGE_ADDR; 112 - page = reg >> RSMU_HIGHER_ADDR_SHIFT; 113 - buf[0] = (u8)(page & 0xff); 115 + page = reg & RSMU_PAGE_MASK; 116 + /* The three page bits are located in the single Page Register */ 117 + buf[0] = (u8)((page >> 7) & 0x7); 114 118 bytes = 1; 115 119 break; 116 120 default: ··· 143 129 144 130 static int rsmu_reg_read(void *context, unsigned int reg, unsigned int *val) 145 131 { 146 - struct rsmu_ddata *rsmu = spi_get_drvdata(context); 147 - u8 addr = (u8)(reg & RSMU_LOWER_ADDR_MASK); 132 + struct rsmu_ddata *rsmu = spi_get_drvdata((struct spi_device *)context); 133 + u8 addr = (u8)(reg & RSMU_ADDR_MASK); 148 134 int err; 149 135 150 136 err = rsmu_write_page_register(rsmu, reg); ··· 160 146 161 147 static int rsmu_reg_write(void *context, unsigned int reg, unsigned int val) 162 148 { 163 - struct rsmu_ddata *rsmu = spi_get_drvdata(context); 164 - u8 addr = (u8)(reg & RSMU_LOWER_ADDR_MASK); 149 + struct rsmu_ddata *rsmu = spi_get_drvdata((struct spi_device *)context); 150 + u8 addr = (u8)(reg & RSMU_ADDR_MASK); 165 151 u8 data = (u8)val; 166 152 int err; 167 153 ··· 178 164 } 179 165 180 166 static const struct regmap_config rsmu_cm_regmap_config = { 181 - .reg_bits = 16, 167 + .reg_bits = 32, 182 168 .val_bits = 8, 183 - .max_register = 0xD000, 169 + .max_register = 0x20120000, 184 170 .reg_read = rsmu_reg_read, 185 171 .reg_write = rsmu_reg_write, 186 172 .cache_type = REGCACHE_NONE,
+4 -1
include/linux/mfd/rsmu.h
··· 8 8 #ifndef __LINUX_MFD_RSMU_H 9 9 #define __LINUX_MFD_RSMU_H 10 10 11 + #define RSMU_MAX_WRITE_COUNT (255) 12 + #define RSMU_MAX_READ_COUNT (255) 13 + 11 14 /* The supported devices are ClockMatrix, Sabre and SnowLotus */ 12 15 enum rsmu_type { 13 16 RSMU_CM = 0x34000, ··· 34 31 struct regmap *regmap; 35 32 struct mutex lock; 36 33 enum rsmu_type type; 37 - u16 page; 34 + u32 page; 38 35 }; 39 36 #endif /* __LINUX_MFD_RSMU_H */