Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

ARM: dts: aspeed: add device tree for YADRO VEGMAN BMC

YADRO VEGMAN is x86 based servers family with ASPEED AST2500-based BMC.
Currently there are three models:
* VEGMAN N110
* VEGMAN S220/320
* VEGMAN R120/220

The dts files provides configuration for BMC system.

Signed-off-by: Andrei Kartashev <a.kartashev@yadro.com>
Link: https://lore.kernel.org/r/20211119120057.12118-3-a.kartashev@yadro.com
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>

authored by

Andrei Kartashev and committed by
Joel Stanley
67ac01d0 1bf6751c

+873 -1
+4 -1
arch/arm/boot/dts/Makefile
··· 1519 1519 aspeed-bmc-quanta-q71l.dtb \ 1520 1520 aspeed-bmc-supermicro-x11spi.dtb \ 1521 1521 aspeed-bmc-inventec-transformers.dtb \ 1522 - aspeed-bmc-tyan-s7106.dtb 1522 + aspeed-bmc-tyan-s7106.dtb \ 1523 + aspeed-bmc-vegman-n110.dtb \ 1524 + aspeed-bmc-vegman-rx20.dtb \ 1525 + aspeed-bmc-vegman-sx20.dtb
+149
arch/arm/boot/dts/aspeed-bmc-vegman-n110.dts
··· 1 + // SPDX-License-Identifier: GPL-2.0+ 2 + // Copyright (C) 2021 YADRO 3 + /dts-v1/; 4 + 5 + #include "aspeed-bmc-vegman.dtsi" 6 + 7 + / { 8 + model = "YADRO VEGMAN N110 BMC"; 9 + compatible = "yadro,vegman-n110-bmc", "aspeed,ast2500"; 10 + }; 11 + 12 + &gpio { 13 + status = "okay"; 14 + gpio-line-names = 15 + /*A0-A7*/ "CHASSIS_INTRUSION","CASE_OPEN_FAULT_RST","","","SPEAKER_BMC","FM_FORCE_BMC_UPDATE","","", 16 + /*B0-B7*/ "","","","","","","","", 17 + /*C0-C7*/ "","","","","","","","", 18 + /*D0-D7*/ "","","","","","","","", 19 + /*E0-E7*/ "RESET_BUTTON","RESET_OUT","POWER_BUTTON","POWER_OUT","","","","", 20 + /*F0-F7*/ "NMI_OUT","PCIE_NIC_ALERT","","","SKT0_FAULT_LED","","RST_RGMII_PHYRST_DNP","", 21 + /*G0-G7*/ "CPU_ERR2","CPU_CATERR","PCH_BMC_THERMTRIP","","IRQ_NMI_EVENT","","","", 22 + /*H0-H7*/ "PWRGD_P3V3_RISER1","PWRGD_P3V3_RISER2","PWRGD_P3V3_RISER3","","MIO_BIOS_SEL","_SPI_FLASH_HOLD","_SPI_FLASH_WP","FM_240VA_STATUS", 23 + /*I0-I7*/ "","","","","","","","", 24 + /*J0-J7*/ "","","","","","","","", 25 + /*K0-K7*/ "","","","","","","","", 26 + /*L0-L7*/ "","","","","","","","", 27 + /*M0-M7*/ "","","","","","","","", 28 + /*N0-N7*/ "","","","","","","","", 29 + /*O0-O7*/ "","","","","","","","_SPI2_BMC_CS_SEL", 30 + /*P0-P7*/ "","","","","","","","", 31 + /*Q0-Q7*/ "","","","","","","","", 32 + /*R0-R7*/ "_SPI_RMM4_LITE_CS","","","","","","","", 33 + /*S0-S7*/ "_SPI2_BMC_CS1","","","IRQ_SML0_ALERT_MUX","FP_LED_STATUS_GREEN","FP_LED_STATUS_AMBER","FP_ID_LED","", 34 + /*T0-T7*/ "","","","","","","","", 35 + /*U0-U7*/ "","","","","","","","", 36 + /*V0-V7*/ "","","","","","","","", 37 + /*W0-W7*/ "","","","","","","","", 38 + /*X0-X7*/ "","","","","","","","", 39 + /*Y0-Y7*/ "SIO_S3","SIO_S5","","SIO_ONCONTROL","","","","", 40 + /*Z0-Z7*/ "FM_BMC_PWR_BTN","SIO_POWER_GOOD","FM_BMC_PWRBTN_OUT","FM_BMC_PCH_SCI_LPC","","","","", 41 + /*AA0-AA7*/ "","IRQ_SML1_PMBUS_ALERT","FM_PVCCIN_CPU0_PWR_IN_ALERT","FM_PVCCIN_CPU1_PWR_IN_ALERT","BMC_SYS_PWR_FAULT","BMC_SYS_PWR_OK","SMI","POST_COMPLETE", 42 + /*AB0-AB7*/ "FM_CPU_BMCINIT","NMI_BUTTON","ID_BUTTON","PS_PWROK","","","","", 43 + /*AC0-AC7*/ "","","","","","","",""; 44 + }; 45 + 46 + &sgpio { 47 + ngpios = <80>; 48 + bus-frequency = <2000000>; 49 + status = "okay"; 50 + /* SGPIO lines. even: input, odd: output */ 51 + gpio-line-names = 52 + /*A0-A7*/ "CPU1_PRESENCE","","CPU1_THERMTRIP","","CPU1_VRHOT","","CPU1_FIVR_FAULT","","CPU1_MEM_ABCD_VRHOT","","CPU1_MEM_EFGH_VRHOT","","","","","", 53 + /*B0-B7*/ "CPU1_MISMATCH","","CPU1_MEM_THERM_EVENT","","CPU2_PRESENCE","","CPU2_THERMTRIP","","CPU2_VRHOT","","CPU2_FIVR_FAULT","","CPU2_MEM_ABCD_VRHOT","","CPU2_MEM_EFGH_VRHOT","", 54 + /*C0-C7*/ "","","","","CPU2_MISMATCH","","CPU2_MEM_THERM_EVENT","","","","","","","","","", 55 + /*D0-D7*/ "","","","","","","","","","","","","","","","", 56 + /*E0-E7*/ "","","","","","","","","","","","","","","","", 57 + /*F0-F7*/ "SGPIO_PLD_MINOR_REV_BIT0","","SGPIO_PLD_MINOR_REV_BIT1","","SGPIO_PLD_MINOR_REV_BIT2","","SGPIO_PLD_MINOR_REV_BIT3","","SGPIO_PLD_MAJOR_REV_BIT0","","SGPIO_PLD_MAJOR_REV_BIT1","","SGPIO_PLD_MAJOR_REV_BIT2","","SGPIO_PLD_MAJOR_REV_BIT3","", 58 + /*G0-G7*/ "MAIN_PLD_MINOR_REV_BIT0","","MAIN_PLD_MINOR_REV_BIT1","","MAIN_PLD_MINOR_REV_BIT2","","MAIN_PLD_MINOR_REV_BIT3","","MAIN_PLD_MAJOR_REV_BIT0","","MAIN_PLD_MAJOR_REV_BIT1","","MAIN_PLD_MAJOR_REV_BIT2","","MAIN_PLD_MAJOR_REV_BIT3","", 59 + /*H0-H7*/ "","","","","","","","","","","","","","","","", 60 + /*I0-I7*/ "","","","","","","","","","","","","","","","", 61 + /*J0-J7*/ "","","","","","","","","","","","","","","",""; 62 + }; 63 + 64 + &i2c11 { 65 + /* SMB_BMC_MGMT_LVC3 */ 66 + gpio@21 { 67 + compatible = "nxp,pcal9535"; 68 + reg = <0x21>; 69 + gpio-controller; 70 + #gpio-cells = <2>; 71 + gpio-line-names = 72 + /*IO0.0-0.7*/ "", "", "", "", "", "", "PE_PCH_SCR_CLKREQ", "", 73 + /*IO1.0-1.7*/ "", "PE_PCH_MEZ_PRSNT", "PE_PCH_MEZ_PRSNT_", "NIC_4_PE_PRSNT", "NIC_3_PE_PRSNT", "NIC_2_PE_PRSNT", "NIC_1_PE_PRSNT", ""; 74 + }; 75 + gpio@27 { 76 + compatible = "nxp,pca9698"; 77 + reg = <0x27>; 78 + gpio-controller; 79 + #gpio-cells = <2>; 80 + gpio-line-names = 81 + /*IO0.0-0.7*/ "PWRGD_PS_PWROK", "PWRGD_DSW_PWROK", "PWRGD_P5V_AUX", "PWRGD_P3V3_AUX", "PWRGD_P5V", "PWRGD_P3V3", "PWRGD_P1V8_PCH_AUX", "PWRGD_PCH_PVNN_AUX", 82 + /*IO1.0-1.7*/ "PWRGD_P1V05_PCH_AUX", "PWRGD_PCH_AUX_VRS", "PWRGD_PVCCIN_CPU0", "PWRGD_PVCCSA_CPU0", "PWRGD_PVCCIO_CPU0", "PWRGD_PVMCP_CPU0", "PWRGD_P1V0_CPU0", "PWRGD_PVDDQ_ABC_CPU0", 83 + /*IO2.0-2.7*/ "PWRGD_PVPP_ABC_CPU0", "PWRGD_PVTT_ABC_CPU0", "PWRGD_PVDDQ_DEF_CPU0", "PWRGD_PVPP_DEF_CPU0", "PWRGD_PVTT_DEF_CPU0", "", "", "", 84 + /*IO3.0-3.7*/ "", "", "", "", "", "", "", "", 85 + /*IO4.0-4.7*/ "", "", "", "", "", "", "", ""; 86 + }; 87 + }; 88 + 89 + &i2c13 { 90 + /* SMB_PCIE2_STBY_LVC3 */ 91 + mux-expa@73 { 92 + compatible = "nxp,pca9545"; 93 + reg = <0x73>; 94 + #address-cells = <1>; 95 + #size-cells = <0>; 96 + i2c-mux-idle-disconnect; 97 + }; 98 + mux-sata@71 { 99 + compatible = "nxp,pca9543"; 100 + reg = <0x71>; 101 + #address-cells = <1>; 102 + #size-cells = <0>; 103 + i2c-mux-idle-disconnect; 104 + }; 105 + }; 106 + 107 + &i2c2 { 108 + /* SMB_PCIE_STBY_LVC3 */ 109 + mux-expb@71 { 110 + compatible = "nxp,pca9545"; 111 + reg = <0x71>; 112 + #address-cells = <1>; 113 + #size-cells = <0>; 114 + i2c-mux-idle-disconnect; 115 + }; 116 + }; 117 + 118 + &pwm_tacho { 119 + status = "okay"; 120 + pinctrl-names = "default"; 121 + pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default 122 + &pinctrl_pwm2_default &pinctrl_pwm3_default 123 + &pinctrl_pwm4_default &pinctrl_pwm5_default>; 124 + 125 + fan@0 { 126 + reg = <0x00>; 127 + aspeed,fan-tach-ch = /bits/ 8 <0x00 0x06>; 128 + }; 129 + fan@1 { 130 + reg = <0x01>; 131 + aspeed,fan-tach-ch = /bits/ 8 <0x01 0x08>; 132 + }; 133 + fan@2 { 134 + reg = <0x02>; 135 + aspeed,fan-tach-ch = /bits/ 8 <0x02 0x09>; 136 + }; 137 + fan@3 { 138 + reg = <0x03>; 139 + aspeed,fan-tach-ch = /bits/ 8 <0x03 0x0A>; 140 + }; 141 + fan@4 { 142 + reg = <0x04>; 143 + aspeed,fan-tach-ch = /bits/ 8 <0x04 0x0B>; 144 + }; 145 + fan@5 { 146 + reg = <0x05>; 147 + aspeed,fan-tach-ch = /bits/ 8 <0x05>; 148 + }; 149 + };
+255
arch/arm/boot/dts/aspeed-bmc-vegman-rx20.dts
··· 1 + // SPDX-License-Identifier: GPL-2.0+ 2 + // Copyright (C) 2021 YADRO 3 + /dts-v1/; 4 + 5 + #include "aspeed-bmc-vegman.dtsi" 6 + 7 + / { 8 + model = "YADRO VEGMAN Rx20 BMC"; 9 + compatible = "yadro,vegman-rx20-bmc", "aspeed,ast2500"; 10 + 11 + leds { 12 + compatible = "gpio-leds"; 13 + 14 + temp_alarm { 15 + label = "temp:red:status"; 16 + default-state = "off"; 17 + gpios = <&gpio ASPEED_GPIO(E, 4) GPIO_ACTIVE_LOW>; 18 + }; 19 + 20 + temp_ok { 21 + label = "temp:green:status"; 22 + default-state = "off"; 23 + gpios = <&gpio ASPEED_GPIO(E, 5) GPIO_ACTIVE_LOW>; 24 + }; 25 + 26 + psu_fault { 27 + label = "psu:red:status"; 28 + default-state = "off"; 29 + gpios = <&gpio ASPEED_GPIO(E, 6) GPIO_ACTIVE_LOW>; 30 + }; 31 + 32 + psu_ok { 33 + label = "psu:green:status"; 34 + default-state = "off"; 35 + gpios = <&gpio ASPEED_GPIO(E, 7) GPIO_ACTIVE_LOW>; 36 + }; 37 + }; 38 + }; 39 + 40 + &gpio { 41 + status = "okay"; 42 + gpio-line-names = 43 + /*A0-A7*/ "CASE_OPEN_DNP","CASE_OPEN_FAULT_RST_DNP","BEZEL_ON_PWR_P3V3","PWM_PWRGD_EXP_EN","SPEAKER_BMC","FM_FORCE_BMC_UPDATE","","", 44 + /*B0-B7*/ "","","","","","","","", 45 + /*C0-C7*/ "","","","","","","","", 46 + /*D0-D7*/ "","","","","","","","", 47 + /*E0-E7*/ "RESET_BUTTON","RESET_OUT","POWER_BUTTON","POWER_OUT","LED_TEMP_STATUS_R","LED_TEMP_STATUS_G","LED_PWR_STATUS_R","LED_PWR_STATUS_G", 48 + /*F0-F7*/ "NMI_OUT","CPU1_DISABLE_COD","","","SKT0_FAULT_LED_DNP","SKT1_FAULT_LED_DNP","RST_RGMII_PHYRST_DNP","", 49 + /*G0-G7*/ "CPU_ERR2","CPU_CATERR","PCH_BMC_THERMTRIP","SPI_BMC_BOOT_HD","IRQ_NMI_EVENT","SPI_BMC_BOOT_WP","SPI_BMC_BOOT_WP1","", 50 + /*H0-H7*/ "PWRGD_P3V3_RISER1","PWRGD_P3V3_RISER2","PWRGD_P3V3_RISER3","","MIO_BIOS_SEL","_SPI_FLASH_HOLD","_SPI_FLASH_WP","FM_240VA_STATUS", 51 + /*I0-I7*/ "","","","","","","","", 52 + /*J0-J7*/ "","","","","","","","", 53 + /*K0-K7*/ "","","","","","","","", 54 + /*L0-L7*/ "","","","","","","","", 55 + /*M0-M7*/ "SEL_FLASH_SOFT","STATUS_SEL_BMC","","","BMC_WDT_P","ID_BUTTON","PS_PWROK","", 56 + /*N0-N7*/ "","","","","","","","", 57 + /*O0-O7*/ "","","","","","","","", 58 + /*P0-P7*/ "","","","","","","SPI_BIOS_ACTIVE_FLASH_SEL","STATUS_SEL_BIOS", 59 + /*Q0-Q7*/ "","","","","","","","", 60 + /*R0-R7*/ "_SPI_BMC_BOOT_CS1","","","","","","","", 61 + /*S0-S7*/ "_SPI2_BMC_CS1","RSR_A_SMBEXP_RST_INT","RSR_B_SMBEXP_RST_INT","IRQ_SML0_ALERT_MUX","FP_LED_STATUS_GREEN","FP_LED_STATUS_AMBER","FP_ID_LED","", 62 + /*T0-T7*/ "","","","","","","","", 63 + /*U0-U7*/ "","","","","","","","", 64 + /*V0-V7*/ "","","","","","","","", 65 + /*W0-W7*/ "","","","","","","","", 66 + /*X0-X7*/ "","","","","","","","", 67 + /*Y0-Y7*/ "SIO_S3","SIO_S5","","SIO_ONCONTROL","","","","", 68 + /*Z0-Z7*/ "FM_BMC_PWR_BTN","SIO_POWER_GOOD","FM_BMC_PWRBTN_OUT","FM_BMC_PCH_SCI_LPC","","","","", 69 + /*AA0-AA7*/ "CPU_CLK_MUX_SEL","IRQ_SML1_PMBUS_ALERT","FM_PVCCIN_CPU0_PWR_IN_ALERT","FM_PVCCIN_CPU1_PWR_IN_ALERT","BMC_SYS_PWR_FAULT","BMC_SYS_PWR_OK","SMI","POST_COMPLETE", 70 + /*AB0-AB7*/ "FM_CPU_BMCINIT","NMI_BUTTON","BMC_WDT_RST1","BMC_WDT_RST2","","","","", 71 + /*AC0-AC7*/ "","","","","","","",""; 72 + }; 73 + 74 + &sgpio { 75 + ngpios = <80>; 76 + bus-frequency = <2000000>; 77 + status = "okay"; 78 + /* SGPIO lines. even: input, odd: output */ 79 + gpio-line-names = 80 + /*A0-A7*/ "CPU1_PRESENCE","","CPU1_THERMTRIP","","CPU1_VRHOT","","CPU1_FIVR_FAULT","","CPU1_MEM_ABCD_VRHOT","","CPU1_MEM_EFGH_VRHOT","","","","","", 81 + /*B0-B7*/ "CPU1_MISMATCH","","CPU1_MEM_THERM_EVENT","","CPU2_PRESENCE","","CPU2_THERMTRIP","","CPU2_VRHOT","","CPU2_FIVR_FAULT","","CPU2_MEM_ABCD_VRHOT","","CPU2_MEM_EFGH_VRHOT","", 82 + /*C0-C7*/ "","","","","CPU2_MISMATCH","","CPU2_MEM_THERM_EVENT","","","","","","","","","", 83 + /*D0-D7*/ "","","","","","","","","","","","","","","","", 84 + /*E0-E7*/ "","","","","","","","","","","","","","","","", 85 + /*F0-F7*/ "SGPIO_PLD_MINOR_REV_BIT0","","SGPIO_PLD_MINOR_REV_BIT1","","SGPIO_PLD_MINOR_REV_BIT2","","SGPIO_PLD_MINOR_REV_BIT3","","SGPIO_PLD_MAJOR_REV_BIT0","","SGPIO_PLD_MAJOR_REV_BIT1","","SGPIO_PLD_MAJOR_REV_BIT2","","SGPIO_PLD_MAJOR_REV_BIT3","", 86 + /*G0-G7*/ "MAIN_PLD_MINOR_REV_BIT0","","MAIN_PLD_MINOR_REV_BIT1","","MAIN_PLD_MINOR_REV_BIT2","","MAIN_PLD_MINOR_REV_BIT3","","MAIN_PLD_MAJOR_REV_BIT0","","MAIN_PLD_MAJOR_REV_BIT1","","MAIN_PLD_MAJOR_REV_BIT2","","MAIN_PLD_MAJOR_REV_BIT3","", 87 + /*H0-H7*/ "","","","","","","","","","","","","","","","", 88 + /*I0-I7*/ "","","","","","","","","","","","","","","","", 89 + /*J0-J7*/ "","","","","","","","","","","","","","","",""; 90 + }; 91 + 92 + &i2c11 { 93 + /* SMB_BMC_MGMT_LVC3 */ 94 + gpio@21 { 95 + compatible = "nxp,pcal9535"; 96 + reg = <0x21>; 97 + gpio-controller; 98 + #gpio-cells = <2>; 99 + gpio-line-names = 100 + /*IO0.0-0.7*/ "ETH3_CLK_REQ", "ETH2_CLK_REQ", "RSR_A_PCIE_X16_2_PRSNT", "RSR_B_PCIE_X16_2_PRSNT", "", "RSR_B_PCIE_X8_3_PRSNT", "RSR_B_PCIE_X8_4_PRSNT", "RSR_B_PCIE_X16_PRSNT_N", 101 + /*IO1.0-1.7*/ "RSR_B_PCIE_X8_2_PRSNT", "RSR_B_PCIE_X8_1_PRSNT", "NIC_1_PE_BUF_PRSNT", "RSR_A_PCIE_X16_PRSNT", "RSR_A_PCIE_X8_3_PRSNT", "RSR_A_PCIE_X8_2_PRSNT", "RSR_A_PCIE_X8_1_PRSNT_N", ""; 102 + }; 103 + gpio@23 { 104 + compatible = "nxp,pcal9535"; 105 + reg = <0x23>; 106 + gpio-controller; 107 + #gpio-cells = <2>; 108 + gpio-line-names = 109 + /*IO0.0-0.7*/ "FM_LINK_WIDTH_ID0", "FM_LINK_WIDTH_ID0", "FM_LINK_WIDTH_ID0", "FM_LINK_WIDTH_ID0", "FM_LINK_WIDTH_ID0", "", "", "", 110 + /*IO1.0-1.7*/ "", "", "", "", "", "", "", ""; 111 + }; 112 + gpio@27 { 113 + compatible = "nxp,pca9698"; 114 + reg = <0x27>; 115 + gpio-controller; 116 + #gpio-cells = <2>; 117 + gpio-line-names = 118 + /*IO0.0-0.7*/ "PWRGD_PS_PWROK", "PWRGD_DSW_PWROK", "PWRGD_P5V_AUX", "PWRGD_P3V3_AUX", "PWRGD_P5V", "PWRGD_P3V3", "PWRGD_P1V8_PCH_AUX", "PWRGD_PCH_PVNN_AUX", 119 + /*IO1.0-1.7*/ "PWRGD_P1V05_PCH_AUX", "PWRGD_PCH_AUX_VRS", "PWRGD_PVCCIN_CPU0", "PWRGD_PVCCSA_CPU0", "PWRGD_PVCCIO_CPU0", "PWRGD_PVMCP_CPU0", "PWRGD_P1V0_CPU0", "PWRGD_PVDDQ_ABC_CPU0", 120 + /*IO2.0-2.7*/ "PWRGD_PVPP_ABC_CPU0", "PWRGD_PVTT_ABC_CPU0", "PWRGD_PVDDQ_DEF_CPU0", "PWRGD_PVPP_DEF_CPU0", "PWRGD_PVTT_DEF_CPU0", "PWRGD_PVCCIN_CPU1", "PWRGD_PVCCSA_CPU1", "PWRGD_PVCCIO_CPU1", 121 + /*IO3.0-3.7*/ "PWRGD_PVMCP_CPU1", "PWRGD_P1V0_CPU1", "PWRGD_PVDDQ_GHJ_CPU1", "PWRGD_PVPP_GHJ_CPU1", "PWRGD_PVTT_GHJ_CPU1", "PWRGD_PVDDQ_KLM_CPU1", "PWRGD_PVPP_KLM_CPU1", "PWRGD_PVTT_KLM_CPU1", 122 + /*IO4.0-4.7*/ "PCH_PWR_RESET_N", "FM_BOARD_SKU_ID0", "FM_BOARD_SKU_ID1", "FM_BOARD_SKU_ID2", "FM_BOARD_SKU_ID3", "FM_BOARD_SKU_ID4", "FM_BOARD_REV_ID0", "FM_BOARD_REV_ID1"; 123 + }; 124 + gpio@39 { 125 + compatible = "nxp,pca9554"; 126 + reg = <0x39>; 127 + gpio-controller; 128 + #gpio-cells = <2>; 129 + gpio-line-names = 130 + /*IO0.0-0.7*/ "FAN_FAULT_0", "FAN_FAULT_1", "FAN_FAULT_2", "FAN_FAULT_3", "FAN_FAULT_4", "FAN_FAULT_5", "FAN_FAULT_6", ""; 131 + }; 132 + }; 133 + 134 + &i2c13 { 135 + /* SMB_PCIE2_STBY_LVC3 */ 136 + mux-expa@70 { 137 + compatible = "nxp,pca9548"; 138 + reg = <0x70>; 139 + #address-cells = <1>; 140 + #size-cells = <0>; 141 + i2c-mux-idle-disconnect; 142 + 143 + i2c@2 { 144 + #address-cells = <1>; 145 + #size-cells = <0>; 146 + reg = <2>; 147 + rsra-mux@72 { 148 + compatible = "nxp,pca9548"; 149 + reg = <0x72>; 150 + #address-cells = <1>; 151 + #size-cells = <0>; 152 + 153 + i2c@7 { 154 + #address-cells = <1>; 155 + #size-cells = <0>; 156 + reg = <7>; 157 + at24@50 { 158 + compatible = "atmel,24c64"; 159 + reg = <0x50>; 160 + pagesize = <32>; 161 + size = <8192>; 162 + address-width = <16>; 163 + }; 164 + }; 165 + }; 166 + }; 167 + }; 168 + mux-sata@71 { 169 + compatible = "nxp,pca9543"; 170 + reg = <0x71>; 171 + #address-cells = <1>; 172 + #size-cells = <0>; 173 + i2c-mux-idle-disconnect; 174 + }; 175 + }; 176 + 177 + &i2c2 { 178 + /* SMB_PCIE_STBY_LVC3 */ 179 + mux-expb@71 { 180 + compatible = "nxp,pca9548"; 181 + reg = <0x71>; 182 + #address-cells = <1>; 183 + #size-cells = <0>; 184 + i2c-mux-idle-disconnect; 185 + 186 + i2c@0 { 187 + #address-cells = <1>; 188 + #size-cells = <0>; 189 + reg = <0>; 190 + rsrb-mux@72 { 191 + compatible = "nxp,pca9548"; 192 + reg = <0x72>; 193 + #address-cells = <1>; 194 + #size-cells = <0>; 195 + i2c@7 { 196 + #address-cells = <1>; 197 + #size-cells = <0>; 198 + reg = <7>; 199 + at24@50 { 200 + compatible = "atmel,24c64"; 201 + reg = <0x50>; 202 + pagesize = <32>; 203 + size = <8192>; 204 + address-width = <16>; 205 + }; 206 + }; 207 + }; 208 + at24@50 { 209 + compatible = "atmel,24c64"; 210 + reg = <0x50>; 211 + pagesize = <32>; 212 + size = <8192>; 213 + address-width = <16>; 214 + }; 215 + }; 216 + }; 217 + }; 218 + 219 + &pwm_tacho { 220 + status = "okay"; 221 + pinctrl-names = "default"; 222 + pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default 223 + &pinctrl_pwm2_default &pinctrl_pwm3_default 224 + &pinctrl_pwm4_default &pinctrl_pwm5_default 225 + &pinctrl_pwm6_default>; 226 + 227 + fan@0 { 228 + reg = <0x00>; 229 + aspeed,fan-tach-ch = /bits/ 8 <0x00 0x07>; 230 + }; 231 + fan@1 { 232 + reg = <0x01>; 233 + aspeed,fan-tach-ch = /bits/ 8 <0x01 0x08>; 234 + }; 235 + fan@2 { 236 + reg = <0x02>; 237 + aspeed,fan-tach-ch = /bits/ 8 <0x02 0x09>; 238 + }; 239 + fan@3 { 240 + reg = <0x03>; 241 + aspeed,fan-tach-ch = /bits/ 8 <0x03 0x0A>; 242 + }; 243 + fan@4 { 244 + reg = <0x04>; 245 + aspeed,fan-tach-ch = /bits/ 8 <0x04 0x0B>; 246 + }; 247 + fan@5 { 248 + reg = <0x05>; 249 + aspeed,fan-tach-ch = /bits/ 8 <0x05 0x0C>; 250 + }; 251 + fan@6 { 252 + reg = <0x06>; 253 + aspeed,fan-tach-ch = /bits/ 8 <0x06 0x0D>; 254 + }; 255 + };
+154
arch/arm/boot/dts/aspeed-bmc-vegman-sx20.dts
··· 1 + // SPDX-License-Identifier: GPL-2.0+ 2 + // Copyright (C) 2021 YADRO 3 + /dts-v1/; 4 + 5 + #include "aspeed-bmc-vegman.dtsi" 6 + 7 + / { 8 + model = "YADRO VEGMAN Sx20 BMC"; 9 + compatible = "yadro,vegman-sx20-bmc", "aspeed,ast2500"; 10 + }; 11 + 12 + &gpio { 13 + status = "okay"; 14 + gpio-line-names = 15 + /*A0-A7*/ "CHASSIS_INTRUSION","CASE_OPEN_FAULT_RST","","","SPEAKER_BMC","FM_FORCE_BMC_UPDATE","","", 16 + /*B0-B7*/ "","","","","","","","", 17 + /*C0-C7*/ "","","","","","","","", 18 + /*D0-D7*/ "","","","","","","","", 19 + /*E0-E7*/ "RESET_BUTTON","RESET_OUT","POWER_BUTTON","POWER_OUT","","","","", 20 + /*F0-F7*/ "NMI_OUT","CPU1_DISABLE_COD","","","SKT0_FAULT_LED","SKT1_FAULT_LED","RST_RGMII_PHYRST_DNP","", 21 + /*G0-G7*/ "CPU_ERR2","CPU_CATERR","PCH_BMC_THERMTRIP","","IRQ_NMI_EVENT","","","", 22 + /*H0-H7*/ "PWRGD_P3V3_RISER1","PWRGD_P3V3_RISER2","PWRGD_P3V3_RISER3","","MIO_BIOS_SEL","_SPI_FLASH_HOLD","_SPI_FLASH_WP","FM_240VA_STATUS", 23 + /*I0-I7*/ "","","","","","","","", 24 + /*J0-J7*/ "","","","","","","","", 25 + /*K0-K7*/ "","","","","","","","", 26 + /*L0-L7*/ "","","","","","","","", 27 + /*M0-M7*/ "","","","","BMC_GPU_RISER_ID1","BMC_GPU_RISER_ID0","","", 28 + /*N0-N7*/ "","","","","","","","", 29 + /*O0-O7*/ "","","","","","","","_SPI2_BMC_CS_SEL", 30 + /*P0-P7*/ "","P12V_HDDS_A_EN","P12V_HDDS_B_EN","P5V_HDDS_A_EN","PWRGD_P5V_HDDS_A","P5V_HDDS_B_EN","PWRGD_P5V_HDDS_B","", 31 + /*Q0-Q7*/ "","","","","","","","", 32 + /*R0-R7*/ "_SPI_RMM4_LITE_CS","","","","","","","", 33 + /*S0-S7*/ "_SPI2_BMC_CS1","","","IRQ_SML0_ALERT_MUX","FP_LED_STATUS_GREEN","FP_LED_STATUS_AMBER","FP_ID_LED","", 34 + /*T0-T7*/ "","","","","","","","", 35 + /*U0-U7*/ "","","","","","","","", 36 + /*V0-V7*/ "","","","","","","","", 37 + /*W0-W7*/ "","","","","","","","", 38 + /*X0-X7*/ "","","","","","","","", 39 + /*Y0-Y7*/ "SIO_S3","SIO_S5","","SIO_ONCONTROL","","","","", 40 + /*Z0-Z7*/ "FM_BMC_PWR_BTN","SIO_POWER_GOOD","FM_BMC_PWRBTN_OUT","FM_BMC_PCH_SCI_LPC","","","","", 41 + /*AA0-AA7*/ "CPU_CLK_MUX_SEL","IRQ_SML1_PMBUS_ALERT","FM_PVCCIN_CPU0_PWR_IN_ALERT","FM_PVCCIN_CPU1_PWR_IN_ALERT","BMC_SYS_PWR_FAULT","BMC_SYS_PWR_OK","SMI","POST_COMPLETE", 42 + /*AB0-AB7*/ "FM_CPU_BMCINIT","NMI_BUTTON","ID_BUTTON","PS_PWROK","","","","", 43 + /*AC0-AC7*/ "","","","","","","",""; 44 + }; 45 + 46 + &sgpio { 47 + ngpios = <80>; 48 + bus-frequency = <2000000>; 49 + status = "okay"; 50 + /* SGPIO lines. even: input, odd: output */ 51 + gpio-line-names = 52 + /*A0-A7*/ "CPU1_PRESENCE","","CPU1_THERMTRIP","","CPU1_VRHOT","","CPU1_FIVR_FAULT","","CPU1_MEM_ABCD_VRHOT","","CPU1_MEM_EFGH_VRHOT","","","","","", 53 + /*B0-B7*/ "CPU1_MISMATCH","","CPU1_MEM_THERM_EVENT","","CPU2_PRESENCE","","CPU2_THERMTRIP","","CPU2_VRHOT","","CPU2_FIVR_FAULT","","CPU2_MEM_ABCD_VRHOT","","CPU2_MEM_EFGH_VRHOT","", 54 + /*C0-C7*/ "","","","","CPU2_MISMATCH","","CPU2_MEM_THERM_EVENT","","","","","","","","","", 55 + /*D0-D7*/ "","","","","","","","","","","","","","","","", 56 + /*E0-E7*/ "","","","","","","","","","","","","","","","", 57 + /*F0-F7*/ "SGPIO_PLD_MINOR_REV_BIT0","","SGPIO_PLD_MINOR_REV_BIT1","","SGPIO_PLD_MINOR_REV_BIT2","","SGPIO_PLD_MINOR_REV_BIT3","","SGPIO_PLD_MAJOR_REV_BIT0","","SGPIO_PLD_MAJOR_REV_BIT1","","SGPIO_PLD_MAJOR_REV_BIT2","","SGPIO_PLD_MAJOR_REV_BIT3","", 58 + /*G0-G7*/ "MAIN_PLD_MINOR_REV_BIT0","","MAIN_PLD_MINOR_REV_BIT1","","MAIN_PLD_MINOR_REV_BIT2","","MAIN_PLD_MINOR_REV_BIT3","","MAIN_PLD_MAJOR_REV_BIT0","","MAIN_PLD_MAJOR_REV_BIT1","","MAIN_PLD_MAJOR_REV_BIT2","","MAIN_PLD_MAJOR_REV_BIT3","", 59 + /*H0-H7*/ "","","","","","","","","","","","","","","","", 60 + /*I0-I7*/ "","","","","","","","","","","","","","","","", 61 + /*J0-J7*/ "","","","","","","","","","","","","","","",""; 62 + }; 63 + 64 + &i2c11 { 65 + /* SMB_BMC_MGMT_LVC3 */ 66 + gpio@21 { 67 + compatible = "nxp,pcal9535"; 68 + reg = <0x21>; 69 + gpio-controller; 70 + #gpio-cells = <2>; 71 + gpio-line-names = 72 + /*IO0.0-0.7*/ "", "", "CPU1_PE3_0_SLOT_PRSNT", "", "CPU1_PE1_GPU_PRSNT", "CPU1_PE3_1_SLOT_PRSNT", "PE_PCH_MEZ_PRSNT", "CPU0_PE3_1_SLOT_PRSNT", 73 + /*IO1.0-1.7*/ "CPU0_PE1_GPU_PRSNT", "CPU0_PE2_NVME2_PRSNT", "CPU1_PE2_NVME3_PRSNT", "CPU1_PE2_SLOT_PRSNT", "CPU1_PE2_NVME4_PRSNT", "", "CPU0_PE2_NVME1_PRSNT", "CPU0_PE3_0_RAID_PRSNT"; 74 + }; 75 + gpio@27 { 76 + compatible = "nxp,pca9698"; 77 + reg = <0x27>; 78 + gpio-controller; 79 + #gpio-cells = <2>; 80 + gpio-line-names = 81 + /*IO0.0-0.7*/ "PWRGD_PS_PWROK", "PWRGD_DSW_PWROK", "PWRGD_P5V_AUX", "PWRGD_P3V3_AUX", "PWRGD_P5V", "PWRGD_P3V3", "PWRGD_P1V8_PCH_AUX", "PWRGD_PCH_PVNN_AUX", 82 + /*IO1.0-1.7*/ "PWRGD_P1V05_PCH_AUX", "PWRGD_PCH_AUX_VRS", "PWRGD_PVCCIN_CPU0", "PWRGD_PVCCSA_CPU0", "PWRGD_PVCCIO_CPU0", "PWRGD_PVMCP_CPU0", "PWRGD_P1V0_CPU0", "PWRGD_PVDDQ_ABC_CPU0", 83 + /*IO2.0-2.7*/ "PWRGD_PVPP_ABC_CPU0", "PWRGD_PVTT_ABC_CPU0", "PWRGD_PVDDQ_DEF_CPU0", "PWRGD_PVPP_DEF_CPU0", "PWRGD_PVTT_DEF_CPU0", "PWRGD_PVCCIN_CPU1", "PWRGD_PVCCSA_CPU1", "PWRGD_PVCCIO_CPU1", 84 + /*IO3.0-3.7*/ "PWRGD_PVMCP_CPU1", "PWRGD_P1V0_CPU1", "PWRGD_PVDDQ_GHJ_CPU1", "PWRGD_PVPP_GHJ_CPU1", "PWRGD_PVTT_GHJ_CPU1", "PWRGD_PVDDQ_KLM_CPU1", "PWRGD_PVPP_KLM_CPU1", "PWRGD_PVTT_KLM_CPU1", 85 + /*IO4.0-4.7*/ "PWRGD_P5V_HDDS_A_R", "PWRGD_P5V_HDDS_B_R", "", "", "", "", "", ""; 86 + }; 87 + }; 88 + 89 + &i2c13 { 90 + /* SMB_PCIE2_STBY_LVC3 */ 91 + mux-expa@73 { 92 + compatible = "nxp,pca9545"; 93 + reg = <0x73>; 94 + #address-cells = <1>; 95 + #size-cells = <0>; 96 + i2c-mux-idle-disconnect; 97 + }; 98 + mux-sata@71 { 99 + compatible = "nxp,pca9543"; 100 + reg = <0x71>; 101 + #address-cells = <1>; 102 + #size-cells = <0>; 103 + i2c-mux-idle-disconnect; 104 + }; 105 + }; 106 + 107 + &i2c2 { 108 + /* SMB_PCIE_STBY_LVC3 */ 109 + mux-expb@71 { 110 + compatible = "nxp,pca9545"; 111 + reg = <0x71>; 112 + #address-cells = <1>; 113 + #size-cells = <0>; 114 + i2c-mux-idle-disconnect; 115 + }; 116 + }; 117 + 118 + &pwm_tacho { 119 + status = "okay"; 120 + pinctrl-names = "default"; 121 + pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default 122 + &pinctrl_pwm2_default &pinctrl_pwm3_default 123 + &pinctrl_pwm4_default &pinctrl_pwm5_default 124 + &pinctrl_pwm6_default>; 125 + 126 + fan@0 { 127 + reg = <0x00>; 128 + aspeed,fan-tach-ch = /bits/ 8 <0x00>; 129 + }; 130 + fan@1 { 131 + reg = <0x01>; 132 + aspeed,fan-tach-ch = /bits/ 8 <0x01>; 133 + }; 134 + fan@2 { 135 + reg = <0x02>; 136 + aspeed,fan-tach-ch = /bits/ 8 <0x02>; 137 + }; 138 + fan@3 { 139 + reg = <0x03>; 140 + aspeed,fan-tach-ch = /bits/ 8 <0x03>; 141 + }; 142 + fan@4 { 143 + reg = <0x04>; 144 + aspeed,fan-tach-ch = /bits/ 8 <0x04>; 145 + }; 146 + fan@5 { 147 + reg = <0x05>; 148 + aspeed,fan-tach-ch = /bits/ 8 <0x05>; 149 + }; 150 + fan@6 { 151 + reg = <0x06>; 152 + aspeed,fan-tach-ch = /bits/ 8 <0x06>; 153 + }; 154 + };
+311
arch/arm/boot/dts/aspeed-bmc-vegman.dtsi
··· 1 + // SPDX-License-Identifier: GPL-2.0+ 2 + // Copyright (C) 2021 YADRO 3 + 4 + #include "aspeed-g5.dtsi" 5 + #include <dt-bindings/gpio/aspeed-gpio.h> 6 + 7 + / { 8 + aliases { 9 + serial4 = &uart5; 10 + }; 11 + 12 + chosen { 13 + stdout-path = &uart5; 14 + bootargs = "console=ttyS4,115200 earlyprintk"; 15 + }; 16 + 17 + memory@80000000 { 18 + reg = <0x80000000 0x20000000>; 19 + }; 20 + 21 + reserved-memory { 22 + #address-cells = <1>; 23 + #size-cells = <1>; 24 + ranges; 25 + 26 + video_engine_memory: jpegbuffer { 27 + size = <0x02000000>; /* 32M */ 28 + alignment = <0x01000000>; 29 + compatible = "shared-dma-pool"; 30 + reusable; 31 + }; 32 + 33 + ramoops@9eff0000{ 34 + compatible = "ramoops"; 35 + reg = <0x9eff0000 0x10000>; 36 + record-size = <0x2000>; 37 + console-size = <0x2000>; 38 + }; 39 + }; 40 + 41 + iio-hwmon { 42 + compatible = "iio-hwmon"; 43 + io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>, 44 + <&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>, 45 + <&adc 8>, <&adc 9>, <&adc 10>, <&adc 11>, 46 + <&adc 12>, <&adc 13>, <&adc 14>, <&adc 15>; 47 + }; 48 + 49 + leds { 50 + compatible = "gpio-leds"; 51 + 52 + identify { 53 + label = "platform:blue:indicator"; 54 + linux,default-trigger = "heartbeat"; 55 + gpios = <&gpio ASPEED_GPIO(S, 6) GPIO_ACTIVE_LOW>; 56 + }; 57 + 58 + status_amber { 59 + label = "platform:red:status"; 60 + default-state = "off"; 61 + gpios = <&gpio ASPEED_GPIO(S, 5) GPIO_ACTIVE_LOW>; 62 + }; 63 + 64 + status_green { 65 + label = "platform:green:status"; 66 + default-state = "off"; 67 + gpios = <&gpio ASPEED_GPIO(S, 4) GPIO_ACTIVE_LOW>; 68 + }; 69 + 70 + power_fault { 71 + label = "platform:red:power"; 72 + default-state = "off"; 73 + gpios = <&gpio ASPEED_GPIO(AA, 4) GPIO_ACTIVE_LOW>; 74 + }; 75 + 76 + power_ok { 77 + label = "platform:green:power"; 78 + default-state = "off"; 79 + gpios = <&gpio ASPEED_GPIO(AA, 5) GPIO_ACTIVE_LOW>; 80 + }; 81 + }; 82 + 83 + beeper { 84 + compatible = "pwm-beeper"; 85 + pwms = <&timer 5 1000000 0>; 86 + }; 87 + }; 88 + 89 + &fmc { 90 + status = "okay"; 91 + flash@0 { 92 + status = "okay"; 93 + label = "bmc"; 94 + m25p,fast-read; 95 + #include "openbmc-flash-layout-64.dtsi" 96 + }; 97 + }; 98 + 99 + &spi2 { 100 + status = "okay"; 101 + pinctrl-names = "default"; 102 + pinctrl-0 = <&pinctrl_spi2ck_default 103 + &pinctrl_spi2miso_default 104 + &pinctrl_spi2mosi_default 105 + &pinctrl_spi2cs0_default>; 106 + flash@0 { 107 + status = "okay"; 108 + label = "bios"; 109 + m25p,fast-read; 110 + }; 111 + }; 112 + 113 + &mac0 { 114 + status = "okay"; 115 + use-ncsi; 116 + 117 + pinctrl-names = "default"; 118 + pinctrl-0 = <&pinctrl_rmii1_default>; 119 + }; 120 + 121 + &mac1 { 122 + status = "okay"; 123 + 124 + pinctrl-names = "default"; 125 + pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>; 126 + 127 + phy-mode = "rgmii"; 128 + phy-handle = <&phy>; 129 + mdio { 130 + #address-cells = <1>; 131 + #size-cells = <0>; 132 + 133 + phy: ethernet-phy@1 { 134 + /* KSZ9131 */ 135 + compatible = "ethernet-phy-id0022.1640"; 136 + reg = <1>; 137 + 138 + micrel,led-mode = <0>; 139 + }; 140 + }; 141 + }; 142 + 143 + &vhub { 144 + status = "okay"; 145 + }; 146 + 147 + &adc { 148 + status = "okay"; 149 + }; 150 + 151 + &video { 152 + status = "okay"; 153 + memory-region = <&video_engine_memory>; 154 + }; 155 + 156 + &sdmmc { 157 + status = "okay"; 158 + }; 159 + 160 + &sdhci1 { 161 + status = "okay"; 162 + 163 + pinctrl-names = "default"; 164 + pinctrl-0 = <&pinctrl_sd2_default>; 165 + disable-wp; 166 + }; 167 + 168 + &timer { 169 + fttmr010,pwm-outputs = <5>; 170 + pinctrl-names = "default"; 171 + pinctrl-0 = <&pinctrl_timer5_default>; 172 + #pwm-cells = <3>; 173 + status = "okay"; 174 + }; 175 + 176 + &uart1 { 177 + status = "okay"; 178 + pinctrl-names = "default"; 179 + pinctrl-0 = <&pinctrl_txd1_default 180 + &pinctrl_rxd1_default 181 + &pinctrl_nrts1_default 182 + &pinctrl_ndtr1_default 183 + &pinctrl_ndsr1_default 184 + &pinctrl_ncts1_default 185 + &pinctrl_ndcd1_default 186 + &pinctrl_nri1_default>; 187 + }; 188 + 189 + &uart5 { 190 + status = "okay"; 191 + }; 192 + 193 + &vuart { 194 + status = "okay"; 195 + }; 196 + 197 + &kcs3 { 198 + aspeed,lpc-io-reg = <0xCA2>; 199 + status = "okay"; 200 + }; 201 + 202 + &kcs4 { 203 + aspeed,lpc-io-reg = <0xCA4>; 204 + status = "okay"; 205 + }; 206 + 207 + &lpc_snoop { 208 + snoop-ports = <0x80>; 209 + status = "okay"; 210 + }; 211 + 212 + &uart_routing { 213 + status = "okay"; 214 + }; 215 + 216 + &uart2 { 217 + status = "okay"; 218 + pinctrl-names = "default"; 219 + pinctrl-0 = <>; 220 + }; 221 + 222 + &uart3 { 223 + status = "okay"; 224 + pinctrl-names = "default"; 225 + pinctrl-0 = <>; 226 + }; 227 + 228 + &uart4 { 229 + status = "okay"; 230 + pinctrl-names = "default"; 231 + pinctrl-0 = <>; 232 + }; 233 + 234 + &i2c0 { 235 + /* SMB_IPMB_STBY_LVC3 */ 236 + multi-master; 237 + status = "okay"; 238 + }; 239 + 240 + &i2c1 { 241 + /* SMB_CHASSENSOR_STBY_LVC3 */ 242 + status = "okay"; 243 + }; 244 + 245 + &i2c2 { 246 + /* SMB_PCIE_STBY_LVC3 */ 247 + status = "okay"; 248 + }; 249 + 250 + &i2c3 { 251 + /* SMB_HOST_STBY_LVC3 */ 252 + multi-master; 253 + status = "okay"; 254 + }; 255 + 256 + &i2c4 { 257 + /* BMC_PMBUS2_STBY */ 258 + status = "okay"; 259 + }; 260 + 261 + &i2c5 { 262 + /* SMB_SMLINK0_STBY_LVC3 */ 263 + bus-frequency = <1000000>; 264 + multi-master; 265 + status = "okay"; 266 + }; 267 + 268 + &i2c6 { 269 + /* SMB_TEMPSENSOR_STBY_LVC3 */ 270 + multi-master; 271 + status = "okay"; 272 + }; 273 + 274 + &i2c7 { 275 + /* SMB_SM_PMB1_SML1_STBY_LVC3 */ 276 + multi-master; 277 + status = "okay"; 278 + }; 279 + 280 + &i2c9 { 281 + /* SMB_BMC_ETH3_LVC3 */ 282 + status = "okay"; 283 + }; 284 + 285 + &i2c10 { 286 + /* SMB_BMC_ETH2_LVC3 */ 287 + status = "okay"; 288 + }; 289 + 290 + &i2c11 { 291 + /* SMB_BMC_MGMT_LVC3 */ 292 + status = "okay"; 293 + 294 + at24@50 { 295 + compatible = "atmel,24c64"; 296 + reg = <0x50>; 297 + pagesize = <32>; 298 + size = <8192>; 299 + address-width = <16>; 300 + }; 301 + }; 302 + 303 + &i2c12 { 304 + /* SMB_BMC_FAULT_EXP_LVC3 */ 305 + status = "okay"; 306 + }; 307 + 308 + &i2c13 { 309 + /* SMB_PCIE2_STBY_LVC3 */ 310 + status = "okay"; 311 + };