Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

ARM: dts: imx7-colibri: add MCP2515 CAN controller

The Colibri Evaluation Carrier Board provides a MCP2515 CAN
controller connected via SPI. Note that the i.MX 7 provides
an internal CAN controller which is much better suited for CAN
operations. Using the MCP2515 with a Colibri iMX7 module is
mainly useful to test the SPI interface.

Signed-off-by: Stefan Agner <stefan@agner.ch>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

authored by

Stefan Agner and committed by
Shawn Guo
66d59b67 6deb2260

+37 -1
+25
arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
··· 45 45 stdout-path = "serial0:115200n8"; 46 46 }; 47 47 48 + /* fixed crystal dedicated to mpc258x */ 49 + clk16m: clk16m { 50 + compatible = "fixed-clock"; 51 + #clock-cells = <0>; 52 + clock-frequency = <16000000>; 53 + }; 54 + 48 55 panel: panel { 49 56 compatible = "edt,et057090dhu"; 50 57 backlight = <&bl>; ··· 104 97 105 98 &adc2 { 106 99 status = "okay"; 100 + }; 101 + 102 + &ecspi3 { 103 + status = "okay"; 104 + 105 + mcp2515: can@0 { 106 + compatible = "microchip,mcp2515"; 107 + pinctrl-names = "default"; 108 + pinctrl-0 = <&pinctrl_can_int>; 109 + reg = <0>; 110 + clocks = <&clk16m>; 111 + interrupt-parent = <&gpio5>; 112 + interrupts = <2 IRQ_TYPE_EDGE_FALLING>; 113 + spi-max-frequency = <10000000>; 114 + vdd-supply = <&reg_3v3>; 115 + xceiver-supply = <&reg_5v0>; 116 + status = "okay"; 117 + }; 107 118 }; 108 119 109 120 &fec1 {
+12 -1
arch/arm/boot/dts/imx7-colibri.dtsi
··· 92 92 cpu-supply = <&reg_DCDC2>; 93 93 }; 94 94 95 + &ecspi3 { 96 + pinctrl-names = "default"; 97 + pinctrl-0 = <&pinctrl_ecspi3 &pinctrl_ecspi3_cs>; 98 + cs-gpios = <&gpio4 11 GPIO_ACTIVE_HIGH>; 99 + }; 100 + 95 101 &fec1 { 96 102 pinctrl-names = "default"; 97 103 pinctrl-0 = <&pinctrl_enet1>; ··· 319 313 fsl,pins = < 320 314 MX7D_PAD_ENET1_RGMII_RD3__GPIO7_IO3 0x74 /* SODIMM 55 */ 321 315 MX7D_PAD_ENET1_RGMII_RD2__GPIO7_IO2 0x74 /* SODIMM 63 */ 322 - MX7D_PAD_SD1_RESET_B__GPIO5_IO2 0X14 /* SODIMM 73 */ 323 316 MX7D_PAD_SAI1_RX_SYNC__GPIO6_IO16 0x14 /* SODIMM 77 */ 324 317 MX7D_PAD_EPDC_DATA09__GPIO2_IO9 0x14 /* SODIMM 89 */ 325 318 MX7D_PAD_EPDC_DATA08__GPIO2_IO8 0x74 /* SODIMM 91 */ ··· 402 397 pinctrl_i2c1_int: i2c1-int-grp { /* PMIC / TOUCH */ 403 398 fsl,pins = < 404 399 MX7D_PAD_GPIO1_IO13__GPIO1_IO13 0x79 400 + >; 401 + }; 402 + 403 + pinctrl_can_int: can-int-grp { 404 + fsl,pins = < 405 + MX7D_PAD_SD1_RESET_B__GPIO5_IO2 0X14 /* SODIMM 73 */ 405 406 >; 406 407 }; 407 408