Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

gpu: Bulk conversion to generic_handle_domain_irq()

Wherever possible, replace constructs that match either
generic_handle_irq(irq_find_mapping()) or
generic_handle_irq(irq_linear_revmap()) to a single call to
generic_handle_domain_irq().

Signed-off-by: Marc Zyngier <maz@kernel.org>

+10 -21
+1 -1
drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
··· 502 502 503 503 } else if ((client_id == AMDGPU_IRQ_CLIENTID_LEGACY) && 504 504 adev->irq.virq[src_id]) { 505 - generic_handle_irq(irq_find_mapping(adev->irq.domain, src_id)); 505 + generic_handle_domain_irq(adev->irq.domain, src_id); 506 506 507 507 } else if (!adev->irq.client[client_id].sources) { 508 508 DRM_DEBUG("Unregistered interrupt client_id: %d src_id: %d\n",
+4 -11
drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c
··· 45 45 46 46 while (interrupts) { 47 47 irq_hw_number_t hwirq = fls(interrupts) - 1; 48 - unsigned int mapping; 49 48 int rc; 50 49 51 - mapping = irq_find_mapping(dpu_mdss->irq_controller.domain, 52 - hwirq); 53 - if (mapping == 0) { 54 - DRM_ERROR("couldn't find irq mapping for %lu\n", hwirq); 55 - break; 56 - } 57 - 58 - rc = generic_handle_irq(mapping); 50 + rc = generic_handle_domain_irq(dpu_mdss->irq_controller.domain, 51 + hwirq); 59 52 if (rc < 0) { 60 - DRM_ERROR("handle irq fail: irq=%lu mapping=%u rc=%d\n", 61 - hwirq, mapping, rc); 53 + DRM_ERROR("handle irq fail: irq=%lu rc=%d\n", 54 + hwirq, rc); 62 55 break; 63 56 } 64 57
+1 -2
drivers/gpu/drm/msm/disp/mdp5/mdp5_mdss.c
··· 50 50 while (intr) { 51 51 irq_hw_number_t hwirq = fls(intr) - 1; 52 52 53 - generic_handle_irq(irq_find_mapping( 54 - mdp5_mdss->irqcontroller.domain, hwirq)); 53 + generic_handle_domain_irq(mdp5_mdss->irqcontroller.domain, hwirq); 55 54 intr &= ~(1 << hwirq); 56 55 } 57 56
+4 -7
drivers/gpu/ipu-v3/ipu-common.c
··· 1003 1003 static void ipu_irq_handle(struct ipu_soc *ipu, const int *regs, int num_regs) 1004 1004 { 1005 1005 unsigned long status; 1006 - int i, bit, irq; 1006 + int i, bit; 1007 1007 1008 1008 for (i = 0; i < num_regs; i++) { 1009 1009 1010 1010 status = ipu_cm_read(ipu, IPU_INT_STAT(regs[i])); 1011 1011 status &= ipu_cm_read(ipu, IPU_INT_CTRL(regs[i])); 1012 1012 1013 - for_each_set_bit(bit, &status, 32) { 1014 - irq = irq_linear_revmap(ipu->domain, 1015 - regs[i] * 32 + bit); 1016 - if (irq) 1017 - generic_handle_irq(irq); 1018 - } 1013 + for_each_set_bit(bit, &status, 32) 1014 + generic_handle_domain_irq(ipu->domain, 1015 + regs[i] * 32 + bit); 1019 1016 } 1020 1017 } 1021 1018