tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
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Merge master.kernel.org:/home/rmk/linux-2.6-arm

Linus Torvalds 66b5920f 49bd96c2

+8 -4
unified split
+1 -1
arch/arm/mach-clps7500/core.c
··· 260 261 static struct map_desc cl7500_io_desc[] __initdata = { 262 { /* IO space */ 263 - .virtual = IO_BASE, 264 .pfn = __phys_to_pfn(IO_START), 265 .length = IO_SIZE, 266 .type = MT_DEVICE
··· 260 261 static struct map_desc cl7500_io_desc[] __initdata = { 262 { /* IO space */ 263 + .virtual = (unsigned long)IO_BASE, 264 .pfn = __phys_to_pfn(IO_START), 265 .length = IO_SIZE, 266 .type = MT_DEVICE
+1 -1
arch/arm/mach-pxa/tosa.c
··· 14 15 #include <linux/kernel.h> 16 #include <linux/init.h> 17 - #include <linux/device.h> 18 #include <linux/major.h> 19 #include <linux/fs.h> 20 #include <linux/interrupt.h>
··· 14 15 #include <linux/kernel.h> 16 #include <linux/init.h> 17 + #include <linux/platform_device.h> 18 #include <linux/major.h> 19 #include <linux/fs.h> 20 #include <linux/interrupt.h>
+2 -1
arch/arm/mach-sa1100/assabet.c
··· 293 GPDR |= 0x3fc; /* Configure GPIO 9:2 as outputs */ 294 GPSR = 0x3fc; /* Write 0xFF to GPIO 9:2 */ 295 GPDR &= ~(0x3fc); /* Configure GPIO 9:2 as inputs */ 296 - for(i = 100; i--; scr = GPLR); /* Read GPIO 9:2 */ 297 GPDR |= 0x3fc; /* restore correct pin direction */ 298 scr &= 0x3fc; /* save as system configuration byte. */ 299 SCR_value = scr;
··· 293 GPDR |= 0x3fc; /* Configure GPIO 9:2 as outputs */ 294 GPSR = 0x3fc; /* Write 0xFF to GPIO 9:2 */ 295 GPDR &= ~(0x3fc); /* Configure GPIO 9:2 as inputs */ 296 + for(i = 100; i--; ) /* Read GPIO 9:2 */ 297 + scr = GPLR; 298 GPDR |= 0x3fc; /* restore correct pin direction */ 299 scr &= 0x3fc; /* save as system configuration byte. */ 300 SCR_value = scr;
+1 -1
include/asm-arm/arch-ebsa110/io.h
··· 64 #define writew(v,b) __writew(v,b) 65 #define writel(v,b) __writel(v,b) 66 67 - #define __arch_ioremap(cookie,sz,c,a) ((void __iomem *)(cookie)) 68 #define __arch_iounmap(cookie) do { } while (0) 69 70 extern void insb(unsigned int port, void *buf, int sz);
··· 64 #define writew(v,b) __writew(v,b) 65 #define writel(v,b) __writel(v,b) 66 67 + #define __arch_ioremap(cookie,sz,c) ((void __iomem *)(cookie)) 68 #define __arch_iounmap(cookie) do { } while (0) 69 70 extern void insb(unsigned int port, void *buf, int sz);
+1
include/asm-arm/arch-ixp4xx/ixp4xx-regs.h
··· 47 * Queue Manager 48 */ 49 #define IXP4XX_QMGR_BASE_PHYS (0x60000000) 50 51 /* 52 * Expansion BUS Configuration registers
··· 47 * Queue Manager 48 */ 49 #define IXP4XX_QMGR_BASE_PHYS (0x60000000) 50 + #define IXP4XX_QMGR_REGION_SIZE (0x00004000) 51 52 /* 53 * Expansion BUS Configuration registers
+2
include/asm-arm/numnodes.h
··· 17 #ifndef __ASM_ARM_NUMNODES_H 18 #define __ASM_ARM_NUMNODES_H 19 20 #ifndef NODES_SHIFT 21 # define NODES_SHIFT 2 /* Normally, Max 4 Nodes */ 22 #endif
··· 17 #ifndef __ASM_ARM_NUMNODES_H 18 #define __ASM_ARM_NUMNODES_H 19 20 + #include <asm/memory.h> 21 + 22 #ifndef NODES_SHIFT 23 # define NODES_SHIFT 2 /* Normally, Max 4 Nodes */ 24 #endif