Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

ARM: dts: stm32: add STM32MP1-based Linux Automation MC-1 board

The Linux Automation MC-1 is a SBC built around the Octavo Systems
OSD32MP15x SiP. The SiP features up to 1 GB DDR3 RAM, EEPROM and
a PMIC. The board has eMMC and a SD slot for storage and GbE
for both connectivity and power.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>

authored by

Ahmad Fatoum and committed by
Alexandre Torgue
666b5ca8 f0b06064

+669 -1
+2 -1
arch/arm/boot/dts/Makefile
··· 1033 1033 stm32mp157c-dhcom-pdk2.dtb \ 1034 1034 stm32mp157c-dk2.dtb \ 1035 1035 stm32mp157c-ed1.dtb \ 1036 - stm32mp157c-ev1.dtb 1036 + stm32mp157c-ev1.dtb \ 1037 + stm32mp157c-lxa-mc1.dtb 1037 1038 dtb-$(CONFIG_MACH_SUN4I) += \ 1038 1039 sun4i-a10-a1000.dtb \ 1039 1040 sun4i-a10-ba10-tvbox.dtb \
+185
arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
··· 162 162 }; 163 163 }; 164 164 165 + ethernet0_rgmii_pins_b: rgmii-1 { 166 + pins1 { 167 + pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */ 168 + <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */ 169 + <STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */ 170 + <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */ 171 + <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */ 172 + <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */ 173 + <STM32_PINMUX('B', 11, AF11)>, /* ETH_RGMII_TX_CTL */ 174 + <STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */ 175 + bias-disable; 176 + drive-push-pull; 177 + slew-rate = <2>; 178 + }; 179 + pins2 { 180 + pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */ 181 + bias-disable; 182 + drive-push-pull; 183 + slew-rate = <0>; 184 + }; 185 + pins3 { 186 + pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */ 187 + <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */ 188 + <STM32_PINMUX('H', 6, AF11)>, /* ETH_RGMII_RXD2 */ 189 + <STM32_PINMUX('H', 7, AF11)>, /* ETH_RGMII_RXD3 */ 190 + <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */ 191 + <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */ 192 + bias-disable; 193 + }; 194 + }; 195 + 196 + ethernet0_rgmii_sleep_pins_b: rgmii-sleep-1 { 197 + pins1 { 198 + pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */ 199 + <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */ 200 + <STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RGMII_TXD0 */ 201 + <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */ 202 + <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */ 203 + <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */ 204 + <STM32_PINMUX('B', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */ 205 + <STM32_PINMUX('C', 1, ANALOG)>, /* ETH_MDC */ 206 + <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */ 207 + <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */ 208 + <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */ 209 + <STM32_PINMUX('H', 6, ANALOG)>, /* ETH_RGMII_RXD2 */ 210 + <STM32_PINMUX('H', 7, ANALOG)>, /* ETH_RGMII_RXD3 */ 211 + <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */ 212 + <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */ 213 + }; 214 + }; 215 + 165 216 ethernet0_rmii_pins_a: rmii-0 { 166 217 pins1 { 167 218 pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH1_RMII_TXD0 */ ··· 375 324 }; 376 325 }; 377 326 327 + i2c5_pins_b: i2c5-1 { 328 + pins { 329 + pinmux = <STM32_PINMUX('D', 0, AF4)>, /* I2C5_SCL */ 330 + <STM32_PINMUX('D', 1, AF4)>; /* I2C5_SDA */ 331 + bias-disable; 332 + drive-open-drain; 333 + slew-rate = <0>; 334 + }; 335 + }; 336 + 337 + i2c5_sleep_pins_b: i2c5-sleep-1 { 338 + pins { 339 + pinmux = <STM32_PINMUX('D', 0, ANALOG)>, /* I2C5_SCL */ 340 + <STM32_PINMUX('D', 1, ANALOG)>; /* I2C5_SDA */ 341 + }; 342 + }; 343 + 378 344 i2s2_pins_a: i2s2-0 { 379 345 pins { 380 346 pinmux = <STM32_PINMUX('I', 3, AF5)>, /* I2S2_SDO */ ··· 549 481 }; 550 482 }; 551 483 484 + ltdc_pins_c: ltdc-2 { 485 + pins1 { 486 + pinmux = <STM32_PINMUX('B', 1, AF9)>, /* LTDC_R6 */ 487 + <STM32_PINMUX('B', 9, AF14)>, /* LTDC_B7 */ 488 + <STM32_PINMUX('C', 0, AF14)>, /* LTDC_R5 */ 489 + <STM32_PINMUX('D', 3, AF14)>, /* LTDC_G7 */ 490 + <STM32_PINMUX('D', 6, AF14)>, /* LTDC_B2 */ 491 + <STM32_PINMUX('D', 10, AF14)>, /* LTDC_B3 */ 492 + <STM32_PINMUX('E', 11, AF14)>, /* LTDC_G3 */ 493 + <STM32_PINMUX('E', 12, AF14)>, /* LTDC_B4 */ 494 + <STM32_PINMUX('E', 13, AF14)>, /* LTDC_DE */ 495 + <STM32_PINMUX('E', 15, AF14)>, /* LTDC_R7 */ 496 + <STM32_PINMUX('H', 4, AF9)>, /* LTDC_G5 */ 497 + <STM32_PINMUX('H', 8, AF14)>, /* LTDC_R2 */ 498 + <STM32_PINMUX('H', 9, AF14)>, /* LTDC_R3 */ 499 + <STM32_PINMUX('H', 10, AF14)>, /* LTDC_R4 */ 500 + <STM32_PINMUX('H', 13, AF14)>, /* LTDC_G2 */ 501 + <STM32_PINMUX('H', 15, AF14)>, /* LTDC_G4 */ 502 + <STM32_PINMUX('I', 1, AF14)>, /* LTDC_G6 */ 503 + <STM32_PINMUX('I', 5, AF14)>, /* LTDC_B5 */ 504 + <STM32_PINMUX('I', 6, AF14)>, /* LTDC_B6 */ 505 + <STM32_PINMUX('I', 9, AF14)>, /* LTDC_VSYNC */ 506 + <STM32_PINMUX('I', 10, AF14)>; /* LTDC_HSYNC */ 507 + bias-disable; 508 + drive-push-pull; 509 + slew-rate = <0>; 510 + }; 511 + pins2 { 512 + pinmux = <STM32_PINMUX('E', 14, AF14)>; /* LTDC_CLK */ 513 + bias-disable; 514 + drive-push-pull; 515 + slew-rate = <1>; 516 + }; 517 + }; 518 + 519 + ltdc_sleep_pins_c: ltdc-sleep-2 { 520 + pins1 { 521 + pinmux = <STM32_PINMUX('B', 1, ANALOG)>, /* LTDC_R6 */ 522 + <STM32_PINMUX('B', 9, ANALOG)>, /* LTDC_B7 */ 523 + <STM32_PINMUX('C', 0, ANALOG)>, /* LTDC_R5 */ 524 + <STM32_PINMUX('D', 3, ANALOG)>, /* LTDC_G7 */ 525 + <STM32_PINMUX('D', 6, ANALOG)>, /* LTDC_B2 */ 526 + <STM32_PINMUX('D', 10, ANALOG)>, /* LTDC_B3 */ 527 + <STM32_PINMUX('E', 11, ANALOG)>, /* LTDC_G3 */ 528 + <STM32_PINMUX('E', 12, ANALOG)>, /* LTDC_B4 */ 529 + <STM32_PINMUX('E', 13, ANALOG)>, /* LTDC_DE */ 530 + <STM32_PINMUX('E', 15, ANALOG)>, /* LTDC_R7 */ 531 + <STM32_PINMUX('H', 4, ANALOG)>, /* LTDC_G5 */ 532 + <STM32_PINMUX('H', 8, ANALOG)>, /* LTDC_R2 */ 533 + <STM32_PINMUX('H', 9, ANALOG)>, /* LTDC_R3 */ 534 + <STM32_PINMUX('H', 10, ANALOG)>, /* LTDC_R4 */ 535 + <STM32_PINMUX('H', 13, ANALOG)>, /* LTDC_G2 */ 536 + <STM32_PINMUX('H', 15, ANALOG)>, /* LTDC_G4 */ 537 + <STM32_PINMUX('I', 1, ANALOG)>, /* LTDC_G6 */ 538 + <STM32_PINMUX('I', 5, ANALOG)>, /* LTDC_B5 */ 539 + <STM32_PINMUX('I', 6, ANALOG)>, /* LTDC_B6 */ 540 + <STM32_PINMUX('I', 9, ANALOG)>, /* LTDC_VSYNC */ 541 + <STM32_PINMUX('I', 10, ANALOG)>, /* LTDC_HSYNC */ 542 + <STM32_PINMUX('E', 14, ANALOG)>; /* LTDC_CLK */ 543 + }; 544 + }; 545 + 552 546 m_can1_pins_a: m-can1-0 { 553 547 pins1 { 554 548 pinmux = <STM32_PINMUX('H', 13, AF9)>; /* CAN1_TX */ ··· 680 550 }; 681 551 }; 682 552 553 + pwm3_pins_b: pwm3-1 { 554 + pins { 555 + pinmux = <STM32_PINMUX('B', 5, AF2)>; /* TIM3_CH2 */ 556 + bias-disable; 557 + drive-push-pull; 558 + slew-rate = <0>; 559 + }; 560 + }; 561 + 562 + pwm3_sleep_pins_b: pwm3-sleep-1 { 563 + pins { 564 + pinmux = <STM32_PINMUX('B', 5, ANALOG)>; /* TIM3_CH2 */ 565 + }; 566 + }; 567 + 683 568 pwm4_pins_a: pwm4-0 { 684 569 pins { 685 570 pinmux = <STM32_PINMUX('D', 14, AF2)>, /* TIM4_CH3 */ ··· 739 594 pwm5_sleep_pins_a: pwm5-sleep-0 { 740 595 pins { 741 596 pinmux = <STM32_PINMUX('H', 11, ANALOG)>; /* TIM5_CH2 */ 597 + }; 598 + }; 599 + 600 + pwm5_pins_b: pwm5-1 { 601 + pins { 602 + pinmux = <STM32_PINMUX('H', 11, AF2)>, /* TIM5_CH2 */ 603 + <STM32_PINMUX('H', 12, AF2)>, /* TIM5_CH3 */ 604 + <STM32_PINMUX('I', 0, AF2)>; /* TIM5_CH4 */ 605 + bias-disable; 606 + drive-push-pull; 607 + slew-rate = <0>; 608 + }; 609 + }; 610 + 611 + pwm5_sleep_pins_b: pwm5-sleep-1 { 612 + pins { 613 + pinmux = <STM32_PINMUX('H', 11, ANALOG)>, /* TIM5_CH2 */ 614 + <STM32_PINMUX('H', 12, ANALOG)>, /* TIM5_CH3 */ 615 + <STM32_PINMUX('I', 0, ANALOG)>; /* TIM5_CH4 */ 742 616 }; 743 617 }; 744 618 ··· 1148 984 <STM32_PINMUX('A', 9, ANALOG)>, /* SDMMC2_D5 */ 1149 985 <STM32_PINMUX('E', 5, ANALOG)>, /* SDMMC2_D6 */ 1150 986 <STM32_PINMUX('D', 3, ANALOG)>; /* SDMMC2_D7 */ 987 + }; 988 + }; 989 + 990 + sdmmc2_d47_pins_b: sdmmc2-d47-1 { 991 + pins { 992 + pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */ 993 + <STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */ 994 + <STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */ 995 + <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */ 996 + slew-rate = <1>; 997 + drive-push-pull; 998 + bias-disable; 999 + }; 1000 + }; 1001 + 1002 + sdmmc2_d47_sleep_pins_b: sdmmc2-d47-sleep-1 { 1003 + pins { 1004 + pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */ 1005 + <STM32_PINMUX('A', 9, ANALOG)>, /* SDMMC2_D5 */ 1006 + <STM32_PINMUX('C', 6, ANALOG)>, /* SDMMC2_D6 */ 1007 + <STM32_PINMUX('C', 7, ANALOG)>; /* SDMMC2_D7 */ 1151 1008 }; 1152 1009 }; 1153 1010
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arch/arm/boot/dts/stm32mp157c-lxa-mc1.dts
··· 1 + /* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) */ 2 + /* 3 + * Copyright (C) 2020 STMicroelectronics - All Rights Reserved 4 + * Copyright (C) 2020 Ahmad Fatoum, Pengutronix 5 + */ 6 + 7 + /dts-v1/; 8 + 9 + #include "stm32mp157.dtsi" 10 + #include "stm32mp15xx-osd32.dtsi" 11 + #include "stm32mp15xxac-pinctrl.dtsi" 12 + 13 + #include <dt-bindings/gpio/gpio.h> 14 + #include <dt-bindings/pwm/pwm.h> 15 + 16 + / { 17 + model = "Linux Automation MC-1 board"; 18 + compatible = "lxa,stm32mp157c-mc1", "st,stm32mp157"; 19 + 20 + aliases { 21 + ethernet0 = &ethernet0; 22 + mmc0 = &sdmmc1; 23 + mmc1 = &sdmmc2; 24 + serial0 = &uart4; 25 + }; 26 + 27 + backlight: backlight { 28 + compatible = "pwm-backlight"; 29 + pwms = <&backlight_pwm 1 100000 PWM_POLARITY_INVERTED>; 30 + brightness-levels = <0 31 63 95 127 159 191 223 255>; 31 + default-brightness-level = <7>; 32 + power-supply = <&reg_5v2>; /* 3V3_BACKLIGHT */ 33 + }; 34 + 35 + chosen { 36 + stdout-path = &uart4; 37 + }; 38 + 39 + led-act { 40 + compatible = "gpio-leds"; 41 + 42 + led-green { 43 + label = "mc1:green:act"; 44 + gpios = <&gpioa 13 GPIO_ACTIVE_LOW>; 45 + linux,default-trigger = "heartbeat"; 46 + }; 47 + }; 48 + 49 + led-rgb { 50 + compatible = "pwm-leds"; 51 + 52 + led-red { 53 + label = "mc1:red:rgb"; 54 + pwms = <&leds_pwm 1 1000000 0>; 55 + max-brightness = <255>; 56 + active-low; 57 + }; 58 + 59 + led-green { 60 + label = "mc1:green:rgb"; 61 + pwms = <&leds_pwm 2 1000000 0>; 62 + max-brightness = <255>; 63 + active-low; 64 + }; 65 + 66 + led-blue { 67 + label = "mc1:blue:rgb"; 68 + pwms = <&leds_pwm 3 1000000 0>; 69 + max-brightness = <255>; 70 + active-low; 71 + }; 72 + }; 73 + 74 + panel: panel { 75 + compatible = "edt,etm0700g0edh6", "simple-panel"; 76 + backlight = <&backlight>; 77 + enable-gpios = <&gpiod 4 GPIO_ACTIVE_HIGH>; 78 + power-supply = <&reg_3v3>; 79 + 80 + port { 81 + panel_input: endpoint { 82 + remote-endpoint = <&ltdc_ep0_out>; 83 + }; 84 + }; 85 + }; 86 + 87 + reg_3v3: regulator_3v3 { 88 + compatible = "regulator-fixed"; 89 + regulator-name = "3V3"; 90 + regulator-min-microvolt = <3300000>; 91 + regulator-max-microvolt = <3300000>; 92 + regulator-always-on; 93 + vin-supply = <&v3v3>; 94 + }; 95 + 96 + /* supplied by either debug board or PoE */ 97 + reg_5v2: regulator_5v2 { 98 + compatible = "regulator-fixed"; 99 + regulator-name = "5V2"; 100 + regulator-min-microvolt = <5200000>; 101 + regulator-max-microvolt = <5200000>; 102 + regulator-always-on; 103 + }; 104 + }; 105 + 106 + &ethernet0 { 107 + pinctrl-names = "default", "sleep"; 108 + pinctrl-0 = <&ethernet0_rgmii_pins_b>; 109 + pinctrl-1 = <&ethernet0_rgmii_sleep_pins_b>; 110 + phy-mode = "rgmii-id"; 111 + phy-handle = <&ethphy>; 112 + status = "okay"; 113 + 114 + mdio0 { 115 + compatible = "snps,dwmac-mdio"; 116 + #address-cells = <1>; 117 + #size-cells = <0>; 118 + 119 + ethphy: ethernet-phy@3 { /* KSZ9031RN */ 120 + reg = <3>; 121 + reset-gpios = <&gpiog 0 GPIO_ACTIVE_LOW>; /* ETH_RST# */ 122 + interrupt-parent = <&gpioa>; 123 + interrupts = <6 IRQ_TYPE_EDGE_FALLING>; /* ETH_MDINT# */ 124 + rxc-skew-ps = <1860>; 125 + txc-skew-ps = <1860>; 126 + reset-assert-us = <10000>; 127 + reset-deassert-us = <300>; 128 + micrel,force-master; 129 + }; 130 + }; 131 + }; 132 + 133 + &gpioz { 134 + gpio-line-names = "HWID0", "HWID1", "HWID2", "HWID3", "", "", 135 + "HWID4", "HWID5"; 136 + }; 137 + 138 + &i2c5 { 139 + pinctrl-names = "default", "sleep"; 140 + pinctrl-0 = <&i2c5_pins_b>; 141 + pinctrl-1 = <&i2c5_sleep_pins_b>; 142 + clock-frequency = <400000>; 143 + status = "okay"; 144 + 145 + touchscreen@38 { 146 + compatible = "edt,edt-ft5x06"; 147 + interrupt-parent = <&gpiod>; 148 + interrupts = <11 IRQ_TYPE_EDGE_FALLING>; /* TOUCH_INT# */ 149 + vcc-supply = <&reg_3v3>; 150 + reg = <0x38>; 151 + reset-gpios = <&gpiof 8 GPIO_ACTIVE_LOW>; /* TOUCH_RESET# */ 152 + touchscreen-size-x = <1792>; 153 + touchscreen-size-y = <1024>; 154 + wakeup-source; 155 + }; 156 + }; 157 + 158 + &ltdc { 159 + pinctrl-names = "default", "sleep"; 160 + pinctrl-0 = <&ltdc_pins_c>; 161 + pinctrl-1 = <&ltdc_sleep_pins_c>; 162 + status = "okay"; 163 + 164 + port { 165 + ltdc_ep0_out: endpoint@0 { 166 + reg = <0>; 167 + remote-endpoint = <&panel_input>; 168 + }; 169 + }; 170 + }; 171 + 172 + &pmic { 173 + regulators { 174 + buck4-supply = <&reg_5v2>; /* VIN */ 175 + ldo2-supply = <&reg_5v2>; /* PMIC_LDO25IN */ 176 + ldo5-supply = <&reg_5v2>; /* PMIC_LDO25IN */ 177 + boost-supply = <&reg_5v2>; /* PMIC_BSTIN */ 178 + pwr_sw2-supply = <&bst_out>; /* PMIC_SWIN */ 179 + }; 180 + }; 181 + 182 + &sdmmc1 { 183 + pinctrl-names = "default", "opendrain", "sleep"; 184 + pinctrl-0 = <&sdmmc1_b4_pins_a>; 185 + pinctrl-1 = <&sdmmc1_b4_od_pins_a>; 186 + pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>; 187 + bus-width = <4>; 188 + cd-gpios = <&gpioh 3 GPIO_ACTIVE_LOW>; 189 + disable-wp; 190 + no-1-8-v; 191 + st,neg-edge; 192 + vmmc-supply = <&reg_3v3>; 193 + status = "okay"; 194 + }; 195 + 196 + &sdmmc1_b4_pins_a { 197 + /* 198 + * board lacks external pull-ups on SDMMC lines. Class 10 SD refuses to 199 + * work, thus enable internal pull-ups. 200 + */ 201 + pins1 { 202 + /delete-property/ bias-disable; 203 + bias-pull-up; 204 + }; 205 + pins2 { 206 + /delete-property/ bias-disable; 207 + bias-pull-up; 208 + }; 209 + }; 210 + 211 + &sdmmc2 { 212 + pinctrl-names = "default", "opendrain", "sleep"; 213 + pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_b>; 214 + pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_b>; 215 + pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_b>; 216 + bus-width = <8>; 217 + no-1-8-v; 218 + no-sd; 219 + no-sdio; 220 + non-removable; 221 + st,neg-edge; 222 + vmmc-supply = <&reg_3v3>; 223 + status = "okay"; 224 + }; 225 + 226 + &timers3 { 227 + status = "okay"; 228 + 229 + backlight_pwm: pwm { 230 + pinctrl-names = "default", "sleep"; 231 + pinctrl-0 = <&pwm3_pins_b>; 232 + pinctrl-1 = <&pwm3_sleep_pins_b>; 233 + status = "okay"; 234 + }; 235 + }; 236 + 237 + &timers5 { 238 + status = "okay"; 239 + 240 + leds_pwm: pwm { 241 + pinctrl-names = "default", "sleep"; 242 + pinctrl-0 = <&pwm5_pins_b>; 243 + pinctrl-1 = <&pwm5_sleep_pins_b>; 244 + status = "okay"; 245 + }; 246 + }; 247 + 248 + &uart4 { 249 + pinctrl-names = "default"; 250 + pinctrl-0 = <&uart4_pins_a>; 251 + status = "okay"; 252 + };
+230
arch/arm/boot/dts/stm32mp15xx-osd32.dtsi
··· 1 + /* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) */ 2 + /* 3 + * Copyright (C) 2020 STMicroelectronics - All Rights Reserved 4 + * Copyright (C) 2020 Ahmad Fatoum, Pengutronix 5 + */ 6 + 7 + #include "stm32mp15-pinctrl.dtsi" 8 + 9 + #include <dt-bindings/mfd/st,stpmic1.h> 10 + 11 + / { 12 + reserved-memory { 13 + #address-cells = <1>; 14 + #size-cells = <1>; 15 + ranges; 16 + 17 + mcuram2: mcuram2@10000000 { 18 + compatible = "shared-dma-pool"; 19 + reg = <0x10000000 0x40000>; 20 + no-map; 21 + }; 22 + 23 + vdev0vring0: vdev0vring0@10040000 { 24 + compatible = "shared-dma-pool"; 25 + reg = <0x10040000 0x1000>; 26 + no-map; 27 + }; 28 + 29 + vdev0vring1: vdev0vring1@10041000 { 30 + compatible = "shared-dma-pool"; 31 + reg = <0x10041000 0x1000>; 32 + no-map; 33 + }; 34 + 35 + vdev0buffer: vdev0buffer@10042000 { 36 + compatible = "shared-dma-pool"; 37 + reg = <0x10042000 0x4000>; 38 + no-map; 39 + }; 40 + 41 + mcuram: mcuram@30000000 { 42 + compatible = "shared-dma-pool"; 43 + reg = <0x30000000 0x40000>; 44 + no-map; 45 + }; 46 + 47 + retram: retram@38000000 { 48 + compatible = "shared-dma-pool"; 49 + reg = <0x38000000 0x10000>; 50 + no-map; 51 + }; 52 + }; 53 + 54 + reg_sip_eeprom: regulator_eeprom { 55 + compatible = "regulator-fixed"; 56 + regulator-name = "sip_eeprom"; 57 + regulator-always-on; 58 + }; 59 + }; 60 + 61 + &i2c4 { 62 + pinctrl-names = "default", "sleep"; 63 + pinctrl-0 = <&i2c4_pins_a>; 64 + pinctrl-1 = <&i2c4_sleep_pins_a>; 65 + clock-frequency = <400000>; 66 + i2c-scl-rising-time-ns = <185>; 67 + i2c-scl-falling-time-ns = <20>; 68 + status = "okay"; 69 + 70 + pmic: stpmic@33 { 71 + compatible = "st,stpmic1"; 72 + reg = <0x33>; 73 + interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>; 74 + interrupt-controller; 75 + #interrupt-cells = <2>; 76 + 77 + regulators { 78 + compatible = "st,stpmic1-regulators"; 79 + 80 + ldo1-supply = <&v3v3>; 81 + ldo6-supply = <&v3v3>; 82 + pwr_sw1-supply = <&bst_out>; 83 + 84 + vddcore: buck1 { 85 + regulator-name = "vddcore"; 86 + regulator-min-microvolt = <1200000>; 87 + regulator-max-microvolt = <1350000>; 88 + regulator-always-on; 89 + regulator-initial-mode = <0>; 90 + regulator-over-current-protection; 91 + }; 92 + 93 + vdd_ddr: buck2 { 94 + regulator-name = "vdd_ddr"; 95 + regulator-min-microvolt = <1350000>; 96 + regulator-max-microvolt = <1350000>; 97 + regulator-always-on; 98 + regulator-initial-mode = <0>; 99 + regulator-over-current-protection; 100 + }; 101 + 102 + vdd: buck3 { 103 + regulator-name = "vdd"; 104 + regulator-min-microvolt = <3300000>; 105 + regulator-max-microvolt = <3300000>; 106 + regulator-always-on; 107 + st,mask-reset; 108 + regulator-initial-mode = <0>; 109 + regulator-over-current-protection; 110 + }; 111 + 112 + v3v3: buck4 { 113 + regulator-name = "v3v3"; 114 + regulator-min-microvolt = <3300000>; 115 + regulator-max-microvolt = <3300000>; 116 + regulator-always-on; 117 + regulator-over-current-protection; 118 + regulator-initial-mode = <0>; 119 + }; 120 + 121 + v1v8_audio: ldo1 { 122 + regulator-name = "v1v8_audio"; 123 + regulator-min-microvolt = <1800000>; 124 + regulator-max-microvolt = <1800000>; 125 + regulator-always-on; 126 + interrupts = <IT_CURLIM_LDO1 0>; 127 + 128 + }; 129 + 130 + v3v3_hdmi: ldo2 { 131 + regulator-name = "v3v3_hdmi"; 132 + regulator-min-microvolt = <3300000>; 133 + regulator-max-microvolt = <3300000>; 134 + regulator-always-on; 135 + interrupts = <IT_CURLIM_LDO2 0>; 136 + 137 + }; 138 + 139 + vtt_ddr: ldo3 { 140 + regulator-name = "vtt_ddr"; 141 + regulator-min-microvolt = <500000>; 142 + regulator-max-microvolt = <750000>; 143 + regulator-always-on; 144 + regulator-over-current-protection; 145 + }; 146 + 147 + vdd_usb: ldo4 { 148 + regulator-name = "vdd_usb"; 149 + regulator-min-microvolt = <3300000>; 150 + regulator-max-microvolt = <3300000>; 151 + interrupts = <IT_CURLIM_LDO4 0>; 152 + }; 153 + 154 + vdda: ldo5 { 155 + regulator-name = "vdda"; 156 + regulator-min-microvolt = <2900000>; 157 + regulator-max-microvolt = <2900000>; 158 + interrupts = <IT_CURLIM_LDO5 0>; 159 + regulator-boot-on; 160 + }; 161 + 162 + v1v2_hdmi: ldo6 { 163 + regulator-name = "v1v2_hdmi"; 164 + regulator-min-microvolt = <1200000>; 165 + regulator-max-microvolt = <1200000>; 166 + regulator-always-on; 167 + interrupts = <IT_CURLIM_LDO6 0>; 168 + 169 + }; 170 + 171 + vref_ddr: vref_ddr { 172 + regulator-name = "vref_ddr"; 173 + regulator-always-on; 174 + regulator-over-current-protection; 175 + }; 176 + 177 + bst_out: boost { 178 + regulator-name = "bst_out"; 179 + interrupts = <IT_OCP_BOOST 0>; 180 + }; 181 + 182 + vbus_otg: pwr_sw1 { 183 + regulator-name = "vbus_otg"; 184 + interrupts = <IT_OCP_OTG 0>; 185 + regulator-active-discharge; 186 + }; 187 + 188 + vbus_sw: pwr_sw2 { 189 + regulator-name = "vbus_sw"; 190 + interrupts = <IT_OCP_SWOUT 0>; 191 + regulator-active-discharge; 192 + }; 193 + }; 194 + 195 + onkey { 196 + compatible = "st,stpmic1-onkey"; 197 + interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 1>; 198 + interrupt-names = "onkey-falling", "onkey-rising"; 199 + }; 200 + 201 + pmic_watchdog: watchdog { 202 + compatible = "st,stpmic1-wdt"; 203 + status = "disabled"; 204 + }; 205 + }; 206 + 207 + sip_eeprom: eeprom@50 { 208 + compatible = "atmel,24c32"; 209 + vcc-supply = <&reg_sip_eeprom>; 210 + reg = <0x50>; 211 + }; 212 + }; 213 + 214 + &ipcc { 215 + status = "okay"; 216 + }; 217 + 218 + &m4_rproc { 219 + memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>, 220 + <&vdev0vring1>, <&vdev0buffer>; 221 + mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>; 222 + mbox-names = "vq0", "vq1", "shutdown"; 223 + interrupt-parent = <&exti>; 224 + interrupts = <68 1>; 225 + status = "okay"; 226 + }; 227 + 228 + &rng1 { 229 + status = "okay"; 230 + };