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ARM: dts: exynos: Add cooling levels for Exynos5420 CPUs
On Exynos5420 we support 8 cpufreq steps (600-1300 MHz) for LITTLE and
12 steps for big core (700-1800 MHz). Add respective cooling cells.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
+24
+24
arch/arm/boot/dts/exynos5420-cpus.dtsi
+24
arch/arm/boot/dts/exynos5420-cpus.dtsi
···
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clock-frequency = <1800000000>;
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cci-control-port = <&cci_control1>;
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operating-points-v2 = <&cluster_a15_opp_table>;
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+
cooling-min-level = <0>;
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+
cooling-max-level = <11>;
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+
#cooling-cells = <2>; /* min followed by max */
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};
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cpu1: cpu@1 {
···
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clock-frequency = <1800000000>;
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cci-control-port = <&cci_control1>;
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operating-points-v2 = <&cluster_a15_opp_table>;
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+
cooling-min-level = <0>;
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+
cooling-max-level = <11>;
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+
#cooling-cells = <2>; /* min followed by max */
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};
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cpu2: cpu@2 {
···
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clock-frequency = <1800000000>;
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cci-control-port = <&cci_control1>;
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operating-points-v2 = <&cluster_a15_opp_table>;
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+
cooling-min-level = <0>;
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+
cooling-max-level = <11>;
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+
#cooling-cells = <2>; /* min followed by max */
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};
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cpu3: cpu@3 {
···
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clock-frequency = <1800000000>;
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cci-control-port = <&cci_control1>;
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operating-points-v2 = <&cluster_a15_opp_table>;
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+
cooling-min-level = <0>;
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+
cooling-max-level = <11>;
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+
#cooling-cells = <2>; /* min followed by max */
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};
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cpu4: cpu@100 {
···
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clock-frequency = <1000000000>;
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cci-control-port = <&cci_control0>;
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operating-points-v2 = <&cluster_a7_opp_table>;
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+
cooling-min-level = <0>;
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+
cooling-max-level = <7>;
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+
#cooling-cells = <2>; /* min followed by max */
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};
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cpu5: cpu@101 {
···
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clock-frequency = <1000000000>;
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cci-control-port = <&cci_control0>;
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operating-points-v2 = <&cluster_a7_opp_table>;
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+
cooling-min-level = <0>;
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+
cooling-max-level = <7>;
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+
#cooling-cells = <2>; /* min followed by max */
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};
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cpu6: cpu@102 {
···
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clock-frequency = <1000000000>;
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cci-control-port = <&cci_control0>;
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operating-points-v2 = <&cluster_a7_opp_table>;
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+
cooling-min-level = <0>;
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+
cooling-max-level = <7>;
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+
#cooling-cells = <2>; /* min followed by max */
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};
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cpu7: cpu@103 {
···
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clock-frequency = <1000000000>;
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cci-control-port = <&cci_control0>;
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operating-points-v2 = <&cluster_a7_opp_table>;
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+
cooling-min-level = <0>;
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+
cooling-max-level = <7>;
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+
#cooling-cells = <2>; /* min followed by max */
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};
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};
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};