tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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Merge tag 'ti-k3-soc-for-v5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux into arm/late

Texas Instruments K3 SoC family changes for 5.4

- Typo fixes for gic-its unit addresses for both am654 and j721e
- HW spinlock nodes added for both am654 and j721e
- GPIO support for j721e
- power-domain cells update for both am654 / j721e for exclusive only
access

* tag 'ti-k3-soc-for-v5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux:
arm64: dts: ti: k3-j721e-main: Fix gic-its node unit-address
arm64: dts: ti: k3-am65-main: Fix gic-its node unit-address
arm64: dts: ti: k3-j721e-main: Add hwspinlock node
arm64: dts: ti: k3-am65-main: Add hwspinlock node
arm64: dts: k3-j721e: Add gpio-keys on common processor board
dt-bindings: pinctrl: k3: Introduce pinmux definitions for J721E
arm64: dts: ti: k3-j721e-common-proc-board: Disable unused gpio modules
arm64: dts: ti: k3-j721e: Add gpio nodes in wakeup domain
arm64: dts: ti: k3-j721e: Add gpio nodes in main domain
arm64: dts: ti: k3-j721e: Update the power domain cells
arm64: dts: ti: k3-am654: Update the power domain cells
soc: ti: ti_sci_pm_domains: Add support for exclusive and shared access
dt-bindings: ti_sci_pm_domains: Add support for exclusive and shared access
firmware: ti_sci: Allow for device shared and exclusive requests

Link: https://lore.kernel.org/r/b838d666-ab3b-7d41-67d4-09d606c732da@ti.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Arnd Bergmann 65ab0dba 1fb2e59c

+384 -51
+9 -2
Documentation/devicetree/bindings/soc/ti/sci-pm-domain.txt
··· 19 19 Required Properties: 20 20 -------------------- 21 21 - compatible: should be "ti,sci-pm-domain" 22 - - #power-domain-cells: Must be 1 so that an id can be provided in each 23 - device node. 22 + - #power-domain-cells: Can be one of the following: 23 + 1: Containing the device id of each node 24 + 2: First entry should be device id 25 + Second entry should be one of the floowing: 26 + TI_SCI_PD_EXCLUSIVE: To allow device to be 27 + exclusively controlled by 28 + the requesting hosts. 29 + TI_SCI_PD_SHARED: To allow device to be shared 30 + by multiple hosts. 24 31 25 32 Example (K2G): 26 33 -------------
+1
MAINTAINERS
··· 15885 15885 F: include/linux/soc/ti/ti_sci_protocol.h 15886 15886 F: Documentation/devicetree/bindings/soc/ti/sci-pm-domain.txt 15887 15887 F: drivers/soc/ti/ti_sci_pm_domains.c 15888 + F: include/dt-bindings/soc/ti,sci_pm_domain.h 15888 15889 F: Documentation/devicetree/bindings/reset/ti,sci-reset.txt 15889 15890 F: Documentation/devicetree/bindings/clock/ti,sci-clk.txt 15890 15891 F: drivers/clk/keystone/sci-clk.c
+29 -23
arch/arm64/boot/dts/ti/k3-am65-main.dtsi
··· 42 42 */ 43 43 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; 44 44 45 - gic_its: gic-its@18200000 { 45 + gic_its: gic-its@1820000 { 46 46 compatible = "arm,gic-v3-its"; 47 47 reg = <0x00 0x01820000 0x00 0x10000>; 48 48 socionext,synquacer-pre-its = <0x1000000 0x400000>; ··· 67 67 reg = <0x0 0x900000 0x0 0x2000>; 68 68 reg-names = "serdes"; 69 69 #phy-cells = <2>; 70 - power-domains = <&k3_pds 153>; 70 + power-domains = <&k3_pds 153 TI_SCI_PD_EXCLUSIVE>; 71 71 clocks = <&k3_clks 153 4>, <&k3_clks 153 1>, <&serdes1 AM654_SERDES_LO_REFCLK>; 72 72 clock-output-names = "serdes0_cmu_refclk", "serdes0_lo_refclk", "serdes0_ro_refclk"; 73 73 assigned-clocks = <&k3_clks 153 4>, <&serdes0 AM654_SERDES_CMU_REFCLK>; ··· 82 82 reg = <0x0 0x910000 0x0 0x2000>; 83 83 reg-names = "serdes"; 84 84 #phy-cells = <2>; 85 - power-domains = <&k3_pds 154>; 85 + power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>; 86 86 clocks = <&serdes0 AM654_SERDES_RO_REFCLK>, <&k3_clks 154 1>, <&k3_clks 154 5>; 87 87 clock-output-names = "serdes1_cmu_refclk", "serdes1_lo_refclk", "serdes1_ro_refclk"; 88 88 assigned-clocks = <&k3_clks 154 5>, <&serdes1 AM654_SERDES_CMU_REFCLK>; ··· 100 100 interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>; 101 101 clock-frequency = <48000000>; 102 102 current-speed = <115200>; 103 - power-domains = <&k3_pds 146>; 103 + power-domains = <&k3_pds 146 TI_SCI_PD_EXCLUSIVE>; 104 104 }; 105 105 106 106 main_uart1: serial@2810000 { ··· 110 110 reg-io-width = <4>; 111 111 interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>; 112 112 clock-frequency = <48000000>; 113 - power-domains = <&k3_pds 147>; 113 + power-domains = <&k3_pds 147 TI_SCI_PD_EXCLUSIVE>; 114 114 }; 115 115 116 116 main_uart2: serial@2820000 { ··· 120 120 reg-io-width = <4>; 121 121 interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>; 122 122 clock-frequency = <48000000>; 123 - power-domains = <&k3_pds 148>; 123 + power-domains = <&k3_pds 148 TI_SCI_PD_EXCLUSIVE>; 124 124 }; 125 125 126 126 main_pmx0: pinmux@11c000 { ··· 147 147 #size-cells = <0>; 148 148 clock-names = "fck"; 149 149 clocks = <&k3_clks 110 1>; 150 - power-domains = <&k3_pds 110>; 150 + power-domains = <&k3_pds 110 TI_SCI_PD_EXCLUSIVE>; 151 151 }; 152 152 153 153 main_i2c1: i2c@2010000 { ··· 158 158 #size-cells = <0>; 159 159 clock-names = "fck"; 160 160 clocks = <&k3_clks 111 1>; 161 - power-domains = <&k3_pds 111>; 161 + power-domains = <&k3_pds 111 TI_SCI_PD_EXCLUSIVE>; 162 162 }; 163 163 164 164 main_i2c2: i2c@2020000 { ··· 169 169 #size-cells = <0>; 170 170 clock-names = "fck"; 171 171 clocks = <&k3_clks 112 1>; 172 - power-domains = <&k3_pds 112>; 172 + power-domains = <&k3_pds 112 TI_SCI_PD_EXCLUSIVE>; 173 173 }; 174 174 175 175 main_i2c3: i2c@2030000 { ··· 180 180 #size-cells = <0>; 181 181 clock-names = "fck"; 182 182 clocks = <&k3_clks 113 1>; 183 - power-domains = <&k3_pds 113>; 183 + power-domains = <&k3_pds 113 TI_SCI_PD_EXCLUSIVE>; 184 184 }; 185 185 186 186 ecap0: pwm@3100000 { 187 187 compatible = "ti,am654-ecap", "ti,am3352-ecap"; 188 188 #pwm-cells = <3>; 189 189 reg = <0x0 0x03100000 0x0 0x60>; 190 - power-domains = <&k3_pds 39>; 190 + power-domains = <&k3_pds 39 TI_SCI_PD_EXCLUSIVE>; 191 191 clocks = <&k3_clks 39 0>; 192 192 clock-names = "fck"; 193 193 }; ··· 197 197 reg = <0x0 0x2100000 0x0 0x400>; 198 198 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 199 199 clocks = <&k3_clks 137 1>; 200 - power-domains = <&k3_pds 137>; 200 + power-domains = <&k3_pds 137 TI_SCI_PD_EXCLUSIVE>; 201 201 #address-cells = <1>; 202 202 #size-cells = <0>; 203 203 }; ··· 207 207 reg = <0x0 0x2110000 0x0 0x400>; 208 208 interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>; 209 209 clocks = <&k3_clks 138 1>; 210 - power-domains = <&k3_pds 138>; 210 + power-domains = <&k3_pds 138 TI_SCI_PD_EXCLUSIVE>; 211 211 #address-cells = <1>; 212 212 #size-cells = <0>; 213 213 assigned-clocks = <&k3_clks 137 1>; ··· 219 219 reg = <0x0 0x2120000 0x0 0x400>; 220 220 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 221 221 clocks = <&k3_clks 139 1>; 222 - power-domains = <&k3_pds 139>; 222 + power-domains = <&k3_pds 139 TI_SCI_PD_EXCLUSIVE>; 223 223 #address-cells = <1>; 224 224 #size-cells = <0>; 225 225 }; ··· 229 229 reg = <0x0 0x2130000 0x0 0x400>; 230 230 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 231 231 clocks = <&k3_clks 140 1>; 232 - power-domains = <&k3_pds 140>; 232 + power-domains = <&k3_pds 140 TI_SCI_PD_EXCLUSIVE>; 233 233 #address-cells = <1>; 234 234 #size-cells = <0>; 235 235 }; ··· 239 239 reg = <0x0 0x2140000 0x0 0x400>; 240 240 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 241 241 clocks = <&k3_clks 141 1>; 242 - power-domains = <&k3_pds 141>; 242 + power-domains = <&k3_pds 141 TI_SCI_PD_EXCLUSIVE>; 243 243 #address-cells = <1>; 244 244 #size-cells = <0>; 245 245 }; ··· 247 247 sdhci0: sdhci@4f80000 { 248 248 compatible = "ti,am654-sdhci-5.1"; 249 249 reg = <0x0 0x4f80000 0x0 0x260>, <0x0 0x4f90000 0x0 0x134>; 250 - power-domains = <&k3_pds 47>; 250 + power-domains = <&k3_pds 47 TI_SCI_PD_EXCLUSIVE>; 251 251 clocks = <&k3_clks 47 0>, <&k3_clks 47 1>; 252 252 clock-names = "clk_ahb", "clk_xin"; 253 253 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>; ··· 306 306 ranges = <0x0 0x0 0x4000000 0x20000>; 307 307 interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; 308 308 dma-coherent; 309 - power-domains = <&k3_pds 151>; 309 + power-domains = <&k3_pds 151 TI_SCI_PD_EXCLUSIVE>; 310 310 assigned-clocks = <&k3_clks 151 2>, <&k3_clks 151 7>; 311 311 assigned-clock-parents = <&k3_clks 151 4>, /* set REF_CLK to 20MHz i.e. PER0_PLL/48 */ 312 312 <&k3_clks 151 9>; /* set PIPE3_TXB_CLK to CLK_12M_RC/256 (for HS only) */ ··· 345 345 ranges = <0x0 0x0 0x4020000 0x20000>; 346 346 interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; 347 347 dma-coherent; 348 - power-domains = <&k3_pds 152>; 348 + power-domains = <&k3_pds 152 TI_SCI_PD_EXCLUSIVE>; 349 349 assigned-clocks = <&k3_clks 152 2>; 350 350 assigned-clock-parents = <&k3_clks 152 4>; /* set REF_CLK to 20MHz i.e. PER0_PLL/48 */ 351 351 ··· 413 413 ti,sci-rm-range-vint = <0x0>; 414 414 ti,sci-rm-range-global-event = <0x1>; 415 415 }; 416 + 417 + hwspinlock: spinlock@30e00000 { 418 + compatible = "ti,am654-hwspinlock"; 419 + reg = <0x00 0x30e00000 0x00 0x1000>; 420 + #hwlock-cells = <1>; 421 + }; 416 422 }; 417 423 418 424 main_gpio0: main_gpio0@600000 { ··· 457 451 compatible = "ti,am654-pcie-rc"; 458 452 reg = <0x0 0x5500000 0x0 0x1000>, <0x0 0x5501000 0x0 0x1000>, <0x0 0x10000000 0x0 0x2000>, <0x0 0x5506000 0x0 0x1000>; 459 453 reg-names = "app", "dbics", "config", "atu"; 460 - power-domains = <&k3_pds 120>; 454 + power-domains = <&k3_pds 120 TI_SCI_PD_EXCLUSIVE>; 461 455 #address-cells = <3>; 462 456 #size-cells = <2>; 463 457 ranges = <0x81000000 0 0 0x0 0x10020000 0 0x00010000 ··· 476 470 compatible = "ti,am654-pcie-ep"; 477 471 reg = <0x0 0x5500000 0x0 0x1000>, <0x0 0x5501000 0x0 0x1000>, <0x0 0x10000000 0x0 0x8000000>, <0x0 0x5506000 0x0 0x1000>; 478 472 reg-names = "app", "dbics", "addr_space", "atu"; 479 - power-domains = <&k3_pds 120>; 473 + power-domains = <&k3_pds 120 TI_SCI_PD_EXCLUSIVE>; 480 474 ti,syscon-pcie-mode = <&pcie0_mode>; 481 475 num-ib-windows = <16>; 482 476 num-ob-windows = <16>; ··· 489 483 compatible = "ti,am654-pcie-rc"; 490 484 reg = <0x0 0x5600000 0x0 0x1000>, <0x0 0x5601000 0x0 0x1000>, <0x0 0x18000000 0x0 0x2000>, <0x0 0x5606000 0x0 0x1000>; 491 485 reg-names = "app", "dbics", "config", "atu"; 492 - power-domains = <&k3_pds 121>; 486 + power-domains = <&k3_pds 121 TI_SCI_PD_EXCLUSIVE>; 493 487 #address-cells = <3>; 494 488 #size-cells = <2>; 495 489 ranges = <0x81000000 0 0 0x0 0x18020000 0 0x00010000 ··· 508 502 compatible = "ti,am654-pcie-ep"; 509 503 reg = <0x0 0x5600000 0x0 0x1000>, <0x0 0x5601000 0x0 0x1000>, <0x0 0x18000000 0x0 0x4000000>, <0x0 0x5606000 0x0 0x1000>; 510 504 reg-names = "app", "dbics", "addr_space", "atu"; 511 - power-domains = <&k3_pds 121>; 505 + power-domains = <&k3_pds 121 TI_SCI_PD_EXCLUSIVE>; 512 506 ti,syscon-pcie-mode = <&pcie1_mode>; 513 507 num-ib-windows = <16>; 514 508 num-ob-windows = <16>;
+5 -5
arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi
··· 14 14 interrupts = <GIC_SPI 565 IRQ_TYPE_LEVEL_HIGH>; 15 15 clock-frequency = <96000000>; 16 16 current-speed = <115200>; 17 - power-domains = <&k3_pds 149>; 17 + power-domains = <&k3_pds 149 TI_SCI_PD_EXCLUSIVE>; 18 18 }; 19 19 20 20 mcu_ram: sram@41c00000 { ··· 33 33 #size-cells = <0>; 34 34 clock-names = "fck"; 35 35 clocks = <&k3_clks 114 1>; 36 - power-domains = <&k3_pds 114>; 36 + power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>; 37 37 }; 38 38 39 39 mcu_spi0: spi@40300000 { ··· 41 41 reg = <0x0 0x40300000 0x0 0x400>; 42 42 interrupts = <GIC_SPI 560 IRQ_TYPE_LEVEL_HIGH>; 43 43 clocks = <&k3_clks 142 1>; 44 - power-domains = <&k3_pds 142>; 44 + power-domains = <&k3_pds 142 TI_SCI_PD_EXCLUSIVE>; 45 45 #address-cells = <1>; 46 46 #size-cells = <0>; 47 47 }; ··· 51 51 reg = <0x0 0x40310000 0x0 0x400>; 52 52 interrupts = <GIC_SPI 561 IRQ_TYPE_LEVEL_HIGH>; 53 53 clocks = <&k3_clks 143 1>; 54 - power-domains = <&k3_pds 143>; 54 + power-domains = <&k3_pds 143 TI_SCI_PD_EXCLUSIVE>; 55 55 #address-cells = <1>; 56 56 #size-cells = <0>; 57 57 }; ··· 61 61 reg = <0x0 0x40320000 0x0 0x400>; 62 62 interrupts = <GIC_SPI 562 IRQ_TYPE_LEVEL_HIGH>; 63 63 clocks = <&k3_clks 144 1>; 64 - power-domains = <&k3_pds 144>; 64 + power-domains = <&k3_pds 144 TI_SCI_PD_EXCLUSIVE>; 65 65 #address-cells = <1>; 66 66 #size-cells = <0>; 67 67 };
+3 -3
arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi
··· 20 20 21 21 k3_pds: power-controller { 22 22 compatible = "ti,sci-pm-domain"; 23 - #power-domain-cells = <1>; 23 + #power-domain-cells = <2>; 24 24 }; 25 25 26 26 k3_clks: clocks { ··· 50 50 interrupts = <GIC_SPI 697 IRQ_TYPE_LEVEL_HIGH>; 51 51 clock-frequency = <48000000>; 52 52 current-speed = <115200>; 53 - power-domains = <&k3_pds 150>; 53 + power-domains = <&k3_pds 150 TI_SCI_PD_EXCLUSIVE>; 54 54 }; 55 55 56 56 wkup_i2c0: i2c@42120000 { ··· 61 61 #size-cells = <0>; 62 62 clock-names = "fck"; 63 63 clocks = <&k3_clks 115 1>; 64 - power-domains = <&k3_pds 115>; 64 + power-domains = <&k3_pds 115 TI_SCI_PD_EXCLUSIVE>; 65 65 }; 66 66 67 67 intr_wkup_gpio: interrupt-controller2 {
+1
arch/arm64/boot/dts/ti/k3-am65.dtsi
··· 9 9 #include <dt-bindings/interrupt-controller/irq.h> 10 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 11 #include <dt-bindings/pinctrl/k3.h> 12 + #include <dt-bindings/soc/ti,sci_pm_domain.h> 12 13 13 14 / { 14 15 model = "Texas Instruments K3 AM654 SoC";
+1
arch/arm64/boot/dts/ti/k3-am654-base-board.dts
··· 151 151 &main_uart0 { 152 152 pinctrl-names = "default"; 153 153 pinctrl-0 = <&main_uart0_pins_default>; 154 + power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>; 154 155 }; 155 156 156 157 &wkup_i2c0 {
+69
arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
··· 6 6 /dts-v1/; 7 7 8 8 #include "k3-j721e-som-p0.dtsi" 9 + #include <dt-bindings/gpio/gpio.h> 10 + #include <dt-bindings/input/input.h> 9 11 10 12 / { 11 13 chosen { 12 14 stdout-path = "serial2:115200n8"; 13 15 bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000"; 14 16 }; 17 + 18 + gpio_keys: gpio-keys { 19 + compatible = "gpio-keys"; 20 + autorepeat; 21 + pinctrl-names = "default"; 22 + pinctrl-0 = <&sw10_button_pins_default &sw11_button_pins_default>; 23 + 24 + sw10: sw10 { 25 + label = "GPIO Key USER1"; 26 + linux,code = <BTN_0>; 27 + gpios = <&main_gpio0 0 GPIO_ACTIVE_LOW>; 28 + }; 29 + 30 + sw11: sw11 { 31 + label = "GPIO Key USER2"; 32 + linux,code = <BTN_1>; 33 + gpios = <&wkup_gpio0 7 GPIO_ACTIVE_LOW>; 34 + }; 35 + }; 36 + }; 37 + 38 + &main_pmx0 { 39 + sw10_button_pins_default: sw10_button_pins_default { 40 + pinctrl-single,pins = < 41 + J721E_IOPAD(0x0, PIN_INPUT, 7) /* (AC18) EXTINTn.GPIO0_0 */ 42 + >; 43 + }; 44 + }; 45 + 46 + &wkup_pmx0 { 47 + sw11_button_pins_default: sw11_button_pins_default { 48 + pinctrl-single,pins = < 49 + J721E_WKUP_IOPAD(0xcc, PIN_INPUT, 7) /* (G28) WKUP_GPIO0_7 */ 50 + >; 51 + }; 15 52 }; 16 53 17 54 &wkup_uart0 { 18 55 /* Wakeup UART is used by System firmware */ 19 56 status = "disabled"; 57 + }; 58 + 59 + &main_uart0 { 60 + power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>; 20 61 }; 21 62 22 63 &main_uart3 { ··· 87 46 88 47 &main_uart9 { 89 48 /* UART not brought out */ 49 + status = "disabled"; 50 + }; 51 + 52 + &main_gpio2 { 53 + status = "disabled"; 54 + }; 55 + 56 + &main_gpio3 { 57 + status = "disabled"; 58 + }; 59 + 60 + &main_gpio4 { 61 + status = "disabled"; 62 + }; 63 + 64 + &main_gpio5 { 65 + status = "disabled"; 66 + }; 67 + 68 + &main_gpio6 { 69 + status = "disabled"; 70 + }; 71 + 72 + &main_gpio7 { 73 + status = "disabled"; 74 + }; 75 + 76 + &wkup_gpio1 { 90 77 status = "disabled"; 91 78 };
+149 -11
arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
··· 31 31 /* vcpumntirq: virtual CPU interface maintenance interrupt */ 32 32 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; 33 33 34 - gic_its: gic-its@18200000 { 34 + gic_its: gic-its@1820000 { 35 35 compatible = "arm,gic-v3-its"; 36 36 reg = <0x00 0x01820000 0x00 0x10000>; 37 37 socionext,synquacer-pre-its = <0x1000000 0x400000>; ··· 89 89 ti,sci-rm-range-vint = <0xa>; 90 90 ti,sci-rm-range-global-event = <0xd>; 91 91 }; 92 + 93 + hwspinlock: spinlock@30e00000 { 94 + compatible = "ti,am654-hwspinlock"; 95 + reg = <0x00 0x30e00000 0x00 0x1000>; 96 + #hwlock-cells = <1>; 97 + }; 92 98 }; 93 99 94 100 secure_proxy_main: mailbox@32c00000 { ··· 125 119 interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>; 126 120 clock-frequency = <48000000>; 127 121 current-speed = <115200>; 128 - power-domains = <&k3_pds 146>; 122 + power-domains = <&k3_pds 146 TI_SCI_PD_EXCLUSIVE>; 129 123 clocks = <&k3_clks 146 0>; 130 124 clock-names = "fclk"; 131 125 }; ··· 138 132 interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>; 139 133 clock-frequency = <48000000>; 140 134 current-speed = <115200>; 141 - power-domains = <&k3_pds 278>; 135 + power-domains = <&k3_pds 278 TI_SCI_PD_EXCLUSIVE>; 142 136 clocks = <&k3_clks 278 0>; 143 137 clock-names = "fclk"; 144 138 }; ··· 151 145 interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>; 152 146 clock-frequency = <48000000>; 153 147 current-speed = <115200>; 154 - power-domains = <&k3_pds 279>; 148 + power-domains = <&k3_pds 279 TI_SCI_PD_EXCLUSIVE>; 155 149 clocks = <&k3_clks 279 0>; 156 150 clock-names = "fclk"; 157 151 }; ··· 164 158 interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>; 165 159 clock-frequency = <48000000>; 166 160 current-speed = <115200>; 167 - power-domains = <&k3_pds 280>; 161 + power-domains = <&k3_pds 280 TI_SCI_PD_EXCLUSIVE>; 168 162 clocks = <&k3_clks 280 0>; 169 163 clock-names = "fclk"; 170 164 }; ··· 177 171 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>; 178 172 clock-frequency = <48000000>; 179 173 current-speed = <115200>; 180 - power-domains = <&k3_pds 281>; 174 + power-domains = <&k3_pds 281 TI_SCI_PD_EXCLUSIVE>; 181 175 clocks = <&k3_clks 281 0>; 182 176 clock-names = "fclk"; 183 177 }; ··· 190 184 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; 191 185 clock-frequency = <48000000>; 192 186 current-speed = <115200>; 193 - power-domains = <&k3_pds 282>; 187 + power-domains = <&k3_pds 282 TI_SCI_PD_EXCLUSIVE>; 194 188 clocks = <&k3_clks 282 0>; 195 189 clock-names = "fclk"; 196 190 }; ··· 203 197 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>; 204 198 clock-frequency = <48000000>; 205 199 current-speed = <115200>; 206 - power-domains = <&k3_pds 283>; 200 + power-domains = <&k3_pds 283 TI_SCI_PD_EXCLUSIVE>; 207 201 clocks = <&k3_clks 283 0>; 208 202 clock-names = "fclk"; 209 203 }; ··· 216 210 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>; 217 211 clock-frequency = <48000000>; 218 212 current-speed = <115200>; 219 - power-domains = <&k3_pds 284>; 213 + power-domains = <&k3_pds 284 TI_SCI_PD_EXCLUSIVE>; 220 214 clocks = <&k3_clks 284 0>; 221 215 clock-names = "fclk"; 222 216 }; ··· 229 223 interrupts = <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>; 230 224 clock-frequency = <48000000>; 231 225 current-speed = <115200>; 232 - power-domains = <&k3_pds 285>; 226 + power-domains = <&k3_pds 285 TI_SCI_PD_EXCLUSIVE>; 233 227 clocks = <&k3_clks 285 0>; 234 228 clock-names = "fclk"; 235 229 }; ··· 242 236 interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>; 243 237 clock-frequency = <48000000>; 244 238 current-speed = <115200>; 245 - power-domains = <&k3_pds 286>; 239 + power-domains = <&k3_pds 286 TI_SCI_PD_EXCLUSIVE>; 246 240 clocks = <&k3_clks 286 0>; 247 241 clock-names = "fclk"; 242 + }; 243 + 244 + main_gpio0: gpio@600000 { 245 + compatible = "ti,j721e-gpio", "ti,keystone-gpio"; 246 + reg = <0x0 0x00600000 0x0 0x100>; 247 + gpio-controller; 248 + #gpio-cells = <2>; 249 + interrupt-parent = <&main_gpio_intr>; 250 + interrupts = <105 0>, <105 1>, <105 2>, <105 3>, 251 + <105 4>, <105 5>, <105 6>, <105 7>; 252 + interrupt-controller; 253 + #interrupt-cells = <2>; 254 + ti,ngpio = <128>; 255 + ti,davinci-gpio-unbanked = <0>; 256 + power-domains = <&k3_pds 105 TI_SCI_PD_EXCLUSIVE>; 257 + clocks = <&k3_clks 105 0>; 258 + clock-names = "gpio"; 259 + }; 260 + 261 + main_gpio1: gpio@601000 { 262 + compatible = "ti,j721e-gpio", "ti,keystone-gpio"; 263 + reg = <0x0 0x00601000 0x0 0x100>; 264 + gpio-controller; 265 + #gpio-cells = <2>; 266 + interrupt-parent = <&main_gpio_intr>; 267 + interrupts = <106 0>, <106 1>, <106 2>; 268 + interrupt-controller; 269 + #interrupt-cells = <2>; 270 + ti,ngpio = <36>; 271 + ti,davinci-gpio-unbanked = <0>; 272 + power-domains = <&k3_pds 106 TI_SCI_PD_EXCLUSIVE>; 273 + clocks = <&k3_clks 106 0>; 274 + clock-names = "gpio"; 275 + }; 276 + 277 + main_gpio2: gpio@610000 { 278 + compatible = "ti,j721e-gpio", "ti,keystone-gpio"; 279 + reg = <0x0 0x00610000 0x0 0x100>; 280 + gpio-controller; 281 + #gpio-cells = <2>; 282 + interrupt-parent = <&main_gpio_intr>; 283 + interrupts = <107 0>, <107 1>, <107 2>, <107 3>, 284 + <107 4>, <107 5>, <107 6>, <107 7>; 285 + interrupt-controller; 286 + #interrupt-cells = <2>; 287 + ti,ngpio = <128>; 288 + ti,davinci-gpio-unbanked = <0>; 289 + power-domains = <&k3_pds 107 TI_SCI_PD_EXCLUSIVE>; 290 + clocks = <&k3_clks 107 0>; 291 + clock-names = "gpio"; 292 + }; 293 + 294 + main_gpio3: gpio@611000 { 295 + compatible = "ti,j721e-gpio", "ti,keystone-gpio"; 296 + reg = <0x0 0x00611000 0x0 0x100>; 297 + gpio-controller; 298 + #gpio-cells = <2>; 299 + interrupt-parent = <&main_gpio_intr>; 300 + interrupts = <108 0>, <108 1>, <108 2>; 301 + interrupt-controller; 302 + #interrupt-cells = <2>; 303 + ti,ngpio = <36>; 304 + ti,davinci-gpio-unbanked = <0>; 305 + power-domains = <&k3_pds 108 TI_SCI_PD_EXCLUSIVE>; 306 + clocks = <&k3_clks 108 0>; 307 + clock-names = "gpio"; 308 + }; 309 + 310 + main_gpio4: gpio@620000 { 311 + compatible = "ti,j721e-gpio", "ti,keystone-gpio"; 312 + reg = <0x0 0x00620000 0x0 0x100>; 313 + gpio-controller; 314 + #gpio-cells = <2>; 315 + interrupt-parent = <&main_gpio_intr>; 316 + interrupts = <109 0>, <109 1>, <109 2>, <109 3>, 317 + <109 4>, <109 5>, <109 6>, <109 7>; 318 + interrupt-controller; 319 + #interrupt-cells = <2>; 320 + ti,ngpio = <128>; 321 + ti,davinci-gpio-unbanked = <0>; 322 + power-domains = <&k3_pds 109 TI_SCI_PD_EXCLUSIVE>; 323 + clocks = <&k3_clks 109 0>; 324 + clock-names = "gpio"; 325 + }; 326 + 327 + main_gpio5: gpio@621000 { 328 + compatible = "ti,j721e-gpio", "ti,keystone-gpio"; 329 + reg = <0x0 0x00621000 0x0 0x100>; 330 + gpio-controller; 331 + #gpio-cells = <2>; 332 + interrupt-parent = <&main_gpio_intr>; 333 + interrupts = <110 0>, <110 1>, <110 2>; 334 + interrupt-controller; 335 + #interrupt-cells = <2>; 336 + ti,ngpio = <36>; 337 + ti,davinci-gpio-unbanked = <0>; 338 + power-domains = <&k3_pds 110 TI_SCI_PD_EXCLUSIVE>; 339 + clocks = <&k3_clks 110 0>; 340 + clock-names = "gpio"; 341 + }; 342 + 343 + main_gpio6: gpio@630000 { 344 + compatible = "ti,j721e-gpio", "ti,keystone-gpio"; 345 + reg = <0x0 0x00630000 0x0 0x100>; 346 + gpio-controller; 347 + #gpio-cells = <2>; 348 + interrupt-parent = <&main_gpio_intr>; 349 + interrupts = <111 0>, <111 1>, <111 2>, <111 3>, 350 + <111 4>, <111 5>, <111 6>, <111 7>; 351 + interrupt-controller; 352 + #interrupt-cells = <2>; 353 + ti,ngpio = <128>; 354 + ti,davinci-gpio-unbanked = <0>; 355 + power-domains = <&k3_pds 111 TI_SCI_PD_EXCLUSIVE>; 356 + clocks = <&k3_clks 111 0>; 357 + clock-names = "gpio"; 358 + }; 359 + 360 + main_gpio7: gpio@631000 { 361 + compatible = "ti,j721e-gpio", "ti,keystone-gpio"; 362 + reg = <0x0 0x00631000 0x0 0x100>; 363 + gpio-controller; 364 + #gpio-cells = <2>; 365 + interrupt-parent = <&main_gpio_intr>; 366 + interrupts = <112 0>, <112 1>, <112 2>; 367 + interrupt-controller; 368 + #interrupt-cells = <2>; 369 + ti,ngpio = <36>; 370 + ti,davinci-gpio-unbanked = <0>; 371 + power-domains = <&k3_pds 112 TI_SCI_PD_EXCLUSIVE>; 372 + clocks = <&k3_clks 112 0>; 373 + clock-names = "gpio"; 248 374 }; 249 375 };
+37 -3
arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
··· 20 20 21 21 k3_pds: power-controller { 22 22 compatible = "ti,sci-pm-domain"; 23 - #power-domain-cells = <1>; 23 + #power-domain-cells = <2>; 24 24 }; 25 25 26 26 k3_clks: clocks { ··· 59 59 interrupts = <GIC_SPI 897 IRQ_TYPE_LEVEL_HIGH>; 60 60 clock-frequency = <48000000>; 61 61 current-speed = <115200>; 62 - power-domains = <&k3_pds 287>; 62 + power-domains = <&k3_pds 287 TI_SCI_PD_EXCLUSIVE>; 63 63 clocks = <&k3_clks 287 0>; 64 64 clock-names = "fclk"; 65 65 }; ··· 72 72 interrupts = <GIC_SPI 846 IRQ_TYPE_LEVEL_HIGH>; 73 73 clock-frequency = <96000000>; 74 74 current-speed = <115200>; 75 - power-domains = <&k3_pds 149>; 75 + power-domains = <&k3_pds 149 TI_SCI_PD_EXCLUSIVE>; 76 76 clocks = <&k3_clks 149 0>; 77 77 clock-names = "fclk"; 78 78 }; ··· 86 86 ti,sci = <&dmsc>; 87 87 ti,sci-dst-id = <14>; 88 88 ti,sci-rm-range-girq = <0x5>; 89 + }; 90 + 91 + wkup_gpio0: gpio@42110000 { 92 + compatible = "ti,j721e-gpio", "ti,keystone-gpio"; 93 + reg = <0x0 0x42110000 0x0 0x100>; 94 + gpio-controller; 95 + #gpio-cells = <2>; 96 + interrupt-parent = <&wkup_gpio_intr>; 97 + interrupts = <113 0>, <113 1>, <113 2>, 98 + <113 3>, <113 4>, <113 5>; 99 + interrupt-controller; 100 + #interrupt-cells = <2>; 101 + ti,ngpio = <84>; 102 + ti,davinci-gpio-unbanked = <0>; 103 + power-domains = <&k3_pds 113 TI_SCI_PD_EXCLUSIVE>; 104 + clocks = <&k3_clks 113 0>; 105 + clock-names = "gpio"; 106 + }; 107 + 108 + wkup_gpio1: gpio@42100000 { 109 + compatible = "ti,j721e-gpio", "ti,keystone-gpio"; 110 + reg = <0x0 0x42100000 0x0 0x100>; 111 + gpio-controller; 112 + #gpio-cells = <2>; 113 + interrupt-parent = <&wkup_gpio_intr>; 114 + interrupts = <114 0>, <114 1>, <114 2>, 115 + <114 3>, <114 4>, <114 5>; 116 + interrupt-controller; 117 + #interrupt-cells = <2>; 118 + ti,ngpio = <84>; 119 + ti,davinci-gpio-unbanked = <0>; 120 + power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>; 121 + clocks = <&k3_clks 114 0>; 122 + clock-names = "gpio"; 89 123 }; 90 124 };
+1
arch/arm64/boot/dts/ti/k3-j721e.dtsi
··· 8 8 #include <dt-bindings/interrupt-controller/irq.h> 9 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 10 #include <dt-bindings/pinctrl/k3.h> 11 + #include <dt-bindings/soc/ti,sci_pm_domain.h> 11 12 12 13 / { 13 14 model = "Texas Instruments K3 J721E SoC";
+43 -2
drivers/firmware/ti_sci.c
··· 635 635 636 636 /** 637 637 * ti_sci_cmd_get_device() - command to request for device managed by TISCI 638 + * that can be shared with other hosts. 638 639 * @handle: Pointer to TISCI handle as retrieved by *ti_sci_get_handle 639 640 * @id: Device Identifier 640 641 * ··· 643 642 * usage count by balancing get_device with put_device. No refcounting is 644 643 * managed by driver for that purpose. 645 644 * 646 - * NOTE: The request is for exclusive access for the processor. 647 - * 648 645 * Return: 0 if all went fine, else return appropriate error. 649 646 */ 650 647 static int ti_sci_cmd_get_device(const struct ti_sci_handle *handle, u32 id) 648 + { 649 + return ti_sci_set_device_state(handle, id, 0, 650 + MSG_DEVICE_SW_STATE_ON); 651 + } 652 + 653 + /** 654 + * ti_sci_cmd_get_device_exclusive() - command to request for device managed by 655 + * TISCI that is exclusively owned by the 656 + * requesting host. 657 + * @handle: Pointer to TISCI handle as retrieved by *ti_sci_get_handle 658 + * @id: Device Identifier 659 + * 660 + * Request for the device - NOTE: the client MUST maintain integrity of 661 + * usage count by balancing get_device with put_device. No refcounting is 662 + * managed by driver for that purpose. 663 + * 664 + * Return: 0 if all went fine, else return appropriate error. 665 + */ 666 + static int ti_sci_cmd_get_device_exclusive(const struct ti_sci_handle *handle, 667 + u32 id) 651 668 { 652 669 return ti_sci_set_device_state(handle, id, 653 670 MSG_FLAG_DEVICE_EXCLUSIVE, ··· 684 665 * Return: 0 if all went fine, else return appropriate error. 685 666 */ 686 667 static int ti_sci_cmd_idle_device(const struct ti_sci_handle *handle, u32 id) 668 + { 669 + return ti_sci_set_device_state(handle, id, 0, 670 + MSG_DEVICE_SW_STATE_RETENTION); 671 + } 672 + 673 + /** 674 + * ti_sci_cmd_idle_device_exclusive() - Command to idle a device managed by 675 + * TISCI that is exclusively owned by 676 + * requesting host. 677 + * @handle: Pointer to TISCI handle as retrieved by *ti_sci_get_handle 678 + * @id: Device Identifier 679 + * 680 + * Request for the device - NOTE: the client MUST maintain integrity of 681 + * usage count by balancing get_device with put_device. No refcounting is 682 + * managed by driver for that purpose. 683 + * 684 + * Return: 0 if all went fine, else return appropriate error. 685 + */ 686 + static int ti_sci_cmd_idle_device_exclusive(const struct ti_sci_handle *handle, 687 + u32 id) 687 688 { 688 689 return ti_sci_set_device_state(handle, id, 689 690 MSG_FLAG_DEVICE_EXCLUSIVE, ··· 2933 2894 core_ops->reboot_device = ti_sci_cmd_core_reboot; 2934 2895 2935 2896 dops->get_device = ti_sci_cmd_get_device; 2897 + dops->get_device_exclusive = ti_sci_cmd_get_device_exclusive; 2936 2898 dops->idle_device = ti_sci_cmd_idle_device; 2899 + dops->idle_device_exclusive = ti_sci_cmd_idle_device_exclusive; 2937 2900 dops->put_device = ti_sci_cmd_put_device; 2938 2901 2939 2902 dops->is_valid = ti_sci_cmd_dev_is_valid;
+21 -2
drivers/soc/ti/ti_sci_pm_domains.c
··· 15 15 #include <linux/pm_domain.h> 16 16 #include <linux/slab.h> 17 17 #include <linux/soc/ti/ti_sci_protocol.h> 18 + #include <dt-bindings/soc/ti,sci_pm_domain.h> 18 19 19 20 /** 20 21 * struct ti_sci_genpd_dev_data: holds data needed for every device attached 21 22 * to this genpd 22 23 * @idx: index of the device that identifies it with the system 23 24 * control processor. 25 + * @exclusive: Permissions for exclusive request or shared request of the 26 + * device. 24 27 */ 25 28 struct ti_sci_genpd_dev_data { 26 29 int idx; 30 + u8 exclusive; 27 31 }; 28 32 29 33 /** ··· 59 55 return sci_dev_data->idx; 60 56 } 61 57 58 + static u8 is_ti_sci_dev_exclusive(struct device *dev) 59 + { 60 + struct generic_pm_domain_data *genpd_data = dev_gpd_data(dev); 61 + struct ti_sci_genpd_dev_data *sci_dev_data = genpd_data->data; 62 + 63 + return sci_dev_data->exclusive; 64 + } 65 + 62 66 /** 63 67 * ti_sci_dev_to_sci_handle(): get pointer to ti_sci_handle 64 68 * @dev: pointer to device associated with this genpd ··· 91 79 const struct ti_sci_handle *ti_sci = ti_sci_dev_to_sci_handle(dev); 92 80 int idx = ti_sci_dev_id(dev); 93 81 94 - return ti_sci->ops.dev_ops.get_device(ti_sci, idx); 82 + if (is_ti_sci_dev_exclusive(dev)) 83 + return ti_sci->ops.dev_ops.get_device_exclusive(ti_sci, idx); 84 + else 85 + return ti_sci->ops.dev_ops.get_device(ti_sci, idx); 95 86 } 96 87 97 88 /** ··· 125 110 if (ret < 0) 126 111 return ret; 127 112 128 - if (pd_args.args_count != 1) 113 + if (pd_args.args_count != 1 && pd_args.args_count != 2) 129 114 return -EINVAL; 130 115 131 116 idx = pd_args.args[0]; ··· 143 128 return -ENOMEM; 144 129 145 130 sci_dev_data->idx = idx; 131 + /* Enable the exclusive permissions by default */ 132 + sci_dev_data->exclusive = TI_SCI_PD_EXCLUSIVE; 133 + if (pd_args.args_count == 2) 134 + sci_dev_data->exclusive = pd_args.args[1] & 0x1; 146 135 147 136 genpd_data = dev_gpd_data(dev); 148 137 genpd_data->data = sci_dev_data;
+3
include/dt-bindings/pinctrl/k3.h
··· 32 32 #define AM65X_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) 33 33 #define AM65X_WKUP_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) 34 34 35 + #define J721E_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) 36 + #define J721E_WKUP_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) 37 + 35 38 #endif
+9
include/dt-bindings/soc/ti,sci_pm_domain.h
··· 1 + /* SPDX-License-Identifier: GPL-2.0 */ 2 + 3 + #ifndef __DT_BINDINGS_TI_SCI_PM_DOMAIN_H 4 + #define __DT_BINDINGS_TI_SCI_PM_DOMAIN_H 5 + 6 + #define TI_SCI_PD_EXCLUSIVE 1 7 + #define TI_SCI_PD_SHARED 0 8 + 9 + #endif /* __DT_BINDINGS_TI_SCI_PM_DOMAIN_H */
+3
include/linux/soc/ti/ti_sci_protocol.h
··· 97 97 */ 98 98 struct ti_sci_dev_ops { 99 99 int (*get_device)(const struct ti_sci_handle *handle, u32 id); 100 + int (*get_device_exclusive)(const struct ti_sci_handle *handle, u32 id); 100 101 int (*idle_device)(const struct ti_sci_handle *handle, u32 id); 102 + int (*idle_device_exclusive)(const struct ti_sci_handle *handle, 103 + u32 id); 101 104 int (*put_device)(const struct ti_sci_handle *handle, u32 id); 102 105 int (*is_valid)(const struct ti_sci_handle *handle, u32 id); 103 106 int (*get_context_loss_count)(const struct ti_sci_handle *handle,