Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'stm32-dt-for-v4.21-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt

STM32 DT updates for v4.21, round 1

Highlights:
----------

-MPU STM32MP157 platform update:
-Declare DMAs for timers
-Add sleep support for CAN
-Split CAN RAM mapping between the 2 FDCAN instances
-Add support of thermal sensor (DTS)

* tag 'stm32-dt-for-v4.21-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
ARM: dts: stm32: add thermal sensor support on STM32MP157c
ARM: dts: stm32: add can1 sleep pins muxing on stm32mp157c-ev1 board
ARM: dts: stm32: add can1 sleep pins muxing
ARM: dts: stm32: change CAN RAM mapping on stm32mp157c
ARM: dts: stm32: don't use timers dmas on stm32mp157c-ev1
ARM: dts: stm32: don't use timers dmas on stm32mp157c-ed1
ARM: dts: stm32: Add dmas to timer on stm32mp157c

Signed-off-by: Arnd Bergmann <arnd@arndb.de>

+114 -3
+7
arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
··· 246 246 }; 247 247 }; 248 248 249 + m_can1_sleep_pins_a: m_can1-sleep@0 { 250 + pins { 251 + pinmux = <STM32_PINMUX('H', 13, ANALOG)>, /* CAN1_TX */ 252 + <STM32_PINMUX('I', 9, ANALOG)>; /* CAN1_RX */ 253 + }; 254 + }; 255 + 249 256 pwm2_pins_a: pwm2-0 { 250 257 pins { 251 258 pinmux = <STM32_PINMUX('A', 3, AF1)>; /* TIM2_CH4 */
+3
arch/arm/boot/dts/stm32mp157c-ed1.dts
··· 72 72 73 73 &timers6 { 74 74 status = "okay"; 75 + /* spare dmas for other usage */ 76 + /delete-property/dmas; 77 + /delete-property/dma-names; 75 78 timer@5 { 76 79 status = "okay"; 77 80 };
+9 -1
arch/arm/boot/dts/stm32mp157c-ev1.dts
··· 124 124 }; 125 125 126 126 &m_can1 { 127 - pinctrl-names = "default"; 127 + pinctrl-names = "default", "sleep"; 128 128 pinctrl-0 = <&m_can1_pins_a>; 129 + pinctrl-1 = <&m_can1_sleep_pins_a>; 129 130 status = "okay"; 130 131 }; 131 132 ··· 162 161 }; 163 162 164 163 &timers2 { 164 + /* spare dmas for other usage (un-delete to enable pwm capture) */ 165 + /delete-property/dmas; 166 + /delete-property/dma-names; 165 167 status = "disabled"; 166 168 pwm { 167 169 pinctrl-0 = <&pwm2_pins_a>; ··· 177 173 }; 178 174 179 175 &timers8 { 176 + /delete-property/dmas; 177 + /delete-property/dma-names; 180 178 status = "disabled"; 181 179 pwm { 182 180 pinctrl-0 = <&pwm8_pins_a>; ··· 191 185 }; 192 186 193 187 &timers12 { 188 + /delete-property/dmas; 189 + /delete-property/dma-names; 194 190 status = "disabled"; 195 191 pwm { 196 192 pinctrl-0 = <&pwm12_pins_a>;
+95 -2
arch/arm/boot/dts/stm32mp157c.dtsi
··· 84 84 }; 85 85 }; 86 86 87 + thermal-zones { 88 + cpu_thermal: cpu-thermal { 89 + polling-delay-passive = <0>; 90 + polling-delay = <0>; 91 + thermal-sensors = <&dts>; 92 + 93 + trips { 94 + cpu_alert1: cpu-alert1 { 95 + temperature = <85000>; 96 + hysteresis = <0>; 97 + type = "passive"; 98 + }; 99 + 100 + cpu-crit { 101 + temperature = <120000>; 102 + hysteresis = <0>; 103 + type = "critical"; 104 + }; 105 + }; 106 + 107 + cooling-maps { 108 + }; 109 + }; 110 + }; 111 + 87 112 soc { 88 113 compatible = "simple-bus"; 89 114 #address-cells = <1>; ··· 123 98 reg = <0x40000000 0x400>; 124 99 clocks = <&rcc TIM2_K>; 125 100 clock-names = "int"; 101 + dmas = <&dmamux1 18 0x400 0x1>, 102 + <&dmamux1 19 0x400 0x1>, 103 + <&dmamux1 20 0x400 0x1>, 104 + <&dmamux1 21 0x400 0x1>, 105 + <&dmamux1 22 0x400 0x1>; 106 + dma-names = "ch1", "ch2", "ch3", "ch4", "up"; 126 107 status = "disabled"; 127 108 128 109 pwm { ··· 150 119 reg = <0x40001000 0x400>; 151 120 clocks = <&rcc TIM3_K>; 152 121 clock-names = "int"; 122 + dmas = <&dmamux1 23 0x400 0x1>, 123 + <&dmamux1 24 0x400 0x1>, 124 + <&dmamux1 25 0x400 0x1>, 125 + <&dmamux1 26 0x400 0x1>, 126 + <&dmamux1 27 0x400 0x1>, 127 + <&dmamux1 28 0x400 0x1>; 128 + dma-names = "ch1", "ch2", "ch3", "ch4", "up", "trig"; 153 129 status = "disabled"; 154 130 155 131 pwm { ··· 178 140 reg = <0x40002000 0x400>; 179 141 clocks = <&rcc TIM4_K>; 180 142 clock-names = "int"; 143 + dmas = <&dmamux1 29 0x400 0x1>, 144 + <&dmamux1 30 0x400 0x1>, 145 + <&dmamux1 31 0x400 0x1>, 146 + <&dmamux1 32 0x400 0x1>; 147 + dma-names = "ch1", "ch2", "ch3", "ch4"; 181 148 status = "disabled"; 182 149 183 150 pwm { ··· 204 161 reg = <0x40003000 0x400>; 205 162 clocks = <&rcc TIM5_K>; 206 163 clock-names = "int"; 164 + dmas = <&dmamux1 55 0x400 0x1>, 165 + <&dmamux1 56 0x400 0x1>, 166 + <&dmamux1 57 0x400 0x1>, 167 + <&dmamux1 58 0x400 0x1>, 168 + <&dmamux1 59 0x400 0x1>, 169 + <&dmamux1 60 0x400 0x1>; 170 + dma-names = "ch1", "ch2", "ch3", "ch4", "up", "trig"; 207 171 status = "disabled"; 208 172 209 173 pwm { ··· 232 182 reg = <0x40004000 0x400>; 233 183 clocks = <&rcc TIM6_K>; 234 184 clock-names = "int"; 185 + dmas = <&dmamux1 69 0x400 0x1>; 186 + dma-names = "up"; 235 187 status = "disabled"; 236 188 237 189 timer@5 { ··· 250 198 reg = <0x40005000 0x400>; 251 199 clocks = <&rcc TIM7_K>; 252 200 clock-names = "int"; 201 + dmas = <&dmamux1 70 0x400 0x1>; 202 + dma-names = "up"; 253 203 status = "disabled"; 254 204 255 205 timer@6 { ··· 519 465 reg = <0x44000000 0x400>; 520 466 clocks = <&rcc TIM1_K>; 521 467 clock-names = "int"; 468 + dmas = <&dmamux1 11 0x400 0x1>, 469 + <&dmamux1 12 0x400 0x1>, 470 + <&dmamux1 13 0x400 0x1>, 471 + <&dmamux1 14 0x400 0x1>, 472 + <&dmamux1 15 0x400 0x1>, 473 + <&dmamux1 16 0x400 0x1>, 474 + <&dmamux1 17 0x400 0x1>; 475 + dma-names = "ch1", "ch2", "ch3", "ch4", 476 + "up", "trig", "com"; 522 477 status = "disabled"; 523 478 524 479 pwm { ··· 549 486 reg = <0x44001000 0x400>; 550 487 clocks = <&rcc TIM8_K>; 551 488 clock-names = "int"; 489 + dmas = <&dmamux1 47 0x400 0x1>, 490 + <&dmamux1 48 0x400 0x1>, 491 + <&dmamux1 49 0x400 0x1>, 492 + <&dmamux1 50 0x400 0x1>, 493 + <&dmamux1 51 0x400 0x1>, 494 + <&dmamux1 52 0x400 0x1>, 495 + <&dmamux1 53 0x400 0x1>; 496 + dma-names = "ch1", "ch2", "ch3", "ch4", 497 + "up", "trig", "com"; 552 498 status = "disabled"; 553 499 554 500 pwm { ··· 615 543 reg = <0x44006000 0x400>; 616 544 clocks = <&rcc TIM15_K>; 617 545 clock-names = "int"; 546 + dmas = <&dmamux1 105 0x400 0x1>, 547 + <&dmamux1 106 0x400 0x1>, 548 + <&dmamux1 107 0x400 0x1>, 549 + <&dmamux1 108 0x400 0x1>; 550 + dma-names = "ch1", "up", "trig", "com"; 618 551 status = "disabled"; 619 552 620 553 pwm { ··· 641 564 reg = <0x44007000 0x400>; 642 565 clocks = <&rcc TIM16_K>; 643 566 clock-names = "int"; 567 + dmas = <&dmamux1 109 0x400 0x1>, 568 + <&dmamux1 110 0x400 0x1>; 569 + dma-names = "ch1", "up"; 644 570 status = "disabled"; 645 571 646 572 pwm { ··· 664 584 reg = <0x44008000 0x400>; 665 585 clocks = <&rcc TIM17_K>; 666 586 clock-names = "int"; 587 + dmas = <&dmamux1 111 0x400 0x1>, 588 + <&dmamux1 112 0x400 0x1>; 589 + dma-names = "ch1", "up"; 667 590 status = "disabled"; 668 591 669 592 pwm { ··· 767 684 768 685 m_can1: can@4400e000 { 769 686 compatible = "bosch,m_can"; 770 - reg = <0x4400e000 0x400>, <0x44011000 0x2800>; 687 + reg = <0x4400e000 0x400>, <0x44011000 0x1400>; 771 688 reg-names = "m_can", "message_ram"; 772 689 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>, 773 690 <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 774 691 interrupt-names = "int0", "int1"; 775 692 clocks = <&rcc CK_HSE>, <&rcc FDCAN_K>; 776 693 clock-names = "hclk", "cclk"; 777 - bosch,mram-cfg = <0x0 0 0 32 0 0 2 2>; 694 + bosch,mram-cfg = <0x1400 0 0 32 0 0 2 2>; 778 695 status = "disabled"; 779 696 }; 780 697 ··· 988 905 regulator-min-microvolt = <1500000>; 989 906 regulator-max-microvolt = <2500000>; 990 907 clocks = <&rcc VREF>; 908 + status = "disabled"; 909 + }; 910 + 911 + dts: thermal@50028000 { 912 + compatible = "st,stm32-thermal"; 913 + reg = <0x50028000 0x100>; 914 + interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>; 915 + clocks = <&rcc TMPSENS>; 916 + clock-names = "pclk"; 917 + #thermal-sensor-cells = <0>; 991 918 status = "disabled"; 992 919 }; 993 920