Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

drm/amdgpu: expand to add multiple trap event irq id

Sienna_cichlid has four sdma instances, but other chips don't.
So we need expand to add multiple trap event irq id in sdma
v5.2.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Huang Rui and committed by
Alex Deucher
65655471 c8466cc0

+41 -26
+41 -26
drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c
··· 1165 1165 return 0; 1166 1166 } 1167 1167 1168 + static unsigned sdma_v5_2_seq_to_irq_id(int seq_num) 1169 + { 1170 + switch (seq_num) { 1171 + case 0: 1172 + return SOC15_IH_CLIENTID_SDMA0; 1173 + case 1: 1174 + return SOC15_IH_CLIENTID_SDMA1; 1175 + case 2: 1176 + return SOC15_IH_CLIENTID_SDMA2; 1177 + case 3: 1178 + return SOC15_IH_CLIENTID_SDMA3_Sienna_Cichlid; 1179 + default: 1180 + break; 1181 + } 1182 + return -EINVAL; 1183 + } 1184 + 1185 + static unsigned sdma_v5_2_seq_to_trap_id(int seq_num) 1186 + { 1187 + switch (seq_num) { 1188 + case 0: 1189 + return SDMA0_5_0__SRCID__SDMA_TRAP; 1190 + case 1: 1191 + return SDMA1_5_0__SRCID__SDMA_TRAP; 1192 + case 2: 1193 + return SDMA2_5_0__SRCID__SDMA_TRAP; 1194 + case 3: 1195 + return SDMA3_5_0__SRCID__SDMA_TRAP; 1196 + default: 1197 + break; 1198 + } 1199 + return -EINVAL; 1200 + } 1201 + 1168 1202 static int sdma_v5_2_sw_init(void *handle) 1169 1203 { 1170 1204 struct amdgpu_ring *ring; ··· 1206 1172 struct amdgpu_device *adev = (struct amdgpu_device *)handle; 1207 1173 1208 1174 /* SDMA trap event */ 1209 - r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_SDMA0, 1210 - SDMA0_5_0__SRCID__SDMA_TRAP, 1211 - &adev->sdma.trap_irq); 1212 - if (r) 1213 - return r; 1214 - 1215 - /* SDMA trap event */ 1216 - r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_SDMA1, 1217 - SDMA1_5_0__SRCID__SDMA_TRAP, 1218 - &adev->sdma.trap_irq); 1219 - if (r) 1220 - return r; 1221 - 1222 - /* SDMA trap event */ 1223 - r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_SDMA2, 1224 - SDMA2_5_0__SRCID__SDMA_TRAP, 1225 - &adev->sdma.trap_irq); 1226 - if (r) 1227 - return r; 1228 - 1229 - /* SDMA trap event */ 1230 - r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_SDMA3_Sienna_Cichlid, 1231 - SDMA3_5_0__SRCID__SDMA_TRAP, 1232 - &adev->sdma.trap_irq); 1233 - if (r) 1234 - return r; 1175 + for (i = 0; i < adev->sdma.num_instances; i++) { 1176 + r = amdgpu_irq_add_id(adev, sdma_v5_2_seq_to_irq_id(i), 1177 + sdma_v5_2_seq_to_trap_id(i), 1178 + &adev->sdma.trap_irq); 1179 + if (r) 1180 + return r; 1181 + } 1235 1182 1236 1183 r = sdma_v5_2_init_microcode(adev); 1237 1184 if (r) {