Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge branch 'regulator-5.3' into regulator-next

+2552 -675
+2 -1
Documentation/devicetree/bindings/regulator/arizona-regulator.txt
··· 5 5 6 6 This document lists regulator specific bindings, see the primary binding 7 7 document: 8 - ../mfd/arizona.txt 8 + For Wolfson Microelectronic Arizona codecs: ../mfd/arizona.txt 9 + For Cirrus Logic Madera codecs: ../mfd/madera.txt 9 10 10 11 Optional properties: 11 12 - wlf,ldoena : GPIO specifier for the GPIO controlling LDOENA
+4 -1
Documentation/devicetree/bindings/regulator/fixed-regulator.yaml
··· 12 12 13 13 description: 14 14 Any property defined as part of the core regulator binding, defined in 15 - regulator.txt, can also be used. However a fixed voltage regulator is 15 + regulator.yaml, can also be used. However a fixed voltage regulator is 16 16 expected to have the regulator-min-microvolt and regulator-max-microvolt 17 17 to be the same. 18 + 19 + allOf: 20 + - $ref: "regulator.yaml#" 18 21 19 22 properties: 20 23 compatible:
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Documentation/devicetree/bindings/regulator/gpio-regulator.txt
··· 1 - GPIO controlled regulators 2 - 3 - Required properties: 4 - - compatible : Must be "regulator-gpio". 5 - - regulator-name : Defined in regulator.txt as optional, but required 6 - here. 7 - - gpios : Array of one or more GPIO pins used to select the 8 - regulator voltage/current listed in "states". 9 - - states : Selection of available voltages/currents provided by 10 - this regulator and matching GPIO configurations to 11 - achieve them. If there are no states in the "states" 12 - array, use a fixed regulator instead. 13 - 14 - Optional properties: 15 - - enable-gpios : GPIO used to enable/disable the regulator. 16 - Warning, the GPIO phandle flags are ignored and the 17 - GPIO polarity is controlled solely by the presence 18 - of "enable-active-high" DT property. This is due to 19 - compatibility with old DTs. 20 - - enable-active-high : Polarity of "enable-gpio" GPIO is active HIGH. 21 - Default is active LOW. 22 - - gpios-states : On operating systems, that don't support reading back 23 - gpio values in output mode (most notably linux), this 24 - array provides the state of GPIO pins set when 25 - requesting them from the gpio controller. Systems, 26 - that are capable of preserving state when requesting 27 - the lines, are free to ignore this property. 28 - 0: LOW, 1: HIGH. Default is LOW if nothing else 29 - is specified. 30 - - startup-delay-us : Startup time in microseconds. 31 - - regulator-type : Specifies what is being regulated, must be either 32 - "voltage" or "current", defaults to voltage. 33 - 34 - Any property defined as part of the core regulator binding defined in 35 - regulator.txt can also be used. 36 - 37 - Example: 38 - 39 - mmciv: gpio-regulator { 40 - compatible = "regulator-gpio"; 41 - 42 - regulator-name = "mmci-gpio-supply"; 43 - regulator-min-microvolt = <1800000>; 44 - regulator-max-microvolt = <2600000>; 45 - regulator-boot-on; 46 - 47 - enable-gpios = <&gpio0 23 0x4>; 48 - gpios = <&gpio0 24 0x4 49 - &gpio0 25 0x4>; 50 - states = <1800000 0x3 51 - 2200000 0x2 52 - 2600000 0x1 53 - 2900000 0x0>; 54 - 55 - startup-delay-us = <100000>; 56 - enable-active-high; 57 - };
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Documentation/devicetree/bindings/regulator/gpio-regulator.yaml
··· 1 + # SPDX-License-Identifier: GPL-2.0 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/regulator/gpio-regulator.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: GPIO controlled regulators 8 + 9 + maintainers: 10 + - Liam Girdwood <lgirdwood@gmail.com> 11 + - Mark Brown <broonie@kernel.org> 12 + 13 + description: 14 + Any property defined as part of the core regulator binding, defined in 15 + regulator.txt, can also be used. 16 + 17 + allOf: 18 + - $ref: "regulator.yaml#" 19 + 20 + properties: 21 + compatible: 22 + const: regulator-gpio 23 + 24 + regulator-name: true 25 + 26 + enable-gpios: 27 + description: GPIO to use to enable/disable the regulator. 28 + Warning, the GPIO phandle flags are ignored and the GPIO polarity is 29 + controlled solely by the presence of "enable-active-high" DT property. 30 + This is due to compatibility with old DTs. 31 + maxItems: 1 32 + 33 + gpios: 34 + description: Array of one or more GPIO pins used to select the regulator 35 + voltage/current listed in "states". 36 + minItems: 1 37 + maxItems: 8 # Should be enough... 38 + 39 + gpios-states: 40 + description: | 41 + On operating systems, that don't support reading back gpio values in 42 + output mode (most notably linux), this array provides the state of GPIO 43 + pins set when requesting them from the gpio controller. Systems, that are 44 + capable of preserving state when requesting the lines, are free to ignore 45 + this property. 46 + 0: LOW 47 + 1: HIGH 48 + Default is LOW if nothing else is specified. 49 + allOf: 50 + - $ref: /schemas/types.yaml#/definitions/uint32-array 51 + - maxItems: 8 52 + items: 53 + enum: [ 0, 1 ] 54 + default: 0 55 + 56 + states: 57 + description: Selection of available voltages/currents provided by this 58 + regulator and matching GPIO configurations to achieve them. If there are 59 + no states in the "states" array, use a fixed regulator instead. 60 + allOf: 61 + - $ref: /schemas/types.yaml#/definitions/uint32-matrix 62 + - maxItems: 8 63 + items: 64 + items: 65 + - description: Voltage in microvolts 66 + - description: GPIO group state value 67 + 68 + startup-delay-us: 69 + description: startup time in microseconds 70 + 71 + enable-active-high: 72 + description: Polarity of "enable-gpio" GPIO is active HIGH. Default is 73 + active LOW. 74 + type: boolean 75 + 76 + gpio-open-drain: 77 + description: 78 + GPIO is open drain type. If this property is missing then default 79 + assumption is false. 80 + type: boolean 81 + 82 + regulator-type: 83 + description: Specifies what is being regulated. 84 + allOf: 85 + - $ref: /schemas/types.yaml#/definitions/string 86 + - enum: 87 + - voltage 88 + - current 89 + default: voltage 90 + 91 + required: 92 + - compatible 93 + - regulator-name 94 + - gpios 95 + - states 96 + 97 + examples: 98 + - | 99 + gpio-regulator { 100 + compatible = "regulator-gpio"; 101 + 102 + regulator-name = "mmci-gpio-supply"; 103 + regulator-min-microvolt = <1800000>; 104 + regulator-max-microvolt = <2600000>; 105 + regulator-boot-on; 106 + 107 + enable-gpios = <&gpio0 23 0x4>; 108 + gpios = <&gpio0 24 0x4 109 + &gpio0 25 0x4>; 110 + states = <1800000 0x3>, 111 + <2200000 0x2>, 112 + <2600000 0x1>, 113 + <2900000 0x0>; 114 + 115 + startup-delay-us = <100000>; 116 + enable-active-high; 117 + }; 118 + ...
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Documentation/devicetree/bindings/regulator/max8660.txt
··· 1 - Maxim MAX8660 voltage regulator 2 - 3 - Required properties: 4 - - compatible: must be one of "maxim,max8660", "maxim,max8661" 5 - - reg: I2C slave address, usually 0x34 6 - - any required generic properties defined in regulator.txt 7 - 8 - Example: 9 - 10 - i2c_master { 11 - max8660@34 { 12 - compatible = "maxim,max8660"; 13 - reg = <0x34>; 14 - 15 - regulators { 16 - regulator@0 { 17 - regulator-compatible= "V3(DCDC)"; 18 - regulator-min-microvolt = <725000>; 19 - regulator-max-microvolt = <1800000>; 20 - }; 21 - 22 - regulator@1 { 23 - regulator-compatible= "V4(DCDC)"; 24 - regulator-min-microvolt = <725000>; 25 - regulator-max-microvolt = <1800000>; 26 - }; 27 - 28 - regulator@2 { 29 - regulator-compatible= "V5(LDO)"; 30 - regulator-min-microvolt = <1700000>; 31 - regulator-max-microvolt = <2000000>; 32 - }; 33 - 34 - regulator@3 { 35 - regulator-compatible= "V6(LDO)"; 36 - regulator-min-microvolt = <1800000>; 37 - regulator-max-microvolt = <3300000>; 38 - }; 39 - 40 - regulator@4 { 41 - regulator-compatible= "V7(LDO)"; 42 - regulator-min-microvolt = <1800000>; 43 - regulator-max-microvolt = <3300000>; 44 - }; 45 - }; 46 - }; 47 - };
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Documentation/devicetree/bindings/regulator/max8660.yaml
··· 1 + # SPDX-License-Identifier: GPL-2.0 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/regulator/max8660.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: Maxim MAX8660 voltage regulator 8 + 9 + maintainers: 10 + - Daniel Mack <zonque@gmail.com> 11 + 12 + properties: 13 + $nodename: 14 + pattern: "pmic@[0-9a-f]{1,2}" 15 + compatible: 16 + enum: 17 + - maxim,max8660 18 + - maxim,max8661 19 + 20 + reg: 21 + maxItems: 1 22 + 23 + regulators: 24 + type: object 25 + 26 + patternProperties: 27 + "regulator-.+": 28 + $ref: "regulator.yaml#" 29 + 30 + additionalProperties: false 31 + 32 + additionalProperties: false 33 + 34 + examples: 35 + - | 36 + i2c { 37 + #address-cells = <1>; 38 + #size-cells = <0>; 39 + 40 + pmic@34 { 41 + compatible = "maxim,max8660"; 42 + reg = <0x34>; 43 + 44 + regulators { 45 + regulator-V3 { 46 + regulator-compatible= "V3(DCDC)"; 47 + regulator-min-microvolt = <725000>; 48 + regulator-max-microvolt = <1800000>; 49 + }; 50 + 51 + regulator-V4 { 52 + regulator-compatible= "V4(DCDC)"; 53 + regulator-min-microvolt = <725000>; 54 + regulator-max-microvolt = <1800000>; 55 + }; 56 + 57 + regulator-V5 { 58 + regulator-compatible= "V5(LDO)"; 59 + regulator-min-microvolt = <1700000>; 60 + regulator-max-microvolt = <2000000>; 61 + }; 62 + 63 + regulator-V6 { 64 + regulator-compatible= "V6(LDO)"; 65 + regulator-min-microvolt = <1800000>; 66 + regulator-max-microvolt = <3300000>; 67 + }; 68 + 69 + regulator-V7 { 70 + regulator-compatible= "V7(LDO)"; 71 + regulator-min-microvolt = <1800000>; 72 + regulator-max-microvolt = <3300000>; 73 + }; 74 + }; 75 + }; 76 + }; 77 + ...
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Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.txt
··· 4 4 Usage: required 5 5 Value type: <string> 6 6 Definition: must be one of: 7 + "qcom,pm8005-regulators" 7 8 "qcom,pm8841-regulators" 8 9 "qcom,pm8916-regulators" 9 10 "qcom,pm8941-regulators" 10 11 "qcom,pm8994-regulators" 11 12 "qcom,pmi8994-regulators" 13 + "qcom,pms405-regulators" 12 14 13 15 - interrupts: 14 16 Usage: optional ··· 112 110 Definition: Reference to regulator supplying the input pin, as 113 111 described in the data sheet. 114 112 113 + - vdd_l1_l2-supply: 114 + - vdd_l3_l8-supply: 115 + - vdd_l4-supply: 116 + - vdd_l5_l6-supply: 117 + - vdd_l10_l11_l12_l13-supply: 118 + - vdd_l7-supply: 119 + - vdd_l9-supply: 120 + - vdd_s1-supply: 121 + - vdd_s2-supply: 122 + - vdd_s3-supply: 123 + - vdd_s4-supply: 124 + - vdd_s5-supply 125 + Usage: optional (pms405 only) 126 + Value type: <phandle> 127 + Definition: Reference to regulator supplying the input pin, as 128 + described in the data sheet. 129 + 115 130 - qcom,saw-reg: 116 131 Usage: optional 117 132 Value type: <phandle> ··· 138 119 The regulator node houses sub-nodes for each regulator within the device. Each 139 120 sub-node is identified using the node's name, with valid values listed for each 140 121 of the PMICs below. 122 + 123 + pm8005: 124 + s1, s2, s3, s4 141 125 142 126 pm8841: 143 127 s1, s2, s3, s4, s5, s6, s7, s8
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Documentation/devicetree/bindings/regulator/regulator.txt
··· 1 - Voltage/Current Regulators 2 - 3 - Optional properties: 4 - - regulator-name: A string used as a descriptive name for regulator outputs 5 - - regulator-min-microvolt: smallest voltage consumers may set 6 - - regulator-max-microvolt: largest voltage consumers may set 7 - - regulator-microvolt-offset: Offset applied to voltages to compensate for voltage drops 8 - - regulator-min-microamp: smallest current consumers may set 9 - - regulator-max-microamp: largest current consumers may set 10 - - regulator-input-current-limit-microamp: maximum input current regulator allows 11 - - regulator-always-on: boolean, regulator should never be disabled 12 - - regulator-boot-on: bootloader/firmware enabled regulator 13 - - regulator-allow-bypass: allow the regulator to go into bypass mode 14 - - regulator-allow-set-load: allow the regulator performance level to be configured 15 - - <name>-supply: phandle to the parent supply/regulator node 16 - - regulator-ramp-delay: ramp delay for regulator(in uV/us) 17 - For hardware which supports disabling ramp rate, it should be explicitly 18 - initialised to zero (regulator-ramp-delay = <0>) for disabling ramp delay. 19 - - regulator-enable-ramp-delay: The time taken, in microseconds, for the supply 20 - rail to reach the target voltage, plus/minus whatever tolerance the board 21 - design requires. This property describes the total system ramp time 22 - required due to the combination of internal ramping of the regulator itself, 23 - and board design issues such as trace capacitance and load on the supply. 24 - - regulator-settling-time-us: Settling time, in microseconds, for voltage 25 - change if regulator have the constant time for any level voltage change. 26 - This is useful when regulator have exponential voltage change. 27 - - regulator-settling-time-up-us: Settling time, in microseconds, for voltage 28 - increase if the regulator needs a constant time to settle after voltage 29 - increases of any level. This is useful for regulators with exponential 30 - voltage changes. 31 - - regulator-settling-time-down-us: Settling time, in microseconds, for voltage 32 - decrease if the regulator needs a constant time to settle after voltage 33 - decreases of any level. This is useful for regulators with exponential 34 - voltage changes. 35 - - regulator-soft-start: Enable soft start so that voltage ramps slowly 36 - - regulator-state-standby sub-root node for Standby mode 37 - : equivalent with standby Linux sleep state, which provides energy savings 38 - with a relatively quick transition back time. 39 - - regulator-state-mem sub-root node for Suspend-to-RAM mode 40 - : suspend to memory, the device goes to sleep, but all data stored in memory, 41 - only some external interrupt can wake the device. 42 - - regulator-state-disk sub-root node for Suspend-to-DISK mode 43 - : suspend to disk, this state operates similarly to Suspend-to-RAM, 44 - but includes a final step of writing memory contents to disk. 45 - - regulator-state-[mem/disk/standby] node has following common properties: 46 - - regulator-on-in-suspend: regulator should be on in suspend state. 47 - - regulator-off-in-suspend: regulator should be off in suspend state. 48 - - regulator-suspend-min-microvolt: minimum voltage may be set in 49 - suspend state. 50 - - regulator-suspend-max-microvolt: maximum voltage may be set in 51 - suspend state. 52 - - regulator-suspend-microvolt: the default voltage which regulator 53 - would be set in suspend. This property is now deprecated, instead 54 - setting voltage for suspend mode via the API which regulator 55 - driver provides is recommended. 56 - - regulator-changeable-in-suspend: whether the default voltage and 57 - the regulator on/off in suspend can be changed in runtime. 58 - - regulator-mode: operating mode in the given suspend state. 59 - The set of possible operating modes depends on the capabilities of 60 - every hardware so the valid modes are documented on each regulator 61 - device tree binding document. 62 - - regulator-initial-mode: initial operating mode. The set of possible operating 63 - modes depends on the capabilities of every hardware so each device binding 64 - documentation explains which values the regulator supports. 65 - - regulator-allowed-modes: list of operating modes that software is allowed to 66 - configure for the regulator at run-time. Elements may be specified in any 67 - order. The set of possible operating modes depends on the capabilities of 68 - every hardware so each device binding document explains which values the 69 - regulator supports. 70 - - regulator-system-load: Load in uA present on regulator that is not captured by 71 - any consumer request. 72 - - regulator-pull-down: Enable pull down resistor when the regulator is disabled. 73 - - regulator-over-current-protection: Enable over current protection. 74 - - regulator-active-discharge: tristate, enable/disable active discharge of 75 - regulators. The values are: 76 - 0: Disable active discharge. 77 - 1: Enable active discharge. 78 - Absence of this property will leave configuration to default. 79 - - regulator-coupled-with: Regulators with which the regulator 80 - is coupled. The linkage is 2-way - all coupled regulators should be linked 81 - with each other. A regulator should not be coupled with its supplier. 82 - - regulator-coupled-max-spread: Array of maximum spread between voltages of 83 - coupled regulators in microvolts, each value in the array relates to the 84 - corresponding couple specified by the regulator-coupled-with property. 85 - - regulator-max-step-microvolt: Maximum difference between current and target 86 - voltages that can be changed safely in a single step. 87 - 88 - Deprecated properties: 89 - - regulator-compatible: If a regulator chip contains multiple 90 - regulators, and if the chip's binding contains a child node that 91 - describes each regulator, then this property indicates which regulator 92 - this child node is intended to configure. If this property is missing, 93 - the node's name will be used instead. 94 - 95 - Example: 96 - 97 - xyzreg: regulator@0 { 98 - regulator-min-microvolt = <1000000>; 99 - regulator-max-microvolt = <2500000>; 100 - regulator-always-on; 101 - vin-supply = <&vin>; 102 - 103 - regulator-state-mem { 104 - regulator-on-in-suspend; 105 - }; 106 - }; 107 - 108 - Regulator Consumers: 109 - Consumer nodes can reference one or more of its supplies/ 110 - regulators using the below bindings. 111 - 112 - - <name>-supply: phandle to the regulator node 113 - 114 - These are the same bindings that a regulator in the above 115 - example used to reference its own supply, in which case 116 - its just seen as a special case of a regulator being a 117 - consumer itself. 118 - 119 - Example of a consumer device node (mmc) referencing two 120 - regulators (twl_reg1 and twl_reg2), 121 - 122 - twl_reg1: regulator@0 { 123 - ... 124 - ... 125 - ... 126 - }; 127 - 128 - twl_reg2: regulator@1 { 129 - ... 130 - ... 131 - ... 132 - }; 133 - 134 - mmc: mmc@0 { 135 - ... 136 - ... 137 - vmmc-supply = <&twl_reg1>; 138 - vmmcaux-supply = <&twl_reg2>; 139 - }; 1 + This file has moved to regulator.yaml.
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Documentation/devicetree/bindings/regulator/regulator.yaml
··· 1 + # SPDX-License-Identifier: GPL-2.0 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/regulator/regulator.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: Voltage/Current Regulators 8 + 9 + maintainers: 10 + - Liam Girdwood <lgirdwood@gmail.com> 11 + - Mark Brown <broonie@kernel.org> 12 + 13 + properties: 14 + regulator-name: 15 + description: A string used as a descriptive name for regulator outputs 16 + $ref: "/schemas/types.yaml#/definitions/string" 17 + 18 + regulator-min-microvolt: 19 + description: smallest voltage consumers may set 20 + 21 + regulator-max-microvolt: 22 + description: largest voltage consumers may set 23 + 24 + regulator-microvolt-offset: 25 + description: Offset applied to voltages to compensate for voltage drops 26 + 27 + regulator-min-microamp: 28 + description: smallest current consumers may set 29 + 30 + regulator-max-microamp: 31 + description: largest current consumers may set 32 + 33 + regulator-input-current-limit-microamp: 34 + description: maximum input current regulator allows 35 + 36 + regulator-always-on: 37 + description: boolean, regulator should never be disabled 38 + type: boolean 39 + 40 + regulator-boot-on: 41 + description: bootloader/firmware enabled regulator 42 + type: boolean 43 + 44 + regulator-allow-bypass: 45 + description: allow the regulator to go into bypass mode 46 + type: boolean 47 + 48 + regulator-allow-set-load: 49 + description: allow the regulator performance level to be configured 50 + type: boolean 51 + 52 + regulator-ramp-delay: 53 + description: ramp delay for regulator(in uV/us) For hardware which supports 54 + disabling ramp rate, it should be explicitly initialised to zero (regulator-ramp-delay 55 + = <0>) for disabling ramp delay. 56 + $ref: "/schemas/types.yaml#/definitions/uint32" 57 + 58 + regulator-enable-ramp-delay: 59 + description: The time taken, in microseconds, for the supply rail to 60 + reach the target voltage, plus/minus whatever tolerance the board 61 + design requires. This property describes the total system ramp time 62 + required due to the combination of internal ramping of the regulator 63 + itself, and board design issues such as trace capacitance and load 64 + on the supply. 65 + $ref: "/schemas/types.yaml#/definitions/uint32" 66 + 67 + regulator-settling-time-us: 68 + description: Settling time, in microseconds, for voltage change if regulator 69 + have the constant time for any level voltage change. This is useful 70 + when regulator have exponential voltage change. 71 + 72 + regulator-settling-time-up-us: 73 + description: Settling time, in microseconds, for voltage increase if 74 + the regulator needs a constant time to settle after voltage increases 75 + of any level. This is useful for regulators with exponential voltage 76 + changes. 77 + 78 + regulator-settling-time-down-us: 79 + description: Settling time, in microseconds, for voltage decrease if 80 + the regulator needs a constant time to settle after voltage decreases 81 + of any level. This is useful for regulators with exponential voltage 82 + changes. 83 + 84 + regulator-soft-start: 85 + description: Enable soft start so that voltage ramps slowly 86 + type: boolean 87 + 88 + regulator-initial-mode: 89 + description: initial operating mode. The set of possible operating modes 90 + depends on the capabilities of every hardware so each device binding 91 + documentation explains which values the regulator supports. 92 + $ref: "/schemas/types.yaml#/definitions/uint32" 93 + 94 + regulator-allowed-modes: 95 + description: list of operating modes that software is allowed to configure 96 + for the regulator at run-time. Elements may be specified in any order. 97 + The set of possible operating modes depends on the capabilities of 98 + every hardware so each device binding document explains which values 99 + the regulator supports. 100 + $ref: "/schemas/types.yaml#/definitions/uint32-array" 101 + 102 + regulator-system-load: 103 + description: Load in uA present on regulator that is not captured by 104 + any consumer request. 105 + $ref: "/schemas/types.yaml#/definitions/uint32" 106 + 107 + regulator-pull-down: 108 + description: Enable pull down resistor when the regulator is disabled. 109 + type: boolean 110 + 111 + regulator-over-current-protection: 112 + description: Enable over current protection. 113 + type: boolean 114 + 115 + regulator-active-discharge: 116 + description: | 117 + tristate, enable/disable active discharge of regulators. The values are: 118 + 0: Disable active discharge. 119 + 1: Enable active discharge. 120 + Absence of this property will leave configuration to default. 121 + allOf: 122 + - $ref: "/schemas/types.yaml#/definitions/uint32" 123 + - enum: [ 0, 1 ] 124 + 125 + regulator-coupled-with: 126 + description: Regulators with which the regulator is coupled. The linkage 127 + is 2-way - all coupled regulators should be linked with each other. 128 + A regulator should not be coupled with its supplier. 129 + $ref: "/schemas/types.yaml#/definitions/phandle-array" 130 + 131 + regulator-coupled-max-spread: 132 + description: Array of maximum spread between voltages of coupled regulators 133 + in microvolts, each value in the array relates to the corresponding 134 + couple specified by the regulator-coupled-with property. 135 + $ref: "/schemas/types.yaml#/definitions/uint32" 136 + 137 + regulator-max-step-microvolt: 138 + description: Maximum difference between current and target voltages 139 + that can be changed safely in a single step. 140 + 141 + patternProperties: 142 + ".*-supply$": 143 + description: Input supply phandle(s) for this node 144 + 145 + regulator-state-(standby|mem|disk): 146 + type: object 147 + description: 148 + sub-nodes for regulator state in Standby, Suspend-to-RAM, and 149 + Suspend-to-DISK modes. Equivalent with standby, mem, and disk Linux 150 + sleep states. 151 + 152 + properties: 153 + regulator-on-in-suspend: 154 + description: regulator should be on in suspend state. 155 + type: boolean 156 + 157 + regulator-off-in-suspend: 158 + description: regulator should be off in suspend state. 159 + type: boolean 160 + 161 + regulator-suspend-min-microvolt: 162 + description: minimum voltage may be set in suspend state. 163 + 164 + regulator-suspend-max-microvolt: 165 + description: maximum voltage may be set in suspend state. 166 + 167 + regulator-suspend-microvolt: 168 + description: the default voltage which regulator would be set in 169 + suspend. This property is now deprecated, instead setting voltage 170 + for suspend mode via the API which regulator driver provides is 171 + recommended. 172 + 173 + regulator-changeable-in-suspend: 174 + description: whether the default voltage and the regulator on/off 175 + in suspend can be changed in runtime. 176 + type: boolean 177 + 178 + regulator-mode: 179 + description: operating mode in the given suspend state. The set 180 + of possible operating modes depends on the capabilities of every 181 + hardware so the valid modes are documented on each regulator device 182 + tree binding document. 183 + $ref: "/schemas/types.yaml#/definitions/uint32" 184 + 185 + additionalProperties: false 186 + 187 + examples: 188 + - | 189 + xyzreg: regulator@0 { 190 + regulator-min-microvolt = <1000000>; 191 + regulator-max-microvolt = <2500000>; 192 + regulator-always-on; 193 + vin-supply = <&vin>; 194 + 195 + regulator-state-mem { 196 + regulator-on-in-suspend; 197 + }; 198 + }; 199 + 200 + ...
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Documentation/devicetree/bindings/regulator/slg51000.txt
··· 1 + * Dialog Semiconductor SLG51000 Voltage Regulator 2 + 3 + Required properties: 4 + - compatible : Should be "dlg,slg51000" for SLG51000 5 + - reg : Specifies the I2C slave address. 6 + - xxx-supply: Input voltage supply regulator for ldo3 to ldo7. 7 + These entries are required if regulators are enabled for a device. 8 + An absence of these properties can cause the regulator registration to fail. 9 + If some of input supply is powered through battery or always-on supply then 10 + also it is required to have these parameters with proper node handle of always 11 + on power supply. 12 + vin3-supply: Input supply for ldo3 13 + vin4-supply: Input supply for ldo4 14 + vin5-supply: Input supply for ldo5 15 + vin6-supply: Input supply for ldo6 16 + vin7-supply: Input supply for ldo7 17 + 18 + Optional properties: 19 + - interrupt-parent : Specifies the reference to the interrupt controller. 20 + - interrupts : IRQ line information. 21 + - dlg,cs-gpios : Specify a valid GPIO for chip select 22 + 23 + Sub-nodes: 24 + - regulators : This node defines the settings for the regulators. 25 + The content of the sub-node is defined by the standard binding 26 + for regulators; see regulator.txt. 27 + 28 + The SLG51000 regulators are bound using their names listed below: 29 + ldo1 30 + ldo2 31 + ldo3 32 + ldo4 33 + ldo5 34 + ldo6 35 + ldo7 36 + 37 + Optional properties for regulators: 38 + - enable-gpios : Specify a valid GPIO for platform control of the regulator. 39 + 40 + Example: 41 + pmic: slg51000@75 { 42 + compatible = "dlg,slg51000"; 43 + reg = <0x75>; 44 + 45 + regulators { 46 + ldo1 { 47 + regulator-name = "ldo1"; 48 + regulator-min-microvolt = <2400000>; 49 + regulator-max-microvolt = <3300000>; 50 + }; 51 + 52 + ldo2 { 53 + regulator-name = "ldo2"; 54 + regulator-min-microvolt = <2400000>; 55 + regulator-max-microvolt = <3300000>; 56 + }; 57 + 58 + ldo3 { 59 + regulator-name = "ldo3"; 60 + regulator-min-microvolt = <1200000>; 61 + regulator-max-microvolt = <3750000>; 62 + }; 63 + 64 + ldo4 { 65 + regulator-name = "ldo4"; 66 + regulator-min-microvolt = <1200000>; 67 + regulator-max-microvolt = <3750000>; 68 + }; 69 + 70 + ldo5 { 71 + regulator-name = "ldo5"; 72 + regulator-min-microvolt = <500000>; 73 + regulator-max-microvolt = <1200000>; 74 + }; 75 + 76 + ldo6 { 77 + regulator-name = "ldo6"; 78 + regulator-min-microvolt = <500000>; 79 + regulator-max-microvolt = <1200000>; 80 + }; 81 + 82 + ldo7 { 83 + regulator-name = "ldo7"; 84 + regulator-min-microvolt = <1200000>; 85 + regulator-max-microvolt = <3750000>; 86 + }; 87 + }; 88 + };
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Documentation/devicetree/bindings/regulator/st,stm32-booster.txt
··· 1 + STM32 BOOSTER - Booster for ADC analog input switches 2 + 3 + Some STM32 devices embed a 3.3V booster supplied by Vdda, that can be used 4 + to supply ADC analog input switches. 5 + 6 + Required properties: 7 + - compatible: Should be one of: 8 + "st,stm32h7-booster" 9 + "st,stm32mp1-booster" 10 + - st,syscfg: Phandle to system configuration controller. 11 + - vdda-supply: Phandle to the vdda input analog voltage. 12 + 13 + Example: 14 + booster: regulator-booster { 15 + compatible = "st,stm32mp1-booster"; 16 + st,syscfg = <&syscfg>; 17 + vdda-supply = <&vdda>; 18 + };
+2
MAINTAINERS
··· 4707 4707 F: Documentation/devicetree/bindings/input/da90??-onkey.txt 4708 4708 F: Documentation/devicetree/bindings/thermal/da90??-thermal.txt 4709 4709 F: Documentation/devicetree/bindings/regulator/da92*.txt 4710 + F: Documentation/devicetree/bindings/regulator/slg51000.txt 4710 4711 F: Documentation/devicetree/bindings/watchdog/da90??-wdt.txt 4711 4712 F: Documentation/devicetree/bindings/sound/da[79]*.txt 4712 4713 F: drivers/gpio/gpio-da90??.c ··· 4723 4722 F: drivers/power/supply/da91??-*.c 4724 4723 F: drivers/regulator/da903x.c 4725 4724 F: drivers/regulator/da9???-regulator.[ch] 4725 + F: drivers/regulator/slg51000-regulator.[ch] 4726 4726 F: drivers/thermal/da90??-thermal.c 4727 4727 F: drivers/rtc/rtc-da90??.c 4728 4728 F: drivers/video/backlight/da90??_bl.c
+20 -1
arch/arm/mach-s3c64xx/mach-crag6410.c
··· 15 15 #include <linux/io.h> 16 16 #include <linux/init.h> 17 17 #include <linux/gpio.h> 18 + #include <linux/gpio/machine.h> 18 19 #include <linux/leds.h> 19 20 #include <linux/delay.h> 20 21 #include <linux/mmc/host.h> ··· 399 398 /* VDDARM is controlled by DVS1 connected to GPK(0) */ 400 399 static struct wm831x_buckv_pdata vddarm_pdata = { 401 400 .dvs_control_src = 1, 402 - .dvs_gpio = S3C64XX_GPK(0), 403 401 }; 404 402 405 403 static struct regulator_consumer_supply vddarm_consumers[] = { ··· 594 594 }, 595 595 596 596 .touch = &touch_pdata, 597 + }; 598 + 599 + /* 600 + * VDDARM is eventually ending up as a regulator hanging on the MFD cell device 601 + * "wm831x-buckv.1" spawn from drivers/mfd/wm831x-core.c. 602 + * 603 + * From the note on the platform data we can see that this is clearly DVS1 604 + * and assigned as dcdc1 resource to the MFD core which sets .id of the cell 605 + * spawning the DVS1 platform device to 1, then the cell platform device 606 + * name is calculated from 10*instance + id resulting in the device name 607 + * "wm831x-buckv.11" 608 + */ 609 + static struct gpiod_lookup_table crag_pmic_gpiod_table = { 610 + .dev_id = "wm831x-buckv.11", 611 + .table = { 612 + GPIO_LOOKUP("GPIOK", 0, "dvs", GPIO_ACTIVE_HIGH), 613 + { }, 614 + }, 597 615 }; 598 616 599 617 static struct i2c_board_info i2c_devs0[] = { ··· 854 836 s3c_fb_set_platdata(&crag6410_lcd_pdata); 855 837 dwc2_hsotg_set_platdata(&crag6410_hsotg_pdata); 856 838 839 + gpiod_add_lookup_table(&crag_pmic_gpiod_table); 857 840 i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0)); 858 841 i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1)); 859 842
+17
arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi
··· 27 27 status = "okay"; 28 28 }; 29 29 30 + &pm8005_lsid1 { 31 + pm8005-regulators { 32 + compatible = "qcom,pm8005-regulators"; 33 + 34 + vdd_s1-supply = <&vph_pwr>; 35 + 36 + pm8005_s1: s1 { /* VDD_GFX supply */ 37 + regulator-min-microvolt = <524000>; 38 + regulator-max-microvolt = <1100000>; 39 + regulator-enable-ramp-delay = <500>; 40 + 41 + /* hack until we rig up the gpu consumer */ 42 + regulator-always-on; 43 + }; 44 + }; 45 + }; 46 + 30 47 &qusb2phy { 31 48 status = "okay"; 32 49
+1 -5
drivers/gpio/gpiolib.c
··· 4244 4244 * 4245 4245 * Returns: 4246 4246 * On successful request the GPIO pin is configured in accordance with 4247 - * provided @dflags. If the node does not have the requested GPIO 4248 - * property, NULL is returned. 4247 + * provided @dflags. 4249 4248 * 4250 4249 * In case of error an ERR_PTR() is returned. 4251 4250 */ ··· 4266 4267 index, &flags); 4267 4268 4268 4269 if (!desc || IS_ERR(desc)) { 4269 - /* If it is not there, just return NULL */ 4270 - if (PTR_ERR(desc) == -ENOENT) 4271 - return NULL; 4272 4270 return desc; 4273 4271 } 4274 4272
drivers/regulator/88pm800.c drivers/regulator/88pm800-regulator.c
+29 -8
drivers/regulator/Kconfig
··· 136 136 signal AB8500 PMIC 137 137 138 138 config REGULATOR_ARIZONA_LDO1 139 - tristate "Wolfson Arizona class devices LDO1" 140 - depends on MFD_ARIZONA 139 + tristate "Cirrus Madera and Wolfson Arizona class devices LDO1" 140 + depends on MFD_ARIZONA || MFD_MADERA 141 141 depends on SND_SOC 142 142 help 143 - Support for the LDO1 regulators found on Wolfson Arizona class 144 - devices. 143 + Support for the LDO1 regulators found on Cirrus Logic Madera codecs 144 + and Wolfson Microelectronic Arizona codecs. 145 145 146 146 config REGULATOR_ARIZONA_MICSUPP 147 - tristate "Wolfson Arizona class devices MICSUPP" 148 - depends on MFD_ARIZONA 147 + tristate "Cirrus Madera and Wolfson Arizona class devices MICSUPP" 148 + depends on MFD_ARIZONA || MFD_MADERA 149 149 depends on SND_SOC 150 150 help 151 - Support for the MICSUPP regulators found on Wolfson Arizona class 151 + Support for the MICSUPP regulators found on Cirrus Logic Madera codecs 152 + and Wolfson Microelectronic Arizona codecs 152 153 devices. 153 154 154 155 config REGULATOR_AS3711 ··· 259 258 260 259 config REGULATOR_DA9063 261 260 tristate "Dialog Semiconductor DA9063 regulators" 262 - depends on MFD_DA9063 261 + depends on MFD_DA9063 && OF 263 262 help 264 263 Say y here to support the BUCKs and LDOs regulators found on 265 264 DA9063 PMICs. ··· 829 828 830 829 This driver can also be built as a module. If so, the module 831 830 will be called sky81452-regulator. 831 + 832 + config REGULATOR_SLG51000 833 + tristate "Dialog Semiconductor SLG51000 regulators" 834 + depends on I2C 835 + select REGMAP_I2C 836 + help 837 + Say y here to support for the Dialog Semiconductor SLG51000. 838 + The SLG51000 is seven compact and customizable low dropout 839 + regulators. 840 + 841 + config REGULATOR_STM32_BOOSTER 842 + tristate "STMicroelectronics STM32 BOOSTER" 843 + depends on ARCH_STM32 || COMPILE_TEST 844 + help 845 + This driver supports internal booster (3V3) embedded in some 846 + STMicroelectronics STM32 chips. It can be used to supply ADC analog 847 + input switches when vdda supply is below 2.7V. 848 + 849 + This driver can also be built as a module. If so, the module 850 + will be called stm32-booster. 832 851 833 852 config REGULATOR_STM32_VREFBUF 834 853 tristate "STMicroelectronics STM32 VREFBUF"
+3 -1
drivers/regulator/Makefile
··· 11 11 obj-$(CONFIG_REGULATOR_USERSPACE_CONSUMER) += userspace-consumer.o 12 12 13 13 obj-$(CONFIG_REGULATOR_88PG86X) += 88pg86x.o 14 - obj-$(CONFIG_REGULATOR_88PM800) += 88pm800.o 14 + obj-$(CONFIG_REGULATOR_88PM800) += 88pm800-regulator.o 15 15 obj-$(CONFIG_REGULATOR_88PM8607) += 88pm8607.o 16 16 obj-$(CONFIG_REGULATOR_CPCAP) += cpcap-regulator.o 17 17 obj-$(CONFIG_REGULATOR_AAT2870) += aat2870-regulator.o ··· 104 104 obj-$(CONFIG_REGULATOR_S5M8767) += s5m8767.o 105 105 obj-$(CONFIG_REGULATOR_SC2731) += sc2731-regulator.o 106 106 obj-$(CONFIG_REGULATOR_SKY81452) += sky81452-regulator.o 107 + obj-$(CONFIG_REGULATOR_SLG51000) += slg51000-regulator.o 108 + obj-$(CONFIG_REGULATOR_STM32_BOOSTER) += stm32-booster.o 107 109 obj-$(CONFIG_REGULATOR_STM32_VREFBUF) += stm32-vrefbuf.o 108 110 obj-$(CONFIG_REGULATOR_STM32_PWR) += stm32-pwr.o 109 111 obj-$(CONFIG_REGULATOR_STPMIC1) += stpmic1_regulator.o
+82 -1
drivers/regulator/arizona-ldo1.c
··· 25 25 #include <linux/mfd/arizona/pdata.h> 26 26 #include <linux/mfd/arizona/registers.h> 27 27 28 + #include <linux/mfd/madera/core.h> 29 + #include <linux/mfd/madera/pdata.h> 30 + #include <linux/mfd/madera/registers.h> 31 + 28 32 struct arizona_ldo1 { 29 33 struct regulator_dev *regulator; 30 34 struct regmap *regmap; ··· 158 154 .max_uV = 1200000, 159 155 .valid_ops_mask = REGULATOR_CHANGE_STATUS | 160 156 REGULATOR_CHANGE_VOLTAGE, 157 + }, 158 + .num_consumer_supplies = 1, 159 + }; 160 + 161 + static const struct regulator_desc madera_ldo1 = { 162 + .name = "LDO1", 163 + .supply_name = "LDOVDD", 164 + .type = REGULATOR_VOLTAGE, 165 + .ops = &arizona_ldo1_ops, 166 + 167 + .vsel_reg = MADERA_LDO1_CONTROL_1, 168 + .vsel_mask = MADERA_LDO1_VSEL_MASK, 169 + .min_uV = 900000, 170 + .uV_step = 25000, 171 + .n_voltages = 13, 172 + .enable_time = 3000, 173 + 174 + .owner = THIS_MODULE, 175 + }; 176 + 177 + static const struct regulator_init_data madera_ldo1_default = { 178 + .constraints = { 179 + .min_uV = 1200000, 180 + .max_uV = 1200000, 181 + .valid_ops_mask = REGULATOR_CHANGE_STATUS, 161 182 }, 162 183 .num_consumer_supplies = 1, 163 184 }; ··· 349 320 return 0; 350 321 } 351 322 323 + static int madera_ldo1_probe(struct platform_device *pdev) 324 + { 325 + struct madera *madera = dev_get_drvdata(pdev->dev.parent); 326 + struct arizona_ldo1 *ldo1; 327 + bool external_dcvdd; 328 + int ret; 329 + 330 + ldo1 = devm_kzalloc(&pdev->dev, sizeof(*ldo1), GFP_KERNEL); 331 + if (!ldo1) 332 + return -ENOMEM; 333 + 334 + ldo1->regmap = madera->regmap; 335 + 336 + ldo1->init_data = madera_ldo1_default; 337 + 338 + ret = arizona_ldo1_common_init(pdev, ldo1, &madera_ldo1, 339 + &madera->pdata.ldo1, 340 + &external_dcvdd); 341 + if (ret) 342 + return ret; 343 + 344 + madera->internal_dcvdd = !external_dcvdd; 345 + 346 + return 0; 347 + } 348 + 352 349 static struct platform_driver arizona_ldo1_driver = { 353 350 .probe = arizona_ldo1_probe, 354 351 .remove = arizona_ldo1_remove, ··· 383 328 }, 384 329 }; 385 330 386 - module_platform_driver(arizona_ldo1_driver); 331 + static struct platform_driver madera_ldo1_driver = { 332 + .probe = madera_ldo1_probe, 333 + .remove = arizona_ldo1_remove, 334 + .driver = { 335 + .name = "madera-ldo1", 336 + }, 337 + }; 338 + 339 + static struct platform_driver * const madera_ldo1_drivers[] = { 340 + &arizona_ldo1_driver, 341 + &madera_ldo1_driver, 342 + }; 343 + 344 + static int __init arizona_ldo1_init(void) 345 + { 346 + return platform_register_drivers(madera_ldo1_drivers, 347 + ARRAY_SIZE(madera_ldo1_drivers)); 348 + } 349 + module_init(arizona_ldo1_init); 350 + 351 + static void __exit madera_ldo1_exit(void) 352 + { 353 + platform_unregister_drivers(madera_ldo1_drivers, 354 + ARRAY_SIZE(madera_ldo1_drivers)); 355 + } 356 + module_exit(madera_ldo1_exit); 387 357 388 358 /* Module information */ 389 359 MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>"); 390 360 MODULE_DESCRIPTION("Arizona LDO1 driver"); 391 361 MODULE_LICENSE("GPL"); 392 362 MODULE_ALIAS("platform:arizona-ldo1"); 363 + MODULE_ALIAS("platform:madera-ldo1");
+70 -2
drivers/regulator/arizona-micsupp.c
··· 16 16 #include <linux/regulator/driver.h> 17 17 #include <linux/regulator/machine.h> 18 18 #include <linux/regulator/of_regulator.h> 19 - #include <linux/gpio.h> 20 19 #include <linux/slab.h> 21 20 #include <linux/workqueue.h> 22 21 #include <sound/soc.h> ··· 23 24 #include <linux/mfd/arizona/core.h> 24 25 #include <linux/mfd/arizona/pdata.h> 25 26 #include <linux/mfd/arizona/registers.h> 27 + 28 + #include <linux/mfd/madera/core.h> 29 + #include <linux/mfd/madera/pdata.h> 30 + #include <linux/mfd/madera/registers.h> 26 31 27 32 #include <linux/regulator/arizona-micsupp.h> 28 33 ··· 203 200 .num_consumer_supplies = 1, 204 201 }; 205 202 203 + static const struct regulator_desc madera_micsupp = { 204 + .name = "MICVDD", 205 + .supply_name = "CPVDD1", 206 + .type = REGULATOR_VOLTAGE, 207 + .n_voltages = 40, 208 + .ops = &arizona_micsupp_ops, 209 + 210 + .vsel_reg = MADERA_LDO2_CONTROL_1, 211 + .vsel_mask = MADERA_LDO2_VSEL_MASK, 212 + .enable_reg = MADERA_MIC_CHARGE_PUMP_1, 213 + .enable_mask = MADERA_CPMIC_ENA, 214 + .bypass_reg = MADERA_MIC_CHARGE_PUMP_1, 215 + .bypass_mask = MADERA_CPMIC_BYPASS, 216 + 217 + .linear_ranges = arizona_micsupp_ext_ranges, 218 + .n_linear_ranges = ARRAY_SIZE(arizona_micsupp_ext_ranges), 219 + 220 + .enable_time = 3000, 221 + 222 + .owner = THIS_MODULE, 223 + }; 224 + 206 225 static int arizona_micsupp_of_get_pdata(struct arizona_micsupp_pdata *pdata, 207 226 struct regulator_config *config, 208 227 const struct regulator_desc *desc) ··· 341 316 &arizona->pdata.micvdd); 342 317 } 343 318 319 + static int madera_micsupp_probe(struct platform_device *pdev) 320 + { 321 + struct madera *madera = dev_get_drvdata(pdev->dev.parent); 322 + struct arizona_micsupp *micsupp; 323 + 324 + micsupp = devm_kzalloc(&pdev->dev, sizeof(*micsupp), GFP_KERNEL); 325 + if (!micsupp) 326 + return -ENOMEM; 327 + 328 + micsupp->regmap = madera->regmap; 329 + micsupp->dapm = &madera->dapm; 330 + micsupp->dev = madera->dev; 331 + micsupp->init_data = arizona_micsupp_ext_default; 332 + 333 + return arizona_micsupp_common_init(pdev, micsupp, &madera_micsupp, 334 + &madera->pdata.micvdd); 335 + } 336 + 344 337 static struct platform_driver arizona_micsupp_driver = { 345 338 .probe = arizona_micsupp_probe, 346 339 .driver = { ··· 366 323 }, 367 324 }; 368 325 369 - module_platform_driver(arizona_micsupp_driver); 326 + static struct platform_driver madera_micsupp_driver = { 327 + .probe = madera_micsupp_probe, 328 + .driver = { 329 + .name = "madera-micsupp", 330 + }, 331 + }; 332 + 333 + static struct platform_driver * const arizona_micsupp_drivers[] = { 334 + &arizona_micsupp_driver, 335 + &madera_micsupp_driver, 336 + }; 337 + 338 + static int __init arizona_micsupp_init(void) 339 + { 340 + return platform_register_drivers(arizona_micsupp_drivers, 341 + ARRAY_SIZE(arizona_micsupp_drivers)); 342 + } 343 + module_init(arizona_micsupp_init); 344 + 345 + static void __exit arizona_micsupp_exit(void) 346 + { 347 + platform_unregister_drivers(arizona_micsupp_drivers, 348 + ARRAY_SIZE(arizona_micsupp_drivers)); 349 + } 350 + module_exit(arizona_micsupp_exit); 370 351 371 352 /* Module information */ 372 353 MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>"); 373 354 MODULE_DESCRIPTION("Arizona microphone supply driver"); 374 355 MODULE_LICENSE("GPL"); 375 356 MODULE_ALIAS("platform:arizona-micsupp"); 357 + MODULE_ALIAS("platform:madera-micsupp");
-1
drivers/regulator/bd70528-regulator.c
··· 4 4 5 5 #include <linux/delay.h> 6 6 #include <linux/err.h> 7 - #include <linux/gpio.h> 8 7 #include <linux/interrupt.h> 9 8 #include <linux/kernel.h> 10 9 #include <linux/mfd/rohm-bd70528.h>
-1
drivers/regulator/bd718x7-regulator.c
··· 4 4 5 5 #include <linux/delay.h> 6 6 #include <linux/err.h> 7 - #include <linux/gpio.h> 8 7 #include <linux/interrupt.h> 9 8 #include <linux/kernel.h> 10 9 #include <linux/mfd/rohm-bd718x7.h>
+73 -11
drivers/regulator/core.c
··· 1 1 // SPDX-License-Identifier: GPL-2.0-or-later 2 - /* 3 - * core.c -- Voltage/Current Regulator framework. 4 - * 5 - * Copyright 2007, 2008 Wolfson Microelectronics PLC. 6 - * Copyright 2008 SlimLogic Ltd. 7 - * 8 - * Author: Liam Girdwood <lrg@slimlogic.co.uk> 9 - */ 2 + // 3 + // core.c -- Voltage/Current Regulator framework. 4 + // 5 + // Copyright 2007, 2008 Wolfson Microelectronics PLC. 6 + // Copyright 2008 SlimLogic Ltd. 7 + // 8 + // Author: Liam Girdwood <lrg@slimlogic.co.uk> 10 9 11 10 #include <linux/kernel.h> 12 11 #include <linux/init.h> ··· 1644 1645 { 1645 1646 if (rdev->constraints && rdev->constraints->enable_time) 1646 1647 return rdev->constraints->enable_time; 1647 - if (!rdev->desc->ops->enable_time) 1648 - return rdev->desc->enable_time; 1649 - return rdev->desc->ops->enable_time(rdev); 1648 + if (rdev->desc->ops->enable_time) 1649 + return rdev->desc->ops->enable_time(rdev); 1650 + return rdev->desc->enable_time; 1650 1651 } 1651 1652 1652 1653 static struct regulator_supply_alias *regulator_find_supply_alias( ··· 3106 3107 return ret; 3107 3108 } 3108 3109 3110 + static int _regulator_set_voltage_sel_step(struct regulator_dev *rdev, 3111 + int uV, int new_selector) 3112 + { 3113 + const struct regulator_ops *ops = rdev->desc->ops; 3114 + int diff, old_sel, curr_sel, ret; 3115 + 3116 + /* Stepping is only needed if the regulator is enabled. */ 3117 + if (!_regulator_is_enabled(rdev)) 3118 + goto final_set; 3119 + 3120 + if (!ops->get_voltage_sel) 3121 + return -EINVAL; 3122 + 3123 + old_sel = ops->get_voltage_sel(rdev); 3124 + if (old_sel < 0) 3125 + return old_sel; 3126 + 3127 + diff = new_selector - old_sel; 3128 + if (diff == 0) 3129 + return 0; /* No change needed. */ 3130 + 3131 + if (diff > 0) { 3132 + /* Stepping up. */ 3133 + for (curr_sel = old_sel + rdev->desc->vsel_step; 3134 + curr_sel < new_selector; 3135 + curr_sel += rdev->desc->vsel_step) { 3136 + /* 3137 + * Call the callback directly instead of using 3138 + * _regulator_call_set_voltage_sel() as we don't 3139 + * want to notify anyone yet. Same in the branch 3140 + * below. 3141 + */ 3142 + ret = ops->set_voltage_sel(rdev, curr_sel); 3143 + if (ret) 3144 + goto try_revert; 3145 + } 3146 + } else { 3147 + /* Stepping down. */ 3148 + for (curr_sel = old_sel - rdev->desc->vsel_step; 3149 + curr_sel > new_selector; 3150 + curr_sel -= rdev->desc->vsel_step) { 3151 + ret = ops->set_voltage_sel(rdev, curr_sel); 3152 + if (ret) 3153 + goto try_revert; 3154 + } 3155 + } 3156 + 3157 + final_set: 3158 + /* The final selector will trigger the notifiers. */ 3159 + return _regulator_call_set_voltage_sel(rdev, uV, new_selector); 3160 + 3161 + try_revert: 3162 + /* 3163 + * At least try to return to the previous voltage if setting a new 3164 + * one failed. 3165 + */ 3166 + (void)ops->set_voltage_sel(rdev, old_sel); 3167 + return ret; 3168 + } 3169 + 3109 3170 static int _regulator_set_voltage_time(struct regulator_dev *rdev, 3110 3171 int old_uV, int new_uV) 3111 3172 { ··· 3239 3180 selector = ret; 3240 3181 if (old_selector == selector) 3241 3182 ret = 0; 3183 + else if (rdev->desc->vsel_step) 3184 + ret = _regulator_set_voltage_sel_step( 3185 + rdev, best_val, selector); 3242 3186 else 3243 3187 ret = _regulator_call_set_voltage_sel( 3244 3188 rdev, best_val, selector);
+1 -1
drivers/regulator/cpcap-regulator.c
··· 90 90 #define CPCAP_REG_OFF_MODE_SEC BIT(15) 91 91 92 92 /** 93 - * SoC specific configuraion for CPCAP regulator. There are at least three 93 + * SoC specific configuration for CPCAP regulator. There are at least three 94 94 * different SoCs each with their own parameters: omap3, omap4 and tegra2. 95 95 * 96 96 * The assign_reg and assign_mask seem to allow toggling between primary
+24 -16
drivers/regulator/da9062-regulator.c
··· 493 493 .desc.ops = &da9062_ldo_ops, 494 494 .desc.min_uV = (900) * 1000, 495 495 .desc.uV_step = (50) * 1000, 496 - .desc.n_voltages = ((3600) - (900))/(50) + 1, 496 + .desc.n_voltages = ((3600) - (900))/(50) + 1 497 + + DA9062AA_VLDO_A_MIN_SEL, 497 498 .desc.enable_reg = DA9062AA_LDO1_CONT, 498 499 .desc.enable_mask = DA9062AA_LDO1_EN_MASK, 499 500 .desc.vsel_reg = DA9062AA_VLDO1_A, 500 501 .desc.vsel_mask = DA9062AA_VLDO1_A_MASK, 501 - .desc.linear_min_sel = 0, 502 + .desc.linear_min_sel = DA9062AA_VLDO_A_MIN_SEL, 502 503 .sleep = REG_FIELD(DA9062AA_VLDO1_A, 503 504 __builtin_ffs((int)DA9062AA_LDO1_SL_A_MASK) - 1, 504 505 sizeof(unsigned int) * 8 - ··· 526 525 .desc.ops = &da9062_ldo_ops, 527 526 .desc.min_uV = (900) * 1000, 528 527 .desc.uV_step = (50) * 1000, 529 - .desc.n_voltages = ((3600) - (600))/(50) + 1, 528 + .desc.n_voltages = ((3600) - (900))/(50) + 1 529 + + DA9062AA_VLDO_A_MIN_SEL, 530 530 .desc.enable_reg = DA9062AA_LDO2_CONT, 531 531 .desc.enable_mask = DA9062AA_LDO2_EN_MASK, 532 532 .desc.vsel_reg = DA9062AA_VLDO2_A, 533 533 .desc.vsel_mask = DA9062AA_VLDO2_A_MASK, 534 - .desc.linear_min_sel = 0, 534 + .desc.linear_min_sel = DA9062AA_VLDO_A_MIN_SEL, 535 535 .sleep = REG_FIELD(DA9062AA_VLDO2_A, 536 536 __builtin_ffs((int)DA9062AA_LDO2_SL_A_MASK) - 1, 537 537 sizeof(unsigned int) * 8 - ··· 559 557 .desc.ops = &da9062_ldo_ops, 560 558 .desc.min_uV = (900) * 1000, 561 559 .desc.uV_step = (50) * 1000, 562 - .desc.n_voltages = ((3600) - (900))/(50) + 1, 560 + .desc.n_voltages = ((3600) - (900))/(50) + 1 561 + + DA9062AA_VLDO_A_MIN_SEL, 563 562 .desc.enable_reg = DA9062AA_LDO3_CONT, 564 563 .desc.enable_mask = DA9062AA_LDO3_EN_MASK, 565 564 .desc.vsel_reg = DA9062AA_VLDO3_A, 566 565 .desc.vsel_mask = DA9062AA_VLDO3_A_MASK, 567 - .desc.linear_min_sel = 0, 566 + .desc.linear_min_sel = DA9062AA_VLDO_A_MIN_SEL, 568 567 .sleep = REG_FIELD(DA9062AA_VLDO3_A, 569 568 __builtin_ffs((int)DA9062AA_LDO3_SL_A_MASK) - 1, 570 569 sizeof(unsigned int) * 8 - ··· 592 589 .desc.ops = &da9062_ldo_ops, 593 590 .desc.min_uV = (900) * 1000, 594 591 .desc.uV_step = (50) * 1000, 595 - .desc.n_voltages = ((3600) - (900))/(50) + 1, 592 + .desc.n_voltages = ((3600) - (900))/(50) + 1 593 + + DA9062AA_VLDO_A_MIN_SEL, 596 594 .desc.enable_reg = DA9062AA_LDO4_CONT, 597 595 .desc.enable_mask = DA9062AA_LDO4_EN_MASK, 598 596 .desc.vsel_reg = DA9062AA_VLDO4_A, 599 597 .desc.vsel_mask = DA9062AA_VLDO4_A_MASK, 600 - .desc.linear_min_sel = 0, 598 + .desc.linear_min_sel = DA9062AA_VLDO_A_MIN_SEL, 601 599 .sleep = REG_FIELD(DA9062AA_VLDO4_A, 602 600 __builtin_ffs((int)DA9062AA_LDO4_SL_A_MASK) - 1, 603 601 sizeof(unsigned int) * 8 - ··· 773 769 .desc.ops = &da9062_ldo_ops, 774 770 .desc.min_uV = (900) * 1000, 775 771 .desc.uV_step = (50) * 1000, 776 - .desc.n_voltages = ((3600) - (900))/(50) + 1, 772 + .desc.n_voltages = ((3600) - (900))/(50) + 1 773 + + DA9062AA_VLDO_A_MIN_SEL, 777 774 .desc.enable_reg = DA9062AA_LDO1_CONT, 778 775 .desc.enable_mask = DA9062AA_LDO1_EN_MASK, 779 776 .desc.vsel_reg = DA9062AA_VLDO1_A, 780 777 .desc.vsel_mask = DA9062AA_VLDO1_A_MASK, 781 - .desc.linear_min_sel = 0, 778 + .desc.linear_min_sel = DA9062AA_VLDO_A_MIN_SEL, 782 779 .sleep = REG_FIELD(DA9062AA_VLDO1_A, 783 780 __builtin_ffs((int)DA9062AA_LDO1_SL_A_MASK) - 1, 784 781 sizeof(unsigned int) * 8 - ··· 806 801 .desc.ops = &da9062_ldo_ops, 807 802 .desc.min_uV = (900) * 1000, 808 803 .desc.uV_step = (50) * 1000, 809 - .desc.n_voltages = ((3600) - (600))/(50) + 1, 804 + .desc.n_voltages = ((3600) - (900))/(50) + 1 805 + + DA9062AA_VLDO_A_MIN_SEL, 810 806 .desc.enable_reg = DA9062AA_LDO2_CONT, 811 807 .desc.enable_mask = DA9062AA_LDO2_EN_MASK, 812 808 .desc.vsel_reg = DA9062AA_VLDO2_A, 813 809 .desc.vsel_mask = DA9062AA_VLDO2_A_MASK, 814 - .desc.linear_min_sel = 0, 810 + .desc.linear_min_sel = DA9062AA_VLDO_A_MIN_SEL, 815 811 .sleep = REG_FIELD(DA9062AA_VLDO2_A, 816 812 __builtin_ffs((int)DA9062AA_LDO2_SL_A_MASK) - 1, 817 813 sizeof(unsigned int) * 8 - ··· 839 833 .desc.ops = &da9062_ldo_ops, 840 834 .desc.min_uV = (900) * 1000, 841 835 .desc.uV_step = (50) * 1000, 842 - .desc.n_voltages = ((3600) - (900))/(50) + 1, 836 + .desc.n_voltages = ((3600) - (900))/(50) + 1 837 + + DA9062AA_VLDO_A_MIN_SEL, 843 838 .desc.enable_reg = DA9062AA_LDO3_CONT, 844 839 .desc.enable_mask = DA9062AA_LDO3_EN_MASK, 845 840 .desc.vsel_reg = DA9062AA_VLDO3_A, 846 841 .desc.vsel_mask = DA9062AA_VLDO3_A_MASK, 847 - .desc.linear_min_sel = 0, 842 + .desc.linear_min_sel = DA9062AA_VLDO_A_MIN_SEL, 848 843 .sleep = REG_FIELD(DA9062AA_VLDO3_A, 849 844 __builtin_ffs((int)DA9062AA_LDO3_SL_A_MASK) - 1, 850 845 sizeof(unsigned int) * 8 - ··· 872 865 .desc.ops = &da9062_ldo_ops, 873 866 .desc.min_uV = (900) * 1000, 874 867 .desc.uV_step = (50) * 1000, 875 - .desc.n_voltages = ((3600) - (900))/(50) + 1, 868 + .desc.n_voltages = ((3600) - (900))/(50) + 1 869 + + DA9062AA_VLDO_A_MIN_SEL, 876 870 .desc.enable_reg = DA9062AA_LDO4_CONT, 877 871 .desc.enable_mask = DA9062AA_LDO4_EN_MASK, 878 872 .desc.vsel_reg = DA9062AA_VLDO4_A, 879 873 .desc.vsel_mask = DA9062AA_VLDO4_A_MASK, 880 - .desc.linear_min_sel = 0, 874 + .desc.linear_min_sel = DA9062AA_VLDO_A_MIN_SEL, 881 875 .sleep = REG_FIELD(DA9062AA_VLDO4_A, 882 876 __builtin_ffs((int)DA9062AA_LDO4_SL_A_MASK) - 1, 883 877 sizeof(unsigned int) * 8 -
+44 -17
drivers/regulator/da9063-regulator.c
··· 19 19 #include <linux/regulator/machine.h> 20 20 #include <linux/regulator/of_regulator.h> 21 21 #include <linux/mfd/da9063/core.h> 22 - #include <linux/mfd/da9063/pdata.h> 23 22 #include <linux/mfd/da9063/registers.h> 24 23 25 24 ··· 26 27 #define BFIELD(_reg, _mask) \ 27 28 REG_FIELD(_reg, __builtin_ffs((int)_mask) - 1, \ 28 29 sizeof(unsigned int) * 8 - __builtin_clz((_mask)) - 1) 30 + 31 + /* DA9063 and DA9063L regulator IDs */ 32 + enum { 33 + /* BUCKs */ 34 + DA9063_ID_BCORE1, 35 + DA9063_ID_BCORE2, 36 + DA9063_ID_BPRO, 37 + DA9063_ID_BMEM, 38 + DA9063_ID_BIO, 39 + DA9063_ID_BPERI, 40 + 41 + /* BCORE1 and BCORE2 in merged mode */ 42 + DA9063_ID_BCORES_MERGED, 43 + /* BMEM and BIO in merged mode */ 44 + DA9063_ID_BMEM_BIO_MERGED, 45 + /* When two BUCKs are merged, they cannot be reused separately */ 46 + 47 + /* LDOs on both DA9063 and DA9063L */ 48 + DA9063_ID_LDO3, 49 + DA9063_ID_LDO7, 50 + DA9063_ID_LDO8, 51 + DA9063_ID_LDO9, 52 + DA9063_ID_LDO11, 53 + 54 + /* DA9063-only LDOs */ 55 + DA9063_ID_LDO1, 56 + DA9063_ID_LDO2, 57 + DA9063_ID_LDO4, 58 + DA9063_ID_LDO5, 59 + DA9063_ID_LDO6, 60 + DA9063_ID_LDO10, 61 + }; 62 + 63 + /* Old regulator platform data */ 64 + struct da9063_regulator_data { 65 + int id; 66 + struct regulator_init_data *initdata; 67 + }; 68 + 69 + struct da9063_regulators_pdata { 70 + unsigned n_regulators; 71 + struct da9063_regulator_data *regulator_data; 72 + }; 29 73 30 74 /* Regulator capabilities and registers description */ 31 75 struct da9063_regulator_info { ··· 634 592 return NULL; 635 593 } 636 594 637 - #ifdef CONFIG_OF 638 595 static struct of_regulator_match da9063_matches[] = { 639 596 [DA9063_ID_BCORE1] = { .name = "bcore1" }, 640 597 [DA9063_ID_BCORE2] = { .name = "bcore2" }, ··· 711 670 *da9063_reg_matches = da9063_matches; 712 671 return pdata; 713 672 } 714 - #else 715 - static struct da9063_regulators_pdata *da9063_parse_regulators_dt( 716 - struct platform_device *pdev, 717 - struct of_regulator_match **da9063_reg_matches) 718 - { 719 - *da9063_reg_matches = NULL; 720 - return ERR_PTR(-ENODEV); 721 - } 722 - #endif 723 673 724 674 static int da9063_regulator_probe(struct platform_device *pdev) 725 675 { 726 676 struct da9063 *da9063 = dev_get_drvdata(pdev->dev.parent); 727 - struct da9063_pdata *da9063_pdata = dev_get_platdata(da9063->dev); 728 677 struct of_regulator_match *da9063_reg_matches = NULL; 729 678 struct da9063_regulators_pdata *regl_pdata; 730 679 const struct da9063_dev_model *model; ··· 724 693 bool bcores_merged, bmem_bio_merged; 725 694 int id, irq, n, n_regulators, ret, val; 726 695 727 - regl_pdata = da9063_pdata ? da9063_pdata->regulators_pdata : NULL; 728 - 729 - if (!regl_pdata) 730 - regl_pdata = da9063_parse_regulators_dt(pdev, 731 - &da9063_reg_matches); 696 + regl_pdata = da9063_parse_regulators_dt(pdev, &da9063_reg_matches); 732 697 733 698 if (IS_ERR(regl_pdata) || regl_pdata->n_regulators == 0) { 734 699 dev_err(&pdev->dev,
+2
drivers/regulator/da9211-regulator.c
··· 289 289 0, 290 290 GPIOD_OUT_HIGH | GPIOD_FLAGS_BIT_NONEXCLUSIVE, 291 291 "da9211-enable"); 292 + if (IS_ERR(pdata->gpiod_ren[n])) 293 + pdata->gpiod_ren[n] = NULL; 292 294 n++; 293 295 } 294 296
+5 -6
drivers/regulator/helpers.c
··· 1 1 // SPDX-License-Identifier: GPL-2.0-or-later 2 - /* 3 - * helpers.c -- Voltage/Current Regulator framework helper functions. 4 - * 5 - * Copyright 2007, 2008 Wolfson Microelectronics PLC. 6 - * Copyright 2008 SlimLogic Ltd. 7 - */ 2 + // 3 + // helpers.c -- Voltage/Current Regulator framework helper functions. 4 + // 5 + // Copyright 2007, 2008 Wolfson Microelectronics PLC. 6 + // Copyright 2008 SlimLogic Ltd. 8 7 9 8 #include <linux/kernel.h> 10 9 #include <linux/err.h>
+26 -2
drivers/regulator/max77620-regulator.c
··· 467 467 { 468 468 struct max77620_regulator *pmic = rdev_get_drvdata(rdev); 469 469 int id = rdev_get_id(rdev); 470 - int ret = 1; 470 + int ret; 471 471 472 472 if (pmic->active_fps_src[id] != MAX77620_FPS_SRC_NONE) 473 473 return 1; ··· 758 758 RAIL_LDO(LDO8, ldo8, "in-ldo7-8", N, 800000, 3950000, 50000), 759 759 }; 760 760 761 + static struct max77620_regulator_info max77663_regs_info[MAX77620_NUM_REGS] = { 762 + RAIL_SD(SD0, sd0, "in-sd0", SD0, 600000, 3387500, 12500, 0xFF, NONE), 763 + RAIL_SD(SD1, sd1, "in-sd1", SD1, 800000, 1587500, 12500, 0xFF, NONE), 764 + RAIL_SD(SD2, sd2, "in-sd2", SDX, 600000, 3787500, 12500, 0xFF, NONE), 765 + RAIL_SD(SD3, sd3, "in-sd3", SDX, 600000, 3787500, 12500, 0xFF, NONE), 766 + RAIL_SD(SD4, sd4, "in-sd4", SDX, 600000, 3787500, 12500, 0xFF, NONE), 767 + 768 + RAIL_LDO(LDO0, ldo0, "in-ldo0-1", N, 800000, 2375000, 25000), 769 + RAIL_LDO(LDO1, ldo1, "in-ldo0-1", N, 800000, 2375000, 25000), 770 + RAIL_LDO(LDO2, ldo2, "in-ldo2", P, 800000, 3950000, 50000), 771 + RAIL_LDO(LDO3, ldo3, "in-ldo3-5", P, 800000, 3950000, 50000), 772 + RAIL_LDO(LDO4, ldo4, "in-ldo4-6", P, 800000, 1587500, 12500), 773 + RAIL_LDO(LDO5, ldo5, "in-ldo3-5", P, 800000, 3950000, 50000), 774 + RAIL_LDO(LDO6, ldo6, "in-ldo4-6", P, 800000, 3950000, 50000), 775 + RAIL_LDO(LDO7, ldo7, "in-ldo7-8", N, 800000, 3950000, 50000), 776 + RAIL_LDO(LDO8, ldo8, "in-ldo7-8", N, 800000, 3950000, 50000), 777 + }; 778 + 761 779 static int max77620_regulator_probe(struct platform_device *pdev) 762 780 { 763 781 struct max77620_chip *max77620_chip = dev_get_drvdata(pdev->dev.parent); ··· 800 782 case MAX77620: 801 783 rinfo = max77620_regs_info; 802 784 break; 803 - default: 785 + case MAX20024: 804 786 rinfo = max20024_regs_info; 805 787 break; 788 + case MAX77663: 789 + rinfo = max77663_regs_info; 790 + break; 791 + default: 792 + return -EINVAL; 806 793 } 807 794 808 795 config.regmap = pmic->rmap; ··· 901 878 static const struct platform_device_id max77620_regulator_devtype[] = { 902 879 { .name = "max77620-pmic", }, 903 880 { .name = "max20024-pmic", }, 881 + { .name = "max77663-pmic", }, 904 882 {}, 905 883 }; 906 884 MODULE_DEVICE_TABLE(platform, max77620_regulator_devtype);
+36 -134
drivers/regulator/max77650-regulator.c
··· 20 20 21 21 #define MAX77650_REGULATOR_V_LDO_MASK GENMASK(6, 0) 22 22 #define MAX77650_REGULATOR_V_SBB_MASK GENMASK(5, 0) 23 + #define MAX77651_REGULATOR_V_SBB1_MASK GENMASK(5, 2) 24 + #define MAX77651_REGULATOR_V_SBB1_RANGE_MASK GENMASK(1, 0) 23 25 24 26 #define MAX77650_REGULATOR_AD_MASK BIT(3) 25 27 #define MAX77650_REGULATOR_AD_DISABLED 0x00 ··· 43 41 unsigned int regB; 44 42 }; 45 43 46 - static const unsigned int max77651_sbb1_regulator_volt_table[] = { 47 - 2400000, 3200000, 4000000, 4800000, 48 - 2450000, 3250000, 4050000, 4850000, 49 - 2500000, 3300000, 4100000, 4900000, 50 - 2550000, 3350000, 4150000, 4950000, 51 - 2600000, 3400000, 4200000, 5000000, 52 - 2650000, 3450000, 4250000, 5050000, 53 - 2700000, 3500000, 4300000, 5100000, 54 - 2750000, 3550000, 4350000, 5150000, 55 - 2800000, 3600000, 4400000, 5200000, 56 - 2850000, 3650000, 4450000, 5250000, 57 - 2900000, 3700000, 4500000, 0, 58 - 2950000, 3750000, 4550000, 0, 59 - 3000000, 3800000, 4600000, 0, 60 - 3050000, 3850000, 4650000, 0, 61 - 3100000, 3900000, 4700000, 0, 62 - 3150000, 3950000, 4750000, 0, 44 + static struct max77650_regulator_desc max77651_SBB1_desc; 45 + 46 + static const unsigned int max77651_sbb1_volt_range_sel[] = { 47 + 0x0, 0x1, 0x2, 0x3 63 48 }; 64 49 65 - #define MAX77651_REGULATOR_SBB1_SEL_DEC(_val) \ 66 - (((_val & 0x3c) >> 2) | ((_val & 0x03) << 4)) 67 - #define MAX77651_REGULATOR_SBB1_SEL_ENC(_val) \ 68 - (((_val & 0x30) >> 4) | ((_val & 0x0f) << 2)) 69 - 70 - #define MAX77650_REGULATOR_SBB1_SEL_DECR(_val) \ 71 - do { \ 72 - _val = MAX77651_REGULATOR_SBB1_SEL_DEC(_val); \ 73 - _val--; \ 74 - _val = MAX77651_REGULATOR_SBB1_SEL_ENC(_val); \ 75 - } while (0) 76 - 77 - #define MAX77650_REGULATOR_SBB1_SEL_INCR(_val) \ 78 - do { \ 79 - _val = MAX77651_REGULATOR_SBB1_SEL_DEC(_val); \ 80 - _val++; \ 81 - _val = MAX77651_REGULATOR_SBB1_SEL_ENC(_val); \ 82 - } while (0) 50 + static const struct regulator_linear_range max77651_sbb1_volt_ranges[] = { 51 + /* range index 0 */ 52 + REGULATOR_LINEAR_RANGE(2400000, 0x00, 0x0f, 50000), 53 + /* range index 1 */ 54 + REGULATOR_LINEAR_RANGE(3200000, 0x00, 0x0f, 50000), 55 + /* range index 2 */ 56 + REGULATOR_LINEAR_RANGE(4000000, 0x00, 0x0f, 50000), 57 + /* range index 3 */ 58 + REGULATOR_LINEAR_RANGE(4800000, 0x00, 0x09, 50000), 59 + }; 83 60 84 61 static const unsigned int max77650_current_limit_table[] = { 85 62 1000000, 866000, 707000, 500000, ··· 108 127 MAX77650_REGULATOR_DISABLED); 109 128 } 110 129 111 - static int max77650_regulator_set_voltage_sel(struct regulator_dev *rdev, 112 - unsigned int sel) 113 - { 114 - int rv = 0, curr, diff; 115 - bool ascending; 116 - 117 - /* 118 - * If the regulator is disabled, we can program the desired 119 - * voltage right away. 120 - */ 121 - if (!max77650_regulator_is_enabled(rdev)) 122 - return regulator_set_voltage_sel_regmap(rdev, sel); 123 - 124 - /* 125 - * Otherwise we need to manually ramp the output voltage up/down 126 - * one step at a time. 127 - */ 128 - 129 - curr = regulator_get_voltage_sel_regmap(rdev); 130 - if (curr < 0) 131 - return curr; 132 - 133 - diff = curr - sel; 134 - if (diff == 0) 135 - return 0; /* Already there. */ 136 - else if (diff > 0) 137 - ascending = false; 138 - else 139 - ascending = true; 140 - 141 - /* 142 - * Make sure we'll get to the right voltage and break the loop even if 143 - * the selector equals 0. 144 - */ 145 - for (ascending ? curr++ : curr--;; ascending ? curr++ : curr--) { 146 - rv = regulator_set_voltage_sel_regmap(rdev, curr); 147 - if (rv) 148 - return rv; 149 - 150 - if (curr == sel) 151 - break; 152 - } 153 - 154 - return 0; 155 - } 156 - 157 - /* 158 - * Special case: non-linear voltage table for max77651 SBB1 - software 159 - * must ensure the voltage is ramped in 50mV increments. 160 - */ 161 - static int max77651_regulator_sbb1_set_voltage_sel(struct regulator_dev *rdev, 162 - unsigned int sel) 163 - { 164 - int rv = 0, curr, vcurr, vdest, vdiff; 165 - 166 - /* 167 - * If the regulator is disabled, we can program the desired 168 - * voltage right away. 169 - */ 170 - if (!max77650_regulator_is_enabled(rdev)) 171 - return regulator_set_voltage_sel_regmap(rdev, sel); 172 - 173 - curr = regulator_get_voltage_sel_regmap(rdev); 174 - if (curr < 0) 175 - return curr; 176 - 177 - if (curr == sel) 178 - return 0; /* Already there. */ 179 - 180 - vcurr = max77651_sbb1_regulator_volt_table[curr]; 181 - vdest = max77651_sbb1_regulator_volt_table[sel]; 182 - vdiff = vcurr - vdest; 183 - 184 - for (;;) { 185 - if (vdiff > 0) 186 - MAX77650_REGULATOR_SBB1_SEL_DECR(curr); 187 - else 188 - MAX77650_REGULATOR_SBB1_SEL_INCR(curr); 189 - 190 - rv = regulator_set_voltage_sel_regmap(rdev, curr); 191 - if (rv) 192 - return rv; 193 - 194 - if (curr == sel) 195 - break; 196 - }; 197 - 198 - return 0; 199 - } 200 - 201 130 static const struct regulator_ops max77650_regulator_LDO_ops = { 202 131 .is_enabled = max77650_regulator_is_enabled, 203 132 .enable = max77650_regulator_enable, ··· 115 224 .list_voltage = regulator_list_voltage_linear, 116 225 .map_voltage = regulator_map_voltage_linear, 117 226 .get_voltage_sel = regulator_get_voltage_sel_regmap, 118 - .set_voltage_sel = max77650_regulator_set_voltage_sel, 227 + .set_voltage_sel = regulator_set_voltage_sel_regmap, 119 228 .set_active_discharge = regulator_set_active_discharge_regmap, 120 229 }; 121 230 ··· 126 235 .list_voltage = regulator_list_voltage_linear, 127 236 .map_voltage = regulator_map_voltage_linear, 128 237 .get_voltage_sel = regulator_get_voltage_sel_regmap, 129 - .set_voltage_sel = max77650_regulator_set_voltage_sel, 238 + .set_voltage_sel = regulator_set_voltage_sel_regmap, 130 239 .get_current_limit = regulator_get_current_limit_regmap, 131 240 .set_current_limit = regulator_set_current_limit_regmap, 132 241 .set_active_discharge = regulator_set_active_discharge_regmap, 133 242 }; 134 243 135 - /* Special case for max77651 SBB1 - non-linear voltage mapping. */ 244 + /* Special case for max77651 SBB1 - pickable linear-range voltage mapping. */ 136 245 static const struct regulator_ops max77651_SBB1_regulator_ops = { 137 246 .is_enabled = max77650_regulator_is_enabled, 138 247 .enable = max77650_regulator_enable, 139 248 .disable = max77650_regulator_disable, 140 - .list_voltage = regulator_list_voltage_table, 141 - .get_voltage_sel = regulator_get_voltage_sel_regmap, 142 - .set_voltage_sel = max77651_regulator_sbb1_set_voltage_sel, 249 + .list_voltage = regulator_list_voltage_pickable_linear_range, 250 + .get_voltage_sel = regulator_get_voltage_sel_pickable_regmap, 251 + .set_voltage_sel = regulator_set_voltage_sel_pickable_regmap, 143 252 .get_current_limit = regulator_get_current_limit_regmap, 144 253 .set_current_limit = regulator_set_current_limit_regmap, 145 254 .set_active_discharge = regulator_set_active_discharge_regmap, ··· 156 265 .min_uV = 1350000, 157 266 .uV_step = 12500, 158 267 .n_voltages = 128, 268 + .vsel_step = 1, 159 269 .vsel_mask = MAX77650_REGULATOR_V_LDO_MASK, 160 270 .vsel_reg = MAX77650_REG_CNFG_LDO_A, 161 271 .active_discharge_off = MAX77650_REGULATOR_AD_DISABLED, ··· 182 290 .min_uV = 800000, 183 291 .uV_step = 25000, 184 292 .n_voltages = 64, 293 + .vsel_step = 1, 185 294 .vsel_mask = MAX77650_REGULATOR_V_SBB_MASK, 186 295 .vsel_reg = MAX77650_REG_CNFG_SBB0_A, 187 296 .active_discharge_off = MAX77650_REGULATOR_AD_DISABLED, ··· 212 319 .min_uV = 800000, 213 320 .uV_step = 12500, 214 321 .n_voltages = 64, 322 + .vsel_step = 1, 215 323 .vsel_mask = MAX77650_REGULATOR_V_SBB_MASK, 216 324 .vsel_reg = MAX77650_REG_CNFG_SBB1_A, 217 325 .active_discharge_off = MAX77650_REGULATOR_AD_DISABLED, ··· 239 345 .supply_name = "in-sbb1", 240 346 .id = MAX77650_REGULATOR_ID_SBB1, 241 347 .ops = &max77651_SBB1_regulator_ops, 242 - .volt_table = max77651_sbb1_regulator_volt_table, 243 - .n_voltages = ARRAY_SIZE(max77651_sbb1_regulator_volt_table), 244 - .vsel_mask = MAX77650_REGULATOR_V_SBB_MASK, 348 + .linear_range_selectors = max77651_sbb1_volt_range_sel, 349 + .linear_ranges = max77651_sbb1_volt_ranges, 350 + .n_linear_ranges = ARRAY_SIZE(max77651_sbb1_volt_ranges), 351 + .n_voltages = 58, 352 + .vsel_step = 1, 353 + .vsel_range_mask = MAX77651_REGULATOR_V_SBB1_RANGE_MASK, 354 + .vsel_range_reg = MAX77650_REG_CNFG_SBB1_A, 355 + .vsel_mask = MAX77651_REGULATOR_V_SBB1_MASK, 245 356 .vsel_reg = MAX77650_REG_CNFG_SBB1_A, 246 357 .active_discharge_off = MAX77650_REGULATOR_AD_DISABLED, 247 358 .active_discharge_on = MAX77650_REGULATOR_AD_ENABLED, ··· 275 376 .min_uV = 800000, 276 377 .uV_step = 50000, 277 378 .n_voltages = 64, 379 + .vsel_step = 1, 278 380 .vsel_mask = MAX77650_REGULATOR_V_SBB_MASK, 279 381 .vsel_reg = MAX77650_REG_CNFG_SBB2_A, 280 382 .active_discharge_off = MAX77650_REGULATOR_AD_DISABLED, ··· 305 405 .min_uV = 2400000, 306 406 .uV_step = 50000, 307 407 .n_voltages = 64, 408 + .vsel_step = 1, 308 409 .vsel_mask = MAX77650_REGULATOR_V_SBB_MASK, 309 410 .vsel_reg = MAX77650_REG_CNFG_SBB2_A, 310 411 .active_discharge_off = MAX77650_REGULATOR_AD_DISABLED, ··· 397 496 MODULE_DESCRIPTION("MAXIM 77650/77651 regulator driver"); 398 497 MODULE_AUTHOR("Bartosz Golaszewski <bgolaszewski@baylibre.com>"); 399 498 MODULE_LICENSE("GPL v2"); 499 + MODULE_ALIAS("platform:max77650-regulator");
-2
drivers/regulator/max77802-regulator.c
··· 14 14 #include <linux/kernel.h> 15 15 #include <linux/bug.h> 16 16 #include <linux/err.h> 17 - #include <linux/gpio.h> 18 17 #include <linux/slab.h> 19 - #include <linux/gpio/consumer.h> 20 18 #include <linux/module.h> 21 19 #include <linux/platform_device.h> 22 20 #include <linux/regulator/driver.h>
+28 -34
drivers/regulator/max8952.c
··· 13 13 #include <linux/platform_device.h> 14 14 #include <linux/regulator/driver.h> 15 15 #include <linux/regulator/max8952.h> 16 - #include <linux/gpio.h> 17 16 #include <linux/gpio/consumer.h> 18 17 #include <linux/io.h> 19 18 #include <linux/of.h> 20 - #include <linux/of_gpio.h> 21 19 #include <linux/regulator/of_regulator.h> 22 20 #include <linux/slab.h> 23 21 ··· 35 37 struct max8952_data { 36 38 struct i2c_client *client; 37 39 struct max8952_platform_data *pdata; 38 - 40 + struct gpio_desc *vid0_gpiod; 41 + struct gpio_desc *vid1_gpiod; 39 42 bool vid0; 40 43 bool vid1; 41 44 }; ··· 86 87 { 87 88 struct max8952_data *max8952 = rdev_get_drvdata(rdev); 88 89 89 - if (!gpio_is_valid(max8952->pdata->gpio_vid0) || 90 - !gpio_is_valid(max8952->pdata->gpio_vid1)) { 90 + if (!max8952->vid0_gpiod || !max8952->vid1_gpiod) { 91 91 /* DVS not supported */ 92 92 return -EPERM; 93 93 } 94 94 95 95 max8952->vid0 = selector & 0x1; 96 96 max8952->vid1 = (selector >> 1) & 0x1; 97 - gpio_set_value(max8952->pdata->gpio_vid0, max8952->vid0); 98 - gpio_set_value(max8952->pdata->gpio_vid1, max8952->vid1); 97 + gpiod_set_value(max8952->vid0_gpiod, max8952->vid0); 98 + gpiod_set_value(max8952->vid1_gpiod, max8952->vid1); 99 99 100 100 return 0; 101 101 } ··· 131 133 pd = devm_kzalloc(dev, sizeof(*pd), GFP_KERNEL); 132 134 if (!pd) 133 135 return NULL; 134 - 135 - pd->gpio_vid0 = of_get_named_gpio(np, "max8952,vid-gpios", 0); 136 - pd->gpio_vid1 = of_get_named_gpio(np, "max8952,vid-gpios", 1); 137 136 138 137 if (of_property_read_u32(np, "max8952,default-mode", &pd->default_mode)) 139 138 dev_warn(dev, "Default mode not specified, assuming 0\n"); ··· 174 179 static int max8952_pmic_probe(struct i2c_client *client, 175 180 const struct i2c_device_id *i2c_id) 176 181 { 177 - struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent); 182 + struct i2c_adapter *adapter = client->adapter; 178 183 struct max8952_platform_data *pdata = dev_get_platdata(&client->dev); 179 184 struct regulator_config config = { }; 180 185 struct max8952_data *max8952; ··· 182 187 struct gpio_desc *gpiod; 183 188 enum gpiod_flags gflags; 184 189 185 - int ret = 0, err = 0; 190 + int ret = 0; 186 191 187 192 if (client->dev.of_node) 188 193 pdata = max8952_parse_dt(&client->dev); ··· 235 240 max8952->vid0 = pdata->default_mode & 0x1; 236 241 max8952->vid1 = (pdata->default_mode >> 1) & 0x1; 237 242 238 - if (gpio_is_valid(pdata->gpio_vid0) && 239 - gpio_is_valid(pdata->gpio_vid1)) { 240 - unsigned long gpio_flags; 243 + /* Fetch vid0 and vid1 GPIOs if available */ 244 + gflags = max8952->vid0 ? GPIOD_OUT_HIGH : GPIOD_OUT_LOW; 245 + max8952->vid0_gpiod = devm_gpiod_get_index_optional(&client->dev, 246 + "max8952,vid", 247 + 0, gflags); 248 + if (IS_ERR(max8952->vid0_gpiod)) 249 + return PTR_ERR(max8952->vid0_gpiod); 250 + gflags = max8952->vid1 ? GPIOD_OUT_HIGH : GPIOD_OUT_LOW; 251 + max8952->vid1_gpiod = devm_gpiod_get_index_optional(&client->dev, 252 + "max8952,vid", 253 + 1, gflags); 254 + if (IS_ERR(max8952->vid1_gpiod)) 255 + return PTR_ERR(max8952->vid1_gpiod); 241 256 242 - gpio_flags = max8952->vid0 ? 243 - GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW; 244 - if (devm_gpio_request_one(&client->dev, pdata->gpio_vid0, 245 - gpio_flags, "MAX8952 VID0")) 246 - err = 1; 247 - 248 - gpio_flags = max8952->vid1 ? 249 - GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW; 250 - if (devm_gpio_request_one(&client->dev, pdata->gpio_vid1, 251 - gpio_flags, "MAX8952 VID1")) 252 - err = 2; 253 - } else 254 - err = 3; 255 - 256 - if (err) { 257 + /* If either VID GPIO is missing just disable this */ 258 + if (!max8952->vid0_gpiod || !max8952->vid1_gpiod) { 257 259 dev_warn(&client->dev, "VID0/1 gpio invalid: " 258 - "DVS not available.\n"); 260 + "DVS not available.\n"); 259 261 max8952->vid0 = 0; 260 262 max8952->vid1 = 0; 261 - /* Mark invalid */ 262 - pdata->gpio_vid0 = -1; 263 - pdata->gpio_vid1 = -1; 263 + /* Make sure if we have any descriptors they get set to low */ 264 + if (max8952->vid0_gpiod) 265 + gpiod_set_value(max8952->vid0_gpiod, 0); 266 + if (max8952->vid1_gpiod) 267 + gpiod_set_value(max8952->vid1_gpiod, 0); 264 268 265 269 /* Disable Pulldown of EN only */ 266 270 max8952_write_reg(max8952, MAX8952_REG_CONTROL, 0x60);
+239 -13
drivers/regulator/qcom_spmi-regulator.c
··· 96 96 SPMI_REGULATOR_LOGICAL_TYPE_ULT_LO_SMPS, 97 97 SPMI_REGULATOR_LOGICAL_TYPE_ULT_HO_SMPS, 98 98 SPMI_REGULATOR_LOGICAL_TYPE_ULT_LDO, 99 + SPMI_REGULATOR_LOGICAL_TYPE_FTSMPS426, 100 + SPMI_REGULATOR_LOGICAL_TYPE_HFS430, 99 101 }; 100 102 101 103 enum spmi_regulator_type { ··· 144 142 SPMI_REGULATOR_SUBTYPE_5V_BOOST = 0x01, 145 143 SPMI_REGULATOR_SUBTYPE_FTS_CTL = 0x08, 146 144 SPMI_REGULATOR_SUBTYPE_FTS2p5_CTL = 0x09, 145 + SPMI_REGULATOR_SUBTYPE_FTS426_CTL = 0x0a, 147 146 SPMI_REGULATOR_SUBTYPE_BB_2A = 0x01, 148 147 SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL1 = 0x0d, 149 148 SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL2 = 0x0e, 150 149 SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL3 = 0x0f, 151 150 SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL4 = 0x10, 151 + SPMI_REGULATOR_SUBTYPE_HFS430 = 0x0a, 152 152 }; 153 153 154 154 enum spmi_common_regulator_registers { ··· 164 160 SPMI_COMMON_REG_PULL_DOWN = 0x48, 165 161 SPMI_COMMON_REG_SOFT_START = 0x4c, 166 162 SPMI_COMMON_REG_STEP_CTRL = 0x61, 163 + }; 164 + 165 + /* 166 + * Second common register layout used by newer devices starting with ftsmps426 167 + * Note that some of the registers from the first common layout remain 168 + * unchanged and their definition is not duplicated. 169 + */ 170 + enum spmi_ftsmps426_regulator_registers { 171 + SPMI_FTSMPS426_REG_VOLTAGE_LSB = 0x40, 172 + SPMI_FTSMPS426_REG_VOLTAGE_MSB = 0x41, 173 + SPMI_FTSMPS426_REG_VOLTAGE_ULS_LSB = 0x68, 174 + SPMI_FTSMPS426_REG_VOLTAGE_ULS_MSB = 0x69, 167 175 }; 168 176 169 177 enum spmi_vs_registers { ··· 237 221 #define SPMI_COMMON_MODE_FOLLOW_HW_EN0_MASK 0x01 238 222 #define SPMI_COMMON_MODE_FOLLOW_ALL_MASK 0x1f 239 223 224 + #define SPMI_FTSMPS426_MODE_BYPASS_MASK 3 225 + #define SPMI_FTSMPS426_MODE_RETENTION_MASK 4 226 + #define SPMI_FTSMPS426_MODE_LPM_MASK 5 227 + #define SPMI_FTSMPS426_MODE_AUTO_MASK 6 228 + #define SPMI_FTSMPS426_MODE_HPM_MASK 7 229 + 230 + #define SPMI_FTSMPS426_MODE_MASK 0x07 231 + 240 232 /* Common regulator pull down control register layout */ 241 233 #define SPMI_COMMON_PULL_DOWN_ENABLE_MASK 0x80 242 234 ··· 289 265 */ 290 266 #define SPMI_FTSMPS_STEP_MARGIN_NUM 4 291 267 #define SPMI_FTSMPS_STEP_MARGIN_DEN 5 268 + 269 + #define SPMI_FTSMPS426_STEP_CTRL_DELAY_MASK 0x03 270 + #define SPMI_FTSMPS426_STEP_CTRL_DELAY_SHIFT 0 271 + 272 + /* Clock rate in kHz of the FTSMPS426 regulator reference clock. */ 273 + #define SPMI_FTSMPS426_CLOCK_RATE 4800 274 + 275 + #define SPMI_HFS430_CLOCK_RATE 1600 276 + 277 + /* Minimum voltage stepper delay for each step. */ 278 + #define SPMI_FTSMPS426_STEP_DELAY 2 279 + 280 + /* 281 + * The ratio SPMI_FTSMPS426_STEP_MARGIN_NUM/SPMI_FTSMPS426_STEP_MARGIN_DEN is 282 + * used to adjust the step rate in order to account for oscillator variance. 283 + */ 284 + #define SPMI_FTSMPS426_STEP_MARGIN_NUM 10 285 + #define SPMI_FTSMPS426_STEP_MARGIN_DEN 11 286 + 292 287 293 288 /* VSET value to decide the range of ULT SMPS */ 294 289 #define ULT_SMPS_RANGE_SPLIT 0x60 ··· 482 439 SPMI_VOLTAGE_RANGE(1, 160000, 1360000, 2200000, 2200000, 10000), 483 440 }; 484 441 442 + static struct spmi_voltage_range ftsmps426_ranges[] = { 443 + SPMI_VOLTAGE_RANGE(0, 0, 320000, 1352000, 1352000, 4000), 444 + }; 445 + 485 446 static struct spmi_voltage_range boost_ranges[] = { 486 447 SPMI_VOLTAGE_RANGE(0, 4000000, 4000000, 5550000, 5550000, 50000), 487 448 }; ··· 511 464 SPMI_VOLTAGE_RANGE(0, 1750000, 1750000, 3337500, 3337500, 12500), 512 465 }; 513 466 467 + static struct spmi_voltage_range hfs430_ranges[] = { 468 + SPMI_VOLTAGE_RANGE(0, 320000, 320000, 2040000, 2040000, 8000), 469 + }; 470 + 514 471 static DEFINE_SPMI_SET_POINTS(pldo); 515 472 static DEFINE_SPMI_SET_POINTS(nldo1); 516 473 static DEFINE_SPMI_SET_POINTS(nldo2); ··· 523 472 static DEFINE_SPMI_SET_POINTS(smps); 524 473 static DEFINE_SPMI_SET_POINTS(ftsmps); 525 474 static DEFINE_SPMI_SET_POINTS(ftsmps2p5); 475 + static DEFINE_SPMI_SET_POINTS(ftsmps426); 526 476 static DEFINE_SPMI_SET_POINTS(boost); 527 477 static DEFINE_SPMI_SET_POINTS(boost_byp); 528 478 static DEFINE_SPMI_SET_POINTS(ult_lo_smps); 529 479 static DEFINE_SPMI_SET_POINTS(ult_ho_smps); 530 480 static DEFINE_SPMI_SET_POINTS(ult_nldo); 531 481 static DEFINE_SPMI_SET_POINTS(ult_pldo); 482 + static DEFINE_SPMI_SET_POINTS(hfs430); 532 483 533 484 static inline int spmi_vreg_read(struct spmi_regulator *vreg, u16 addr, u8 *buf, 534 485 int len) ··· 792 739 return spmi_vreg_write(vreg, SPMI_COMMON_REG_VOLTAGE_RANGE, buf, 2); 793 740 } 794 741 742 + static int spmi_regulator_common_list_voltage(struct regulator_dev *rdev, 743 + unsigned selector); 744 + 745 + static int spmi_regulator_ftsmps426_set_voltage(struct regulator_dev *rdev, 746 + unsigned selector) 747 + { 748 + struct spmi_regulator *vreg = rdev_get_drvdata(rdev); 749 + u8 buf[2]; 750 + int mV; 751 + 752 + mV = spmi_regulator_common_list_voltage(rdev, selector) / 1000; 753 + 754 + buf[0] = mV & 0xff; 755 + buf[1] = mV >> 8; 756 + return spmi_vreg_write(vreg, SPMI_FTSMPS426_REG_VOLTAGE_LSB, buf, 2); 757 + } 758 + 795 759 static int spmi_regulator_set_voltage_time_sel(struct regulator_dev *rdev, 796 760 unsigned int old_selector, unsigned int new_selector) 797 761 { 798 762 struct spmi_regulator *vreg = rdev_get_drvdata(rdev); 799 - const struct spmi_voltage_range *range; 800 763 int diff_uV; 801 764 802 - range = spmi_regulator_find_range(vreg); 803 - if (!range) 804 - return -EINVAL; 805 - 806 - diff_uV = abs(new_selector - old_selector) * range->step_uV; 765 + diff_uV = abs(spmi_regulator_common_list_voltage(rdev, new_selector) - 766 + spmi_regulator_common_list_voltage(rdev, old_selector)); 807 767 808 768 return DIV_ROUND_UP(diff_uV, vreg->slew_rate); 809 769 } ··· 834 768 return -EINVAL; 835 769 836 770 return spmi_hw_selector_to_sw(vreg, voltage_sel, range); 771 + } 772 + 773 + static int spmi_regulator_ftsmps426_get_voltage(struct regulator_dev *rdev) 774 + { 775 + struct spmi_regulator *vreg = rdev_get_drvdata(rdev); 776 + const struct spmi_voltage_range *range; 777 + u8 buf[2]; 778 + int uV; 779 + 780 + spmi_vreg_read(vreg, SPMI_FTSMPS426_REG_VOLTAGE_LSB, buf, 2); 781 + 782 + uV = (((unsigned int)buf[1] << 8) | (unsigned int)buf[0]) * 1000; 783 + range = vreg->set_points->range; 784 + 785 + return (uV - range->set_point_min_uV) / range->step_uV; 837 786 } 838 787 839 788 static int spmi_regulator_single_map_voltage(struct regulator_dev *rdev, ··· 984 903 985 904 spmi_vreg_read(vreg, SPMI_COMMON_REG_MODE, &reg, 1); 986 905 987 - if (reg & SPMI_COMMON_MODE_HPM_MASK) 906 + reg &= SPMI_COMMON_MODE_HPM_MASK | SPMI_COMMON_MODE_AUTO_MASK; 907 + 908 + switch (reg) { 909 + case SPMI_COMMON_MODE_HPM_MASK: 988 910 return REGULATOR_MODE_NORMAL; 989 - 990 - if (reg & SPMI_COMMON_MODE_AUTO_MASK) 911 + case SPMI_COMMON_MODE_AUTO_MASK: 991 912 return REGULATOR_MODE_FAST; 913 + default: 914 + return REGULATOR_MODE_IDLE; 915 + } 916 + } 992 917 993 - return REGULATOR_MODE_IDLE; 918 + static unsigned int spmi_regulator_ftsmps426_get_mode(struct regulator_dev *rdev) 919 + { 920 + struct spmi_regulator *vreg = rdev_get_drvdata(rdev); 921 + u8 reg; 922 + 923 + spmi_vreg_read(vreg, SPMI_COMMON_REG_MODE, &reg, 1); 924 + 925 + switch (reg) { 926 + case SPMI_FTSMPS426_MODE_HPM_MASK: 927 + return REGULATOR_MODE_NORMAL; 928 + case SPMI_FTSMPS426_MODE_AUTO_MASK: 929 + return REGULATOR_MODE_FAST; 930 + default: 931 + return REGULATOR_MODE_IDLE; 932 + } 994 933 } 995 934 996 935 static int ··· 1018 917 { 1019 918 struct spmi_regulator *vreg = rdev_get_drvdata(rdev); 1020 919 u8 mask = SPMI_COMMON_MODE_HPM_MASK | SPMI_COMMON_MODE_AUTO_MASK; 1021 - u8 val = 0; 920 + u8 val; 1022 921 1023 - if (mode == REGULATOR_MODE_NORMAL) 922 + switch (mode) { 923 + case REGULATOR_MODE_NORMAL: 1024 924 val = SPMI_COMMON_MODE_HPM_MASK; 1025 - else if (mode == REGULATOR_MODE_FAST) 925 + break; 926 + case REGULATOR_MODE_FAST: 1026 927 val = SPMI_COMMON_MODE_AUTO_MASK; 928 + break; 929 + default: 930 + val = 0; 931 + break; 932 + } 933 + 934 + return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_MODE, val, mask); 935 + } 936 + 937 + static int 938 + spmi_regulator_ftsmps426_set_mode(struct regulator_dev *rdev, unsigned int mode) 939 + { 940 + struct spmi_regulator *vreg = rdev_get_drvdata(rdev); 941 + u8 mask = SPMI_FTSMPS426_MODE_MASK; 942 + u8 val; 943 + 944 + switch (mode) { 945 + case REGULATOR_MODE_NORMAL: 946 + val = SPMI_FTSMPS426_MODE_HPM_MASK; 947 + break; 948 + case REGULATOR_MODE_FAST: 949 + val = SPMI_FTSMPS426_MODE_AUTO_MASK; 950 + break; 951 + case REGULATOR_MODE_IDLE: 952 + val = SPMI_FTSMPS426_MODE_LPM_MASK; 953 + break; 954 + default: 955 + return -EINVAL; 956 + } 1027 957 1028 958 return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_MODE, val, mask); 1029 959 } ··· 1388 1256 .set_soft_start = spmi_regulator_common_set_soft_start, 1389 1257 }; 1390 1258 1259 + static struct regulator_ops spmi_ftsmps426_ops = { 1260 + .enable = regulator_enable_regmap, 1261 + .disable = regulator_disable_regmap, 1262 + .is_enabled = regulator_is_enabled_regmap, 1263 + .set_voltage_sel = spmi_regulator_ftsmps426_set_voltage, 1264 + .set_voltage_time_sel = spmi_regulator_set_voltage_time_sel, 1265 + .get_voltage_sel = spmi_regulator_ftsmps426_get_voltage, 1266 + .map_voltage = spmi_regulator_single_map_voltage, 1267 + .list_voltage = spmi_regulator_common_list_voltage, 1268 + .set_mode = spmi_regulator_ftsmps426_set_mode, 1269 + .get_mode = spmi_regulator_ftsmps426_get_mode, 1270 + .set_load = spmi_regulator_common_set_load, 1271 + .set_pull_down = spmi_regulator_common_set_pull_down, 1272 + }; 1273 + 1274 + static struct regulator_ops spmi_hfs430_ops = { 1275 + .enable = regulator_enable_regmap, 1276 + .disable = regulator_disable_regmap, 1277 + .is_enabled = regulator_is_enabled_regmap, 1278 + .set_voltage_sel = spmi_regulator_ftsmps426_set_voltage, 1279 + .set_voltage_time_sel = spmi_regulator_set_voltage_time_sel, 1280 + .get_voltage_sel = spmi_regulator_ftsmps426_get_voltage, 1281 + .map_voltage = spmi_regulator_single_map_voltage, 1282 + .list_voltage = spmi_regulator_common_list_voltage, 1283 + .set_mode = spmi_regulator_ftsmps426_set_mode, 1284 + .get_mode = spmi_regulator_ftsmps426_get_mode, 1285 + }; 1286 + 1391 1287 /* Maximum possible digital major revision value */ 1392 1288 #define INF 0xFF 1393 1289 1394 1290 static const struct spmi_regulator_mapping supported_regulators[] = { 1395 1291 /* type subtype dig_min dig_max ltype ops setpoints hpm_min */ 1396 1292 SPMI_VREG(BUCK, GP_CTL, 0, INF, SMPS, smps, smps, 100000), 1293 + SPMI_VREG(BUCK, HFS430, 0, INF, HFS430, hfs430, hfs430, 10000), 1397 1294 SPMI_VREG(LDO, N300, 0, INF, LDO, ldo, nldo1, 10000), 1398 1295 SPMI_VREG(LDO, N600, 0, 0, LDO, ldo, nldo2, 10000), 1399 1296 SPMI_VREG(LDO, N1200, 0, 0, LDO, ldo, nldo2, 10000), ··· 1452 1291 SPMI_VREG(BOOST, 5V_BOOST, 0, INF, BOOST, boost, boost, 0), 1453 1292 SPMI_VREG(FTS, FTS_CTL, 0, INF, FTSMPS, ftsmps, ftsmps, 100000), 1454 1293 SPMI_VREG(FTS, FTS2p5_CTL, 0, INF, FTSMPS, ftsmps, ftsmps2p5, 100000), 1294 + SPMI_VREG(FTS, FTS426_CTL, 0, INF, FTSMPS426, ftsmps426, ftsmps426, 100000), 1455 1295 SPMI_VREG(BOOST_BYP, BB_2A, 0, INF, BOOST_BYP, boost, boost_byp, 0), 1456 1296 SPMI_VREG(ULT_BUCK, ULT_HF_CTL1, 0, INF, ULT_LO_SMPS, ult_lo_smps, 1457 1297 ult_lo_smps, 100000), ··· 1583 1421 slew_rate /= 1000 * (step_delay << delay); 1584 1422 slew_rate *= SPMI_FTSMPS_STEP_MARGIN_NUM; 1585 1423 slew_rate /= SPMI_FTSMPS_STEP_MARGIN_DEN; 1424 + 1425 + /* Ensure that the slew rate is greater than 0 */ 1426 + vreg->slew_rate = max(slew_rate, 1); 1427 + 1428 + return ret; 1429 + } 1430 + 1431 + static int spmi_regulator_init_slew_rate_ftsmps426(struct spmi_regulator *vreg, 1432 + int clock_rate) 1433 + { 1434 + int ret; 1435 + u8 reg = 0; 1436 + int delay, slew_rate; 1437 + const struct spmi_voltage_range *range = &vreg->set_points->range[0]; 1438 + 1439 + ret = spmi_vreg_read(vreg, SPMI_COMMON_REG_STEP_CTRL, &reg, 1); 1440 + if (ret) { 1441 + dev_err(vreg->dev, "spmi read failed, ret=%d\n", ret); 1442 + return ret; 1443 + } 1444 + 1445 + delay = reg & SPMI_FTSMPS426_STEP_CTRL_DELAY_MASK; 1446 + delay >>= SPMI_FTSMPS426_STEP_CTRL_DELAY_SHIFT; 1447 + 1448 + /* slew_rate has units of uV/us */ 1449 + slew_rate = clock_rate * range->step_uV; 1450 + slew_rate /= 1000 * (SPMI_FTSMPS426_STEP_DELAY << delay); 1451 + slew_rate *= SPMI_FTSMPS426_STEP_MARGIN_NUM; 1452 + slew_rate /= SPMI_FTSMPS426_STEP_MARGIN_DEN; 1586 1453 1587 1454 /* Ensure that the slew rate is greater than 0 */ 1588 1455 vreg->slew_rate = max(slew_rate, 1); ··· 1758 1567 ret = spmi_regulator_init_slew_rate(vreg); 1759 1568 if (ret) 1760 1569 return ret; 1570 + break; 1571 + case SPMI_REGULATOR_LOGICAL_TYPE_FTSMPS426: 1572 + ret = spmi_regulator_init_slew_rate_ftsmps426(vreg, 1573 + SPMI_FTSMPS426_CLOCK_RATE); 1574 + if (ret) 1575 + return ret; 1576 + break; 1577 + case SPMI_REGULATOR_LOGICAL_TYPE_HFS430: 1578 + ret = spmi_regulator_init_slew_rate_ftsmps426(vreg, 1579 + SPMI_HFS430_CLOCK_RATE); 1580 + if (ret) 1581 + return ret; 1582 + break; 1761 1583 default: 1762 1584 break; 1763 1585 } ··· 1927 1723 { } 1928 1724 }; 1929 1725 1726 + static const struct spmi_regulator_data pm8005_regulators[] = { 1727 + { "s1", 0x1400, "vdd_s1", }, 1728 + { "s2", 0x1700, "vdd_s2", }, 1729 + { "s3", 0x1a00, "vdd_s3", }, 1730 + { "s4", 0x1d00, "vdd_s4", }, 1731 + { } 1732 + }; 1733 + 1734 + static const struct spmi_regulator_data pms405_regulators[] = { 1735 + { "s3", 0x1a00, "vdd_s3"}, 1736 + { } 1737 + }; 1738 + 1930 1739 static const struct of_device_id qcom_spmi_regulator_match[] = { 1740 + { .compatible = "qcom,pm8005-regulators", .data = &pm8005_regulators }, 1931 1741 { .compatible = "qcom,pm8841-regulators", .data = &pm8841_regulators }, 1932 1742 { .compatible = "qcom,pm8916-regulators", .data = &pm8916_regulators }, 1933 1743 { .compatible = "qcom,pm8941-regulators", .data = &pm8941_regulators }, 1934 1744 { .compatible = "qcom,pm8994-regulators", .data = &pm8994_regulators }, 1935 1745 { .compatible = "qcom,pmi8994-regulators", .data = &pmi8994_regulators }, 1746 + { .compatible = "qcom,pms405-regulators", .data = &pms405_regulators }, 1936 1747 { } 1937 1748 }; 1938 1749 MODULE_DEVICE_TABLE(of, qcom_spmi_regulator_match); ··· 1955 1736 static int qcom_spmi_regulator_probe(struct platform_device *pdev) 1956 1737 { 1957 1738 const struct spmi_regulator_data *reg; 1739 + const struct spmi_voltage_range *range; 1958 1740 const struct of_device_id *match; 1959 1741 struct regulator_config config = { }; 1960 1742 struct regulator_dev *rdev; ··· 2043 1823 spmi_regulator_saw_set_voltage; 2044 1824 vreg->desc.ops = &spmi_saw_ops; 2045 1825 } 1826 + } 1827 + 1828 + if (vreg->set_points && vreg->set_points->count == 1) { 1829 + /* since there is only one range */ 1830 + range = vreg->set_points->range; 1831 + vreg->desc.uV_step = range->step_uV; 2046 1832 } 2047 1833 2048 1834 config.dev = dev;
+126 -101
drivers/regulator/s2mps11.c
··· 34 34 enum sec_device_type dev_type; 35 35 36 36 /* 37 - * One bit for each S2MPS13/S2MPS14/S2MPU02 regulator whether 37 + * One bit for each S2MPS11/S2MPS13/S2MPS14/S2MPU02 regulator whether 38 38 * the suspend mode was enabled. 39 39 */ 40 40 DECLARE_BITMAP(suspend_state, S2MPS_REGULATOR_MAX); ··· 70 70 unsigned int new_selector) 71 71 { 72 72 struct s2mps11_info *s2mps11 = rdev_get_drvdata(rdev); 73 + int rdev_id = rdev_get_id(rdev); 73 74 unsigned int ramp_delay = 0; 74 75 int old_volt, new_volt; 75 76 76 - switch (rdev_get_id(rdev)) { 77 + switch (rdev_id) { 77 78 case S2MPS11_BUCK2: 78 79 ramp_delay = s2mps11->ramp_delay2; 79 80 break; ··· 112 111 struct s2mps11_info *s2mps11 = rdev_get_drvdata(rdev); 113 112 unsigned int ramp_val, ramp_shift, ramp_reg = S2MPS11_REG_RAMP_BUCK; 114 113 unsigned int ramp_enable = 1, enable_shift = 0; 114 + int rdev_id = rdev_get_id(rdev); 115 115 int ret; 116 116 117 - switch (rdev_get_id(rdev)) { 117 + switch (rdev_id) { 118 118 case S2MPS11_BUCK1: 119 119 if (ramp_delay > s2mps11->ramp_delay16) 120 120 s2mps11->ramp_delay16 = ramp_delay; ··· 205 203 goto ramp_disable; 206 204 207 205 /* Ramp delay can be enabled/disabled only for buck[2346] */ 208 - if ((rdev_get_id(rdev) >= S2MPS11_BUCK2 && 209 - rdev_get_id(rdev) <= S2MPS11_BUCK4) || 210 - rdev_get_id(rdev) == S2MPS11_BUCK6) { 206 + if ((rdev_id >= S2MPS11_BUCK2 && rdev_id <= S2MPS11_BUCK4) || 207 + rdev_id == S2MPS11_BUCK6) { 211 208 ret = regmap_update_bits(rdev->regmap, S2MPS11_REG_RAMP, 212 209 1 << enable_shift, 1 << enable_shift); 213 210 if (ret) { ··· 225 224 1 << enable_shift, 0); 226 225 } 227 226 227 + static int s2mps11_regulator_enable(struct regulator_dev *rdev) 228 + { 229 + struct s2mps11_info *s2mps11 = rdev_get_drvdata(rdev); 230 + int rdev_id = rdev_get_id(rdev); 231 + unsigned int val; 232 + 233 + switch (s2mps11->dev_type) { 234 + case S2MPS11X: 235 + if (test_bit(rdev_id, s2mps11->suspend_state)) 236 + val = S2MPS14_ENABLE_SUSPEND; 237 + else 238 + val = rdev->desc->enable_mask; 239 + break; 240 + case S2MPS13X: 241 + case S2MPS14X: 242 + if (test_bit(rdev_id, s2mps11->suspend_state)) 243 + val = S2MPS14_ENABLE_SUSPEND; 244 + else if (s2mps11->ext_control_gpiod[rdev_id]) 245 + val = S2MPS14_ENABLE_EXT_CONTROL; 246 + else 247 + val = rdev->desc->enable_mask; 248 + break; 249 + case S2MPU02: 250 + if (test_bit(rdev_id, s2mps11->suspend_state)) 251 + val = S2MPU02_ENABLE_SUSPEND; 252 + else 253 + val = rdev->desc->enable_mask; 254 + break; 255 + default: 256 + return -EINVAL; 257 + } 258 + 259 + return regmap_update_bits(rdev->regmap, rdev->desc->enable_reg, 260 + rdev->desc->enable_mask, val); 261 + } 262 + 263 + static int s2mps11_regulator_set_suspend_disable(struct regulator_dev *rdev) 264 + { 265 + int ret; 266 + unsigned int val, state; 267 + struct s2mps11_info *s2mps11 = rdev_get_drvdata(rdev); 268 + int rdev_id = rdev_get_id(rdev); 269 + 270 + /* Below LDO should be always on or does not support suspend mode. */ 271 + switch (s2mps11->dev_type) { 272 + case S2MPS11X: 273 + switch (rdev_id) { 274 + case S2MPS11_LDO2: 275 + case S2MPS11_LDO36: 276 + case S2MPS11_LDO37: 277 + case S2MPS11_LDO38: 278 + return 0; 279 + default: 280 + state = S2MPS14_ENABLE_SUSPEND; 281 + break; 282 + } 283 + break; 284 + case S2MPS13X: 285 + case S2MPS14X: 286 + switch (rdev_id) { 287 + case S2MPS14_LDO3: 288 + return 0; 289 + default: 290 + state = S2MPS14_ENABLE_SUSPEND; 291 + break; 292 + } 293 + break; 294 + case S2MPU02: 295 + switch (rdev_id) { 296 + case S2MPU02_LDO13: 297 + case S2MPU02_LDO14: 298 + case S2MPU02_LDO15: 299 + case S2MPU02_LDO17: 300 + case S2MPU02_BUCK7: 301 + state = S2MPU02_DISABLE_SUSPEND; 302 + break; 303 + default: 304 + state = S2MPU02_ENABLE_SUSPEND; 305 + break; 306 + } 307 + break; 308 + default: 309 + return -EINVAL; 310 + } 311 + 312 + ret = regmap_read(rdev->regmap, rdev->desc->enable_reg, &val); 313 + if (ret < 0) 314 + return ret; 315 + 316 + set_bit(rdev_id, s2mps11->suspend_state); 317 + /* 318 + * Don't enable suspend mode if regulator is already disabled because 319 + * this would effectively for a short time turn on the regulator after 320 + * resuming. 321 + * However we still want to toggle the suspend_state bit for regulator 322 + * in case if it got enabled before suspending the system. 323 + */ 324 + if (!(val & rdev->desc->enable_mask)) 325 + return 0; 326 + 327 + return regmap_update_bits(rdev->regmap, rdev->desc->enable_reg, 328 + rdev->desc->enable_mask, state); 329 + } 330 + 228 331 static const struct regulator_ops s2mps11_ldo_ops = { 229 332 .list_voltage = regulator_list_voltage_linear, 230 333 .map_voltage = regulator_map_voltage_linear, 231 334 .is_enabled = regulator_is_enabled_regmap, 232 - .enable = regulator_enable_regmap, 335 + .enable = s2mps11_regulator_enable, 233 336 .disable = regulator_disable_regmap, 234 337 .get_voltage_sel = regulator_get_voltage_sel_regmap, 235 338 .set_voltage_sel = regulator_set_voltage_sel_regmap, 236 339 .set_voltage_time_sel = regulator_set_voltage_time_sel, 340 + .set_suspend_disable = s2mps11_regulator_set_suspend_disable, 237 341 }; 238 342 239 343 static const struct regulator_ops s2mps11_buck_ops = { 240 344 .list_voltage = regulator_list_voltage_linear, 241 345 .map_voltage = regulator_map_voltage_linear, 242 346 .is_enabled = regulator_is_enabled_regmap, 243 - .enable = regulator_enable_regmap, 347 + .enable = s2mps11_regulator_enable, 244 348 .disable = regulator_disable_regmap, 245 349 .get_voltage_sel = regulator_get_voltage_sel_regmap, 246 350 .set_voltage_sel = regulator_set_voltage_sel_regmap, 247 351 .set_voltage_time_sel = s2mps11_regulator_set_voltage_time_sel, 248 352 .set_ramp_delay = s2mps11_set_ramp_delay, 353 + .set_suspend_disable = s2mps11_regulator_set_suspend_disable, 249 354 }; 250 355 251 356 #define regulator_desc_s2mps11_ldo(num, step) { \ ··· 614 507 regulator_desc_s2mps13_buck8_10(10, MIN_500_MV, STEP_6_25_MV, 0x10), 615 508 }; 616 509 617 - static int s2mps14_regulator_enable(struct regulator_dev *rdev) 618 - { 619 - struct s2mps11_info *s2mps11 = rdev_get_drvdata(rdev); 620 - unsigned int val; 621 - 622 - switch (s2mps11->dev_type) { 623 - case S2MPS13X: 624 - case S2MPS14X: 625 - if (test_bit(rdev_get_id(rdev), s2mps11->suspend_state)) 626 - val = S2MPS14_ENABLE_SUSPEND; 627 - else if (s2mps11->ext_control_gpiod[rdev_get_id(rdev)]) 628 - val = S2MPS14_ENABLE_EXT_CONTROL; 629 - else 630 - val = rdev->desc->enable_mask; 631 - break; 632 - case S2MPU02: 633 - if (test_bit(rdev_get_id(rdev), s2mps11->suspend_state)) 634 - val = S2MPU02_ENABLE_SUSPEND; 635 - else 636 - val = rdev->desc->enable_mask; 637 - break; 638 - default: 639 - return -EINVAL; 640 - } 641 - 642 - return regmap_update_bits(rdev->regmap, rdev->desc->enable_reg, 643 - rdev->desc->enable_mask, val); 644 - } 645 - 646 - static int s2mps14_regulator_set_suspend_disable(struct regulator_dev *rdev) 647 - { 648 - int ret; 649 - unsigned int val, state; 650 - struct s2mps11_info *s2mps11 = rdev_get_drvdata(rdev); 651 - int rdev_id = rdev_get_id(rdev); 652 - 653 - /* Below LDO should be always on or does not support suspend mode. */ 654 - switch (s2mps11->dev_type) { 655 - case S2MPS13X: 656 - case S2MPS14X: 657 - switch (rdev_id) { 658 - case S2MPS14_LDO3: 659 - return 0; 660 - default: 661 - state = S2MPS14_ENABLE_SUSPEND; 662 - break; 663 - } 664 - break; 665 - case S2MPU02: 666 - switch (rdev_id) { 667 - case S2MPU02_LDO13: 668 - case S2MPU02_LDO14: 669 - case S2MPU02_LDO15: 670 - case S2MPU02_LDO17: 671 - case S2MPU02_BUCK7: 672 - state = S2MPU02_DISABLE_SUSPEND; 673 - break; 674 - default: 675 - state = S2MPU02_ENABLE_SUSPEND; 676 - break; 677 - } 678 - break; 679 - default: 680 - return -EINVAL; 681 - } 682 - 683 - ret = regmap_read(rdev->regmap, rdev->desc->enable_reg, &val); 684 - if (ret < 0) 685 - return ret; 686 - 687 - set_bit(rdev_get_id(rdev), s2mps11->suspend_state); 688 - /* 689 - * Don't enable suspend mode if regulator is already disabled because 690 - * this would effectively for a short time turn on the regulator after 691 - * resuming. 692 - * However we still want to toggle the suspend_state bit for regulator 693 - * in case if it got enabled before suspending the system. 694 - */ 695 - if (!(val & rdev->desc->enable_mask)) 696 - return 0; 697 - 698 - return regmap_update_bits(rdev->regmap, rdev->desc->enable_reg, 699 - rdev->desc->enable_mask, state); 700 - } 701 - 702 510 static const struct regulator_ops s2mps14_reg_ops = { 703 511 .list_voltage = regulator_list_voltage_linear, 704 512 .map_voltage = regulator_map_voltage_linear, 705 513 .is_enabled = regulator_is_enabled_regmap, 706 - .enable = s2mps14_regulator_enable, 514 + .enable = s2mps11_regulator_enable, 707 515 .disable = regulator_disable_regmap, 708 516 .get_voltage_sel = regulator_get_voltage_sel_regmap, 709 517 .set_voltage_sel = regulator_set_voltage_sel_regmap, 710 518 .set_voltage_time_sel = regulator_set_voltage_time_sel, 711 - .set_suspend_disable = s2mps14_regulator_set_suspend_disable, 519 + .set_suspend_disable = s2mps11_regulator_set_suspend_disable, 712 520 }; 713 521 714 522 #define regulator_desc_s2mps14_ldo(num, min, step) { \ ··· 850 828 0, 851 829 GPIOD_OUT_HIGH | GPIOD_FLAGS_BIT_NONEXCLUSIVE, 852 830 "s2mps11-regulator"); 853 - if (IS_ERR(gpio[reg])) { 831 + if (PTR_ERR(gpio[reg]) == -ENOENT) 832 + gpio[reg] = NULL; 833 + else if (IS_ERR(gpio[reg])) { 854 834 dev_err(&pdev->dev, "Failed to get control GPIO for %d/%s\n", 855 835 reg, rdata[reg].name); 856 836 gpio[reg] = NULL; ··· 888 864 static int s2mpu02_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay) 889 865 { 890 866 unsigned int ramp_val, ramp_shift, ramp_reg; 867 + int rdev_id = rdev_get_id(rdev); 891 868 892 - switch (rdev_get_id(rdev)) { 869 + switch (rdev_id) { 893 870 case S2MPU02_BUCK1: 894 871 ramp_shift = S2MPU02_BUCK1_RAMP_SHIFT; 895 872 break; ··· 918 893 .list_voltage = regulator_list_voltage_linear, 919 894 .map_voltage = regulator_map_voltage_linear, 920 895 .is_enabled = regulator_is_enabled_regmap, 921 - .enable = s2mps14_regulator_enable, 896 + .enable = s2mps11_regulator_enable, 922 897 .disable = regulator_disable_regmap, 923 898 .get_voltage_sel = regulator_get_voltage_sel_regmap, 924 899 .set_voltage_sel = regulator_set_voltage_sel_regmap, 925 900 .set_voltage_time_sel = regulator_set_voltage_time_sel, 926 - .set_suspend_disable = s2mps14_regulator_set_suspend_disable, 901 + .set_suspend_disable = s2mps11_regulator_set_suspend_disable, 927 902 }; 928 903 929 904 static const struct regulator_ops s2mpu02_buck_ops = { 930 905 .list_voltage = regulator_list_voltage_linear, 931 906 .map_voltage = regulator_map_voltage_linear, 932 907 .is_enabled = regulator_is_enabled_regmap, 933 - .enable = s2mps14_regulator_enable, 908 + .enable = s2mps11_regulator_enable, 934 909 .disable = regulator_disable_regmap, 935 910 .get_voltage_sel = regulator_get_voltage_sel_regmap, 936 911 .set_voltage_sel = regulator_set_voltage_sel_regmap, 937 912 .set_voltage_time_sel = regulator_set_voltage_time_sel, 938 - .set_suspend_disable = s2mps14_regulator_set_suspend_disable, 913 + .set_suspend_disable = s2mps11_regulator_set_suspend_disable, 939 914 .set_ramp_delay = s2mpu02_set_ramp_delay, 940 915 }; 941 916
+3 -1
drivers/regulator/s5m8767.c
··· 574 574 0, 575 575 GPIOD_OUT_HIGH | GPIOD_FLAGS_BIT_NONEXCLUSIVE, 576 576 "s5m8767"); 577 - if (IS_ERR(rdata->ext_control_gpiod)) 577 + if (PTR_ERR(rdata->ext_control_gpiod) == -ENOENT) 578 + rdata->ext_control_gpiod = NULL; 579 + else if (IS_ERR(rdata->ext_control_gpiod)) 578 580 return PTR_ERR(rdata->ext_control_gpiod); 579 581 580 582 rdata->id = i;
+523
drivers/regulator/slg51000-regulator.c
··· 1 + // SPDX-License-Identifier: GPL-2.0+ 2 + // 3 + // SLG51000 High PSRR, Multi-Output Regulators 4 + // Copyright (C) 2019 Dialog Semiconductor 5 + // 6 + // Author: Eric Jeong <eric.jeong.opensource@diasemi.com> 7 + 8 + #include <linux/err.h> 9 + #include <linux/gpio/consumer.h> 10 + #include <linux/i2c.h> 11 + #include <linux/init.h> 12 + #include <linux/interrupt.h> 13 + #include <linux/irq.h> 14 + #include <linux/module.h> 15 + #include <linux/of.h> 16 + #include <linux/regmap.h> 17 + #include <linux/regulator/driver.h> 18 + #include <linux/regulator/machine.h> 19 + #include <linux/regulator/of_regulator.h> 20 + #include "slg51000-regulator.h" 21 + 22 + #define SLG51000_SCTL_EVT 7 23 + #define SLG51000_MAX_EVT_REGISTER 8 24 + #define SLG51000_LDOHP_LV_MIN 1200000 25 + #define SLG51000_LDOHP_HV_MIN 2400000 26 + 27 + enum slg51000_regulators { 28 + SLG51000_REGULATOR_LDO1 = 0, 29 + SLG51000_REGULATOR_LDO2, 30 + SLG51000_REGULATOR_LDO3, 31 + SLG51000_REGULATOR_LDO4, 32 + SLG51000_REGULATOR_LDO5, 33 + SLG51000_REGULATOR_LDO6, 34 + SLG51000_REGULATOR_LDO7, 35 + SLG51000_MAX_REGULATORS, 36 + }; 37 + 38 + struct slg51000 { 39 + struct device *dev; 40 + struct regmap *regmap; 41 + struct regulator_desc *rdesc[SLG51000_MAX_REGULATORS]; 42 + struct regulator_dev *rdev[SLG51000_MAX_REGULATORS]; 43 + struct gpio_desc *cs_gpiod; 44 + int chip_irq; 45 + }; 46 + 47 + struct slg51000_evt_sta { 48 + unsigned int ereg; 49 + unsigned int sreg; 50 + }; 51 + 52 + static const struct slg51000_evt_sta es_reg[SLG51000_MAX_EVT_REGISTER] = { 53 + {SLG51000_LDO1_EVENT, SLG51000_LDO1_STATUS}, 54 + {SLG51000_LDO2_EVENT, SLG51000_LDO2_STATUS}, 55 + {SLG51000_LDO3_EVENT, SLG51000_LDO3_STATUS}, 56 + {SLG51000_LDO4_EVENT, SLG51000_LDO4_STATUS}, 57 + {SLG51000_LDO5_EVENT, SLG51000_LDO5_STATUS}, 58 + {SLG51000_LDO6_EVENT, SLG51000_LDO6_STATUS}, 59 + {SLG51000_LDO7_EVENT, SLG51000_LDO7_STATUS}, 60 + {SLG51000_SYSCTL_EVENT, SLG51000_SYSCTL_STATUS}, 61 + }; 62 + 63 + static const struct regmap_range slg51000_writeable_ranges[] = { 64 + regmap_reg_range(SLG51000_SYSCTL_MATRIX_CONF_A, 65 + SLG51000_SYSCTL_MATRIX_CONF_A), 66 + regmap_reg_range(SLG51000_LDO1_VSEL, SLG51000_LDO1_VSEL), 67 + regmap_reg_range(SLG51000_LDO1_MINV, SLG51000_LDO1_MAXV), 68 + regmap_reg_range(SLG51000_LDO1_IRQ_MASK, SLG51000_LDO1_IRQ_MASK), 69 + regmap_reg_range(SLG51000_LDO2_VSEL, SLG51000_LDO2_VSEL), 70 + regmap_reg_range(SLG51000_LDO2_MINV, SLG51000_LDO2_MAXV), 71 + regmap_reg_range(SLG51000_LDO2_IRQ_MASK, SLG51000_LDO2_IRQ_MASK), 72 + regmap_reg_range(SLG51000_LDO3_VSEL, SLG51000_LDO3_VSEL), 73 + regmap_reg_range(SLG51000_LDO3_MINV, SLG51000_LDO3_MAXV), 74 + regmap_reg_range(SLG51000_LDO3_IRQ_MASK, SLG51000_LDO3_IRQ_MASK), 75 + regmap_reg_range(SLG51000_LDO4_VSEL, SLG51000_LDO4_VSEL), 76 + regmap_reg_range(SLG51000_LDO4_MINV, SLG51000_LDO4_MAXV), 77 + regmap_reg_range(SLG51000_LDO4_IRQ_MASK, SLG51000_LDO4_IRQ_MASK), 78 + regmap_reg_range(SLG51000_LDO5_VSEL, SLG51000_LDO5_VSEL), 79 + regmap_reg_range(SLG51000_LDO5_MINV, SLG51000_LDO5_MAXV), 80 + regmap_reg_range(SLG51000_LDO5_IRQ_MASK, SLG51000_LDO5_IRQ_MASK), 81 + regmap_reg_range(SLG51000_LDO6_VSEL, SLG51000_LDO6_VSEL), 82 + regmap_reg_range(SLG51000_LDO6_MINV, SLG51000_LDO6_MAXV), 83 + regmap_reg_range(SLG51000_LDO6_IRQ_MASK, SLG51000_LDO6_IRQ_MASK), 84 + regmap_reg_range(SLG51000_LDO7_VSEL, SLG51000_LDO7_VSEL), 85 + regmap_reg_range(SLG51000_LDO7_MINV, SLG51000_LDO7_MAXV), 86 + regmap_reg_range(SLG51000_LDO7_IRQ_MASK, SLG51000_LDO7_IRQ_MASK), 87 + regmap_reg_range(SLG51000_OTP_IRQ_MASK, SLG51000_OTP_IRQ_MASK), 88 + }; 89 + 90 + static const struct regmap_range slg51000_readable_ranges[] = { 91 + regmap_reg_range(SLG51000_SYSCTL_PATN_ID_B0, 92 + SLG51000_SYSCTL_PATN_ID_B2), 93 + regmap_reg_range(SLG51000_SYSCTL_SYS_CONF_A, 94 + SLG51000_SYSCTL_SYS_CONF_A), 95 + regmap_reg_range(SLG51000_SYSCTL_SYS_CONF_D, 96 + SLG51000_SYSCTL_MATRIX_CONF_B), 97 + regmap_reg_range(SLG51000_SYSCTL_REFGEN_CONF_C, 98 + SLG51000_SYSCTL_UVLO_CONF_A), 99 + regmap_reg_range(SLG51000_SYSCTL_FAULT_LOG1, SLG51000_SYSCTL_IRQ_MASK), 100 + regmap_reg_range(SLG51000_IO_GPIO1_CONF, SLG51000_IO_GPIO_STATUS), 101 + regmap_reg_range(SLG51000_LUTARRAY_LUT_VAL_0, 102 + SLG51000_LUTARRAY_LUT_VAL_11), 103 + regmap_reg_range(SLG51000_MUXARRAY_INPUT_SEL_0, 104 + SLG51000_MUXARRAY_INPUT_SEL_63), 105 + regmap_reg_range(SLG51000_PWRSEQ_RESOURCE_EN_0, 106 + SLG51000_PWRSEQ_INPUT_SENSE_CONF_B), 107 + regmap_reg_range(SLG51000_LDO1_VSEL, SLG51000_LDO1_VSEL), 108 + regmap_reg_range(SLG51000_LDO1_MINV, SLG51000_LDO1_MAXV), 109 + regmap_reg_range(SLG51000_LDO1_MISC1, SLG51000_LDO1_VSEL_ACTUAL), 110 + regmap_reg_range(SLG51000_LDO1_EVENT, SLG51000_LDO1_IRQ_MASK), 111 + regmap_reg_range(SLG51000_LDO2_VSEL, SLG51000_LDO2_VSEL), 112 + regmap_reg_range(SLG51000_LDO2_MINV, SLG51000_LDO2_MAXV), 113 + regmap_reg_range(SLG51000_LDO2_MISC1, SLG51000_LDO2_VSEL_ACTUAL), 114 + regmap_reg_range(SLG51000_LDO2_EVENT, SLG51000_LDO2_IRQ_MASK), 115 + regmap_reg_range(SLG51000_LDO3_VSEL, SLG51000_LDO3_VSEL), 116 + regmap_reg_range(SLG51000_LDO3_MINV, SLG51000_LDO3_MAXV), 117 + regmap_reg_range(SLG51000_LDO3_CONF1, SLG51000_LDO3_VSEL_ACTUAL), 118 + regmap_reg_range(SLG51000_LDO3_EVENT, SLG51000_LDO3_IRQ_MASK), 119 + regmap_reg_range(SLG51000_LDO4_VSEL, SLG51000_LDO4_VSEL), 120 + regmap_reg_range(SLG51000_LDO4_MINV, SLG51000_LDO4_MAXV), 121 + regmap_reg_range(SLG51000_LDO4_CONF1, SLG51000_LDO4_VSEL_ACTUAL), 122 + regmap_reg_range(SLG51000_LDO4_EVENT, SLG51000_LDO4_IRQ_MASK), 123 + regmap_reg_range(SLG51000_LDO5_VSEL, SLG51000_LDO5_VSEL), 124 + regmap_reg_range(SLG51000_LDO5_MINV, SLG51000_LDO5_MAXV), 125 + regmap_reg_range(SLG51000_LDO5_TRIM2, SLG51000_LDO5_TRIM2), 126 + regmap_reg_range(SLG51000_LDO5_CONF1, SLG51000_LDO5_VSEL_ACTUAL), 127 + regmap_reg_range(SLG51000_LDO5_EVENT, SLG51000_LDO5_IRQ_MASK), 128 + regmap_reg_range(SLG51000_LDO6_VSEL, SLG51000_LDO6_VSEL), 129 + regmap_reg_range(SLG51000_LDO6_MINV, SLG51000_LDO6_MAXV), 130 + regmap_reg_range(SLG51000_LDO6_TRIM2, SLG51000_LDO6_TRIM2), 131 + regmap_reg_range(SLG51000_LDO6_CONF1, SLG51000_LDO6_VSEL_ACTUAL), 132 + regmap_reg_range(SLG51000_LDO6_EVENT, SLG51000_LDO6_IRQ_MASK), 133 + regmap_reg_range(SLG51000_LDO7_VSEL, SLG51000_LDO7_VSEL), 134 + regmap_reg_range(SLG51000_LDO7_MINV, SLG51000_LDO7_MAXV), 135 + regmap_reg_range(SLG51000_LDO7_CONF1, SLG51000_LDO7_VSEL_ACTUAL), 136 + regmap_reg_range(SLG51000_LDO7_EVENT, SLG51000_LDO7_IRQ_MASK), 137 + regmap_reg_range(SLG51000_OTP_EVENT, SLG51000_OTP_EVENT), 138 + regmap_reg_range(SLG51000_OTP_IRQ_MASK, SLG51000_OTP_IRQ_MASK), 139 + regmap_reg_range(SLG51000_OTP_LOCK_OTP_PROG, SLG51000_OTP_LOCK_CTRL), 140 + regmap_reg_range(SLG51000_LOCK_GLOBAL_LOCK_CTRL1, 141 + SLG51000_LOCK_GLOBAL_LOCK_CTRL1), 142 + }; 143 + 144 + static const struct regmap_range slg51000_volatile_ranges[] = { 145 + regmap_reg_range(SLG51000_SYSCTL_FAULT_LOG1, SLG51000_SYSCTL_STATUS), 146 + regmap_reg_range(SLG51000_IO_GPIO_STATUS, SLG51000_IO_GPIO_STATUS), 147 + regmap_reg_range(SLG51000_LDO1_EVENT, SLG51000_LDO1_STATUS), 148 + regmap_reg_range(SLG51000_LDO2_EVENT, SLG51000_LDO2_STATUS), 149 + regmap_reg_range(SLG51000_LDO3_EVENT, SLG51000_LDO3_STATUS), 150 + regmap_reg_range(SLG51000_LDO4_EVENT, SLG51000_LDO4_STATUS), 151 + regmap_reg_range(SLG51000_LDO5_EVENT, SLG51000_LDO5_STATUS), 152 + regmap_reg_range(SLG51000_LDO6_EVENT, SLG51000_LDO6_STATUS), 153 + regmap_reg_range(SLG51000_LDO7_EVENT, SLG51000_LDO7_STATUS), 154 + regmap_reg_range(SLG51000_OTP_EVENT, SLG51000_OTP_EVENT), 155 + }; 156 + 157 + static const struct regmap_access_table slg51000_writeable_table = { 158 + .yes_ranges = slg51000_writeable_ranges, 159 + .n_yes_ranges = ARRAY_SIZE(slg51000_writeable_ranges), 160 + }; 161 + 162 + static const struct regmap_access_table slg51000_readable_table = { 163 + .yes_ranges = slg51000_readable_ranges, 164 + .n_yes_ranges = ARRAY_SIZE(slg51000_readable_ranges), 165 + }; 166 + 167 + static const struct regmap_access_table slg51000_volatile_table = { 168 + .yes_ranges = slg51000_volatile_ranges, 169 + .n_yes_ranges = ARRAY_SIZE(slg51000_volatile_ranges), 170 + }; 171 + 172 + static const struct regmap_config slg51000_regmap_config = { 173 + .reg_bits = 16, 174 + .val_bits = 8, 175 + .max_register = 0x8000, 176 + .wr_table = &slg51000_writeable_table, 177 + .rd_table = &slg51000_readable_table, 178 + .volatile_table = &slg51000_volatile_table, 179 + }; 180 + 181 + static const struct regulator_ops slg51000_regl_ops = { 182 + .enable = regulator_enable_regmap, 183 + .disable = regulator_disable_regmap, 184 + .is_enabled = regulator_is_enabled_regmap, 185 + .list_voltage = regulator_list_voltage_linear, 186 + .map_voltage = regulator_map_voltage_linear, 187 + .get_voltage_sel = regulator_get_voltage_sel_regmap, 188 + .set_voltage_sel = regulator_set_voltage_sel_regmap, 189 + }; 190 + 191 + static const struct regulator_ops slg51000_switch_ops = { 192 + .enable = regulator_enable_regmap, 193 + .disable = regulator_disable_regmap, 194 + .is_enabled = regulator_is_enabled_regmap, 195 + }; 196 + 197 + static int slg51000_of_parse_cb(struct device_node *np, 198 + const struct regulator_desc *desc, 199 + struct regulator_config *config) 200 + { 201 + struct slg51000 *chip = config->driver_data; 202 + struct gpio_desc *ena_gpiod; 203 + enum gpiod_flags gflags = GPIOD_OUT_LOW | GPIOD_FLAGS_BIT_NONEXCLUSIVE; 204 + 205 + ena_gpiod = devm_gpiod_get_from_of_node(chip->dev, np, 206 + "enable-gpios", 0, 207 + gflags, "gpio-en-ldo"); 208 + if (ena_gpiod) { 209 + config->ena_gpiod = ena_gpiod; 210 + devm_gpiod_unhinge(chip->dev, config->ena_gpiod); 211 + } 212 + 213 + return 0; 214 + } 215 + 216 + #define SLG51000_REGL_DESC(_id, _name, _s_name, _min, _step) \ 217 + [SLG51000_REGULATOR_##_id] = { \ 218 + .name = #_name, \ 219 + .supply_name = _s_name, \ 220 + .id = SLG51000_REGULATOR_##_id, \ 221 + .of_match = of_match_ptr(#_name), \ 222 + .of_parse_cb = slg51000_of_parse_cb, \ 223 + .ops = &slg51000_regl_ops, \ 224 + .regulators_node = of_match_ptr("regulators"), \ 225 + .n_voltages = 256, \ 226 + .min_uV = _min, \ 227 + .uV_step = _step, \ 228 + .linear_min_sel = 0, \ 229 + .vsel_mask = SLG51000_VSEL_MASK, \ 230 + .vsel_reg = SLG51000_##_id##_VSEL, \ 231 + .enable_reg = SLG51000_SYSCTL_MATRIX_CONF_A, \ 232 + .enable_mask = BIT(SLG51000_REGULATOR_##_id), \ 233 + .type = REGULATOR_VOLTAGE, \ 234 + .owner = THIS_MODULE, \ 235 + } 236 + 237 + static struct regulator_desc regls_desc[SLG51000_MAX_REGULATORS] = { 238 + SLG51000_REGL_DESC(LDO1, ldo1, NULL, 2400000, 5000), 239 + SLG51000_REGL_DESC(LDO2, ldo2, NULL, 2400000, 5000), 240 + SLG51000_REGL_DESC(LDO3, ldo3, "vin3", 1200000, 10000), 241 + SLG51000_REGL_DESC(LDO4, ldo4, "vin4", 1200000, 10000), 242 + SLG51000_REGL_DESC(LDO5, ldo5, "vin5", 400000, 5000), 243 + SLG51000_REGL_DESC(LDO6, ldo6, "vin6", 400000, 5000), 244 + SLG51000_REGL_DESC(LDO7, ldo7, "vin7", 1200000, 10000), 245 + }; 246 + 247 + static int slg51000_regulator_init(struct slg51000 *chip) 248 + { 249 + struct regulator_config config = { }; 250 + struct regulator_desc *rdesc; 251 + unsigned int reg, val; 252 + u8 vsel_range[2]; 253 + int id, ret = 0; 254 + const unsigned int min_regs[SLG51000_MAX_REGULATORS] = { 255 + SLG51000_LDO1_MINV, SLG51000_LDO2_MINV, SLG51000_LDO3_MINV, 256 + SLG51000_LDO4_MINV, SLG51000_LDO5_MINV, SLG51000_LDO6_MINV, 257 + SLG51000_LDO7_MINV, 258 + }; 259 + 260 + for (id = 0; id < SLG51000_MAX_REGULATORS; id++) { 261 + chip->rdesc[id] = &regls_desc[id]; 262 + rdesc = chip->rdesc[id]; 263 + config.regmap = chip->regmap; 264 + config.dev = chip->dev; 265 + config.driver_data = chip; 266 + 267 + ret = regmap_bulk_read(chip->regmap, min_regs[id], 268 + vsel_range, 2); 269 + if (ret < 0) { 270 + dev_err(chip->dev, 271 + "Failed to read the MIN register\n"); 272 + return ret; 273 + } 274 + 275 + switch (id) { 276 + case SLG51000_REGULATOR_LDO1: 277 + case SLG51000_REGULATOR_LDO2: 278 + if (id == SLG51000_REGULATOR_LDO1) 279 + reg = SLG51000_LDO1_MISC1; 280 + else 281 + reg = SLG51000_LDO2_MISC1; 282 + 283 + ret = regmap_read(chip->regmap, reg, &val); 284 + if (ret < 0) { 285 + dev_err(chip->dev, 286 + "Failed to read voltage range of ldo%d\n", 287 + id + 1); 288 + return ret; 289 + } 290 + 291 + rdesc->linear_min_sel = vsel_range[0]; 292 + rdesc->n_voltages = vsel_range[1] + 1; 293 + if (val & SLG51000_SEL_VRANGE_MASK) 294 + rdesc->min_uV = SLG51000_LDOHP_HV_MIN 295 + + (vsel_range[0] 296 + * rdesc->uV_step); 297 + else 298 + rdesc->min_uV = SLG51000_LDOHP_LV_MIN 299 + + (vsel_range[0] 300 + * rdesc->uV_step); 301 + break; 302 + 303 + case SLG51000_REGULATOR_LDO5: 304 + case SLG51000_REGULATOR_LDO6: 305 + if (id == SLG51000_REGULATOR_LDO5) 306 + reg = SLG51000_LDO5_TRIM2; 307 + else 308 + reg = SLG51000_LDO6_TRIM2; 309 + 310 + ret = regmap_read(chip->regmap, reg, &val); 311 + if (ret < 0) { 312 + dev_err(chip->dev, 313 + "Failed to read LDO mode register\n"); 314 + return ret; 315 + } 316 + 317 + if (val & SLG51000_SEL_BYP_MODE_MASK) { 318 + rdesc->ops = &slg51000_switch_ops; 319 + rdesc->n_voltages = 0; 320 + rdesc->min_uV = 0; 321 + rdesc->uV_step = 0; 322 + rdesc->linear_min_sel = 0; 323 + break; 324 + } 325 + /* Fall through - to the check below.*/ 326 + 327 + default: 328 + rdesc->linear_min_sel = vsel_range[0]; 329 + rdesc->n_voltages = vsel_range[1] + 1; 330 + rdesc->min_uV = rdesc->min_uV 331 + + (vsel_range[0] * rdesc->uV_step); 332 + break; 333 + } 334 + 335 + chip->rdev[id] = devm_regulator_register(chip->dev, rdesc, 336 + &config); 337 + if (IS_ERR(chip->rdev[id])) { 338 + ret = PTR_ERR(chip->rdev[id]); 339 + dev_err(chip->dev, 340 + "Failed to register regulator(%s):%d\n", 341 + chip->rdesc[id]->name, ret); 342 + return ret; 343 + } 344 + } 345 + 346 + return 0; 347 + } 348 + 349 + static irqreturn_t slg51000_irq_handler(int irq, void *data) 350 + { 351 + struct slg51000 *chip = data; 352 + struct regmap *regmap = chip->regmap; 353 + enum { R0 = 0, R1, R2, REG_MAX }; 354 + u8 evt[SLG51000_MAX_EVT_REGISTER][REG_MAX]; 355 + int ret, i, handled = IRQ_NONE; 356 + unsigned int evt_otp, mask_otp; 357 + 358 + /* Read event[R0], status[R1] and mask[R2] register */ 359 + for (i = 0; i < SLG51000_MAX_EVT_REGISTER; i++) { 360 + ret = regmap_bulk_read(regmap, es_reg[i].ereg, evt[i], REG_MAX); 361 + if (ret < 0) { 362 + dev_err(chip->dev, 363 + "Failed to read event registers(%d)\n", ret); 364 + return IRQ_NONE; 365 + } 366 + } 367 + 368 + ret = regmap_read(regmap, SLG51000_OTP_EVENT, &evt_otp); 369 + if (ret < 0) { 370 + dev_err(chip->dev, 371 + "Failed to read otp event registers(%d)\n", ret); 372 + return IRQ_NONE; 373 + } 374 + 375 + ret = regmap_read(regmap, SLG51000_OTP_IRQ_MASK, &mask_otp); 376 + if (ret < 0) { 377 + dev_err(chip->dev, 378 + "Failed to read otp mask register(%d)\n", ret); 379 + return IRQ_NONE; 380 + } 381 + 382 + if ((evt_otp & SLG51000_EVT_CRC_MASK) && 383 + !(mask_otp & SLG51000_IRQ_CRC_MASK)) { 384 + dev_info(chip->dev, 385 + "OTP has been read or OTP crc is not zero\n"); 386 + handled = IRQ_HANDLED; 387 + } 388 + 389 + for (i = 0; i < SLG51000_MAX_REGULATORS; i++) { 390 + if (!(evt[i][R2] & SLG51000_IRQ_ILIM_FLAG_MASK) && 391 + (evt[i][R0] & SLG51000_EVT_ILIM_FLAG_MASK)) { 392 + regulator_lock(chip->rdev[i]); 393 + regulator_notifier_call_chain(chip->rdev[i], 394 + REGULATOR_EVENT_OVER_CURRENT, NULL); 395 + regulator_unlock(chip->rdev[i]); 396 + 397 + if (evt[i][R1] & SLG51000_STA_ILIM_FLAG_MASK) 398 + dev_warn(chip->dev, 399 + "Over-current limit(ldo%d)\n", i + 1); 400 + handled = IRQ_HANDLED; 401 + } 402 + } 403 + 404 + if (!(evt[SLG51000_SCTL_EVT][R2] & SLG51000_IRQ_HIGH_TEMP_WARN_MASK) && 405 + (evt[SLG51000_SCTL_EVT][R0] & SLG51000_EVT_HIGH_TEMP_WARN_MASK)) { 406 + for (i = 0; i < SLG51000_MAX_REGULATORS; i++) { 407 + if (!(evt[i][R1] & SLG51000_STA_ILIM_FLAG_MASK) && 408 + (evt[i][R1] & SLG51000_STA_VOUT_OK_FLAG_MASK)) { 409 + regulator_lock(chip->rdev[i]); 410 + regulator_notifier_call_chain(chip->rdev[i], 411 + REGULATOR_EVENT_OVER_TEMP, NULL); 412 + regulator_unlock(chip->rdev[i]); 413 + } 414 + } 415 + handled = IRQ_HANDLED; 416 + if (evt[SLG51000_SCTL_EVT][R1] & 417 + SLG51000_STA_HIGH_TEMP_WARN_MASK) 418 + dev_warn(chip->dev, "High temperature warning!\n"); 419 + } 420 + 421 + return handled; 422 + } 423 + 424 + static void slg51000_clear_fault_log(struct slg51000 *chip) 425 + { 426 + unsigned int val = 0; 427 + int ret = 0; 428 + 429 + ret = regmap_read(chip->regmap, SLG51000_SYSCTL_FAULT_LOG1, &val); 430 + if (ret < 0) { 431 + dev_err(chip->dev, "Failed to read Fault log register\n"); 432 + return; 433 + } 434 + 435 + if (val & SLG51000_FLT_OVER_TEMP_MASK) 436 + dev_dbg(chip->dev, "Fault log: FLT_OVER_TEMP\n"); 437 + if (val & SLG51000_FLT_POWER_SEQ_CRASH_REQ_MASK) 438 + dev_dbg(chip->dev, "Fault log: FLT_POWER_SEQ_CRASH_REQ\n"); 439 + if (val & SLG51000_FLT_RST_MASK) 440 + dev_dbg(chip->dev, "Fault log: FLT_RST\n"); 441 + if (val & SLG51000_FLT_POR_MASK) 442 + dev_dbg(chip->dev, "Fault log: FLT_POR\n"); 443 + } 444 + 445 + static int slg51000_i2c_probe(struct i2c_client *client, 446 + const struct i2c_device_id *id) 447 + { 448 + struct device *dev = &client->dev; 449 + struct slg51000 *chip; 450 + struct gpio_desc *cs_gpiod = NULL; 451 + int error, ret; 452 + 453 + chip = devm_kzalloc(dev, sizeof(struct slg51000), GFP_KERNEL); 454 + if (!chip) 455 + return -ENOMEM; 456 + 457 + cs_gpiod = devm_gpiod_get_from_of_node(dev, dev->of_node, 458 + "dlg,cs-gpios", 0, 459 + GPIOD_OUT_HIGH 460 + | GPIOD_FLAGS_BIT_NONEXCLUSIVE, 461 + "slg51000-cs"); 462 + if (cs_gpiod) { 463 + dev_info(dev, "Found chip selector property\n"); 464 + chip->cs_gpiod = cs_gpiod; 465 + } 466 + 467 + i2c_set_clientdata(client, chip); 468 + chip->chip_irq = client->irq; 469 + chip->dev = dev; 470 + chip->regmap = devm_regmap_init_i2c(client, &slg51000_regmap_config); 471 + if (IS_ERR(chip->regmap)) { 472 + error = PTR_ERR(chip->regmap); 473 + dev_err(dev, "Failed to allocate register map: %d\n", 474 + error); 475 + return error; 476 + } 477 + 478 + ret = slg51000_regulator_init(chip); 479 + if (ret < 0) { 480 + dev_err(chip->dev, "Failed to init regulator(%d)\n", ret); 481 + return ret; 482 + } 483 + 484 + slg51000_clear_fault_log(chip); 485 + 486 + if (chip->chip_irq) { 487 + ret = devm_request_threaded_irq(dev, chip->chip_irq, NULL, 488 + slg51000_irq_handler, 489 + (IRQF_TRIGGER_HIGH | 490 + IRQF_ONESHOT), 491 + "slg51000-irq", chip); 492 + if (ret != 0) { 493 + dev_err(dev, "Failed to request IRQ: %d\n", 494 + chip->chip_irq); 495 + return ret; 496 + } 497 + } else { 498 + dev_info(dev, "No IRQ configured\n"); 499 + } 500 + 501 + return ret; 502 + } 503 + 504 + static const struct i2c_device_id slg51000_i2c_id[] = { 505 + {"slg51000", 0}, 506 + {}, 507 + }; 508 + MODULE_DEVICE_TABLE(i2c, slg51000_i2c_id); 509 + 510 + static struct i2c_driver slg51000_regulator_driver = { 511 + .driver = { 512 + .name = "slg51000-regulator", 513 + }, 514 + .probe = slg51000_i2c_probe, 515 + .id_table = slg51000_i2c_id, 516 + }; 517 + 518 + module_i2c_driver(slg51000_regulator_driver); 519 + 520 + MODULE_AUTHOR("Eric Jeong <eric.jeong.opensource@diasemi.com>"); 521 + MODULE_DESCRIPTION("SLG51000 regulator driver"); 522 + MODULE_LICENSE("GPL"); 523 +
+505
drivers/regulator/slg51000-regulator.h
··· 1 + /* SPDX-License-Identifier: GPL-2.0+ */ 2 + /* 3 + * SLG51000 High PSRR, Multi-Output Regulators 4 + * Copyright (C) 2019 Dialog Semiconductor 5 + * 6 + * Author: Eric Jeong <eric.jeong.opensource@diasemi.com> 7 + */ 8 + 9 + #ifndef __SLG51000_REGISTERS_H__ 10 + #define __SLG51000_REGISTERS_H__ 11 + 12 + /* Registers */ 13 + 14 + #define SLG51000_SYSCTL_PATN_ID_B0 0x1105 15 + #define SLG51000_SYSCTL_PATN_ID_B1 0x1106 16 + #define SLG51000_SYSCTL_PATN_ID_B2 0x1107 17 + #define SLG51000_SYSCTL_SYS_CONF_A 0x1109 18 + #define SLG51000_SYSCTL_SYS_CONF_D 0x110c 19 + #define SLG51000_SYSCTL_MATRIX_CONF_A 0x110d 20 + #define SLG51000_SYSCTL_MATRIX_CONF_B 0x110e 21 + #define SLG51000_SYSCTL_REFGEN_CONF_C 0x1111 22 + #define SLG51000_SYSCTL_UVLO_CONF_A 0x1112 23 + #define SLG51000_SYSCTL_FAULT_LOG1 0x1115 24 + #define SLG51000_SYSCTL_EVENT 0x1116 25 + #define SLG51000_SYSCTL_STATUS 0x1117 26 + #define SLG51000_SYSCTL_IRQ_MASK 0x1118 27 + #define SLG51000_IO_GPIO1_CONF 0x1500 28 + #define SLG51000_IO_GPIO2_CONF 0x1501 29 + #define SLG51000_IO_GPIO3_CONF 0x1502 30 + #define SLG51000_IO_GPIO4_CONF 0x1503 31 + #define SLG51000_IO_GPIO5_CONF 0x1504 32 + #define SLG51000_IO_GPIO6_CONF 0x1505 33 + #define SLG51000_IO_GPIO_STATUS 0x1506 34 + #define SLG51000_LUTARRAY_LUT_VAL_0 0x1600 35 + #define SLG51000_LUTARRAY_LUT_VAL_1 0x1601 36 + #define SLG51000_LUTARRAY_LUT_VAL_2 0x1602 37 + #define SLG51000_LUTARRAY_LUT_VAL_3 0x1603 38 + #define SLG51000_LUTARRAY_LUT_VAL_4 0x1604 39 + #define SLG51000_LUTARRAY_LUT_VAL_5 0x1605 40 + #define SLG51000_LUTARRAY_LUT_VAL_6 0x1606 41 + #define SLG51000_LUTARRAY_LUT_VAL_7 0x1607 42 + #define SLG51000_LUTARRAY_LUT_VAL_8 0x1608 43 + #define SLG51000_LUTARRAY_LUT_VAL_9 0x1609 44 + #define SLG51000_LUTARRAY_LUT_VAL_10 0x160a 45 + #define SLG51000_LUTARRAY_LUT_VAL_11 0x160b 46 + #define SLG51000_MUXARRAY_INPUT_SEL_0 0x1700 47 + #define SLG51000_MUXARRAY_INPUT_SEL_1 0x1701 48 + #define SLG51000_MUXARRAY_INPUT_SEL_2 0x1702 49 + #define SLG51000_MUXARRAY_INPUT_SEL_3 0x1703 50 + #define SLG51000_MUXARRAY_INPUT_SEL_4 0x1704 51 + #define SLG51000_MUXARRAY_INPUT_SEL_5 0x1705 52 + #define SLG51000_MUXARRAY_INPUT_SEL_6 0x1706 53 + #define SLG51000_MUXARRAY_INPUT_SEL_7 0x1707 54 + #define SLG51000_MUXARRAY_INPUT_SEL_8 0x1708 55 + #define SLG51000_MUXARRAY_INPUT_SEL_9 0x1709 56 + #define SLG51000_MUXARRAY_INPUT_SEL_10 0x170a 57 + #define SLG51000_MUXARRAY_INPUT_SEL_11 0x170b 58 + #define SLG51000_MUXARRAY_INPUT_SEL_12 0x170c 59 + #define SLG51000_MUXARRAY_INPUT_SEL_13 0x170d 60 + #define SLG51000_MUXARRAY_INPUT_SEL_14 0x170e 61 + #define SLG51000_MUXARRAY_INPUT_SEL_15 0x170f 62 + #define SLG51000_MUXARRAY_INPUT_SEL_16 0x1710 63 + #define SLG51000_MUXARRAY_INPUT_SEL_17 0x1711 64 + #define SLG51000_MUXARRAY_INPUT_SEL_18 0x1712 65 + #define SLG51000_MUXARRAY_INPUT_SEL_19 0x1713 66 + #define SLG51000_MUXARRAY_INPUT_SEL_20 0x1714 67 + #define SLG51000_MUXARRAY_INPUT_SEL_21 0x1715 68 + #define SLG51000_MUXARRAY_INPUT_SEL_22 0x1716 69 + #define SLG51000_MUXARRAY_INPUT_SEL_23 0x1717 70 + #define SLG51000_MUXARRAY_INPUT_SEL_24 0x1718 71 + #define SLG51000_MUXARRAY_INPUT_SEL_25 0x1719 72 + #define SLG51000_MUXARRAY_INPUT_SEL_26 0x171a 73 + #define SLG51000_MUXARRAY_INPUT_SEL_27 0x171b 74 + #define SLG51000_MUXARRAY_INPUT_SEL_28 0x171c 75 + #define SLG51000_MUXARRAY_INPUT_SEL_29 0x171d 76 + #define SLG51000_MUXARRAY_INPUT_SEL_30 0x171e 77 + #define SLG51000_MUXARRAY_INPUT_SEL_31 0x171f 78 + #define SLG51000_MUXARRAY_INPUT_SEL_32 0x1720 79 + #define SLG51000_MUXARRAY_INPUT_SEL_33 0x1721 80 + #define SLG51000_MUXARRAY_INPUT_SEL_34 0x1722 81 + #define SLG51000_MUXARRAY_INPUT_SEL_35 0x1723 82 + #define SLG51000_MUXARRAY_INPUT_SEL_36 0x1724 83 + #define SLG51000_MUXARRAY_INPUT_SEL_37 0x1725 84 + #define SLG51000_MUXARRAY_INPUT_SEL_38 0x1726 85 + #define SLG51000_MUXARRAY_INPUT_SEL_39 0x1727 86 + #define SLG51000_MUXARRAY_INPUT_SEL_40 0x1728 87 + #define SLG51000_MUXARRAY_INPUT_SEL_41 0x1729 88 + #define SLG51000_MUXARRAY_INPUT_SEL_42 0x172a 89 + #define SLG51000_MUXARRAY_INPUT_SEL_43 0x172b 90 + #define SLG51000_MUXARRAY_INPUT_SEL_44 0x172c 91 + #define SLG51000_MUXARRAY_INPUT_SEL_45 0x172d 92 + #define SLG51000_MUXARRAY_INPUT_SEL_46 0x172e 93 + #define SLG51000_MUXARRAY_INPUT_SEL_47 0x172f 94 + #define SLG51000_MUXARRAY_INPUT_SEL_48 0x1730 95 + #define SLG51000_MUXARRAY_INPUT_SEL_49 0x1731 96 + #define SLG51000_MUXARRAY_INPUT_SEL_50 0x1732 97 + #define SLG51000_MUXARRAY_INPUT_SEL_51 0x1733 98 + #define SLG51000_MUXARRAY_INPUT_SEL_52 0x1734 99 + #define SLG51000_MUXARRAY_INPUT_SEL_53 0x1735 100 + #define SLG51000_MUXARRAY_INPUT_SEL_54 0x1736 101 + #define SLG51000_MUXARRAY_INPUT_SEL_55 0x1737 102 + #define SLG51000_MUXARRAY_INPUT_SEL_56 0x1738 103 + #define SLG51000_MUXARRAY_INPUT_SEL_57 0x1739 104 + #define SLG51000_MUXARRAY_INPUT_SEL_58 0x173a 105 + #define SLG51000_MUXARRAY_INPUT_SEL_59 0x173b 106 + #define SLG51000_MUXARRAY_INPUT_SEL_60 0x173c 107 + #define SLG51000_MUXARRAY_INPUT_SEL_61 0x173d 108 + #define SLG51000_MUXARRAY_INPUT_SEL_62 0x173e 109 + #define SLG51000_MUXARRAY_INPUT_SEL_63 0x173f 110 + #define SLG51000_PWRSEQ_RESOURCE_EN_0 0x1900 111 + #define SLG51000_PWRSEQ_RESOURCE_EN_1 0x1901 112 + #define SLG51000_PWRSEQ_RESOURCE_EN_2 0x1902 113 + #define SLG51000_PWRSEQ_RESOURCE_EN_3 0x1903 114 + #define SLG51000_PWRSEQ_RESOURCE_EN_4 0x1904 115 + #define SLG51000_PWRSEQ_RESOURCE_EN_5 0x1905 116 + #define SLG51000_PWRSEQ_SLOT_TIME_MIN_UP0 0x1906 117 + #define SLG51000_PWRSEQ_SLOT_TIME_MIN_DOWN0 0x1907 118 + #define SLG51000_PWRSEQ_SLOT_TIME_MIN_UP1 0x1908 119 + #define SLG51000_PWRSEQ_SLOT_TIME_MIN_DOWN1 0x1909 120 + #define SLG51000_PWRSEQ_SLOT_TIME_MIN_UP2 0x190a 121 + #define SLG51000_PWRSEQ_SLOT_TIME_MIN_DOWN2 0x190b 122 + #define SLG51000_PWRSEQ_SLOT_TIME_MIN_UP3 0x190c 123 + #define SLG51000_PWRSEQ_SLOT_TIME_MIN_DOWN3 0x190d 124 + #define SLG51000_PWRSEQ_SLOT_TIME_MIN_UP4 0x190e 125 + #define SLG51000_PWRSEQ_SLOT_TIME_MIN_DOWN4 0x190f 126 + #define SLG51000_PWRSEQ_SLOT_TIME_MIN_UP5 0x1910 127 + #define SLG51000_PWRSEQ_SLOT_TIME_MIN_DOWN5 0x1911 128 + #define SLG51000_PWRSEQ_SLOT_TIME_MAX_CONF_A 0x1912 129 + #define SLG51000_PWRSEQ_SLOT_TIME_MAX_CONF_B 0x1913 130 + #define SLG51000_PWRSEQ_SLOT_TIME_MAX_CONF_C 0x1914 131 + #define SLG51000_PWRSEQ_INPUT_SENSE_CONF_A 0x1915 132 + #define SLG51000_PWRSEQ_INPUT_SENSE_CONF_B 0x1916 133 + #define SLG51000_LDO1_VSEL 0x2000 134 + #define SLG51000_LDO1_MINV 0x2060 135 + #define SLG51000_LDO1_MAXV 0x2061 136 + #define SLG51000_LDO1_MISC1 0x2064 137 + #define SLG51000_LDO1_VSEL_ACTUAL 0x2065 138 + #define SLG51000_LDO1_EVENT 0x20c0 139 + #define SLG51000_LDO1_STATUS 0x20c1 140 + #define SLG51000_LDO1_IRQ_MASK 0x20c2 141 + #define SLG51000_LDO2_VSEL 0x2200 142 + #define SLG51000_LDO2_MINV 0x2260 143 + #define SLG51000_LDO2_MAXV 0x2261 144 + #define SLG51000_LDO2_MISC1 0x2264 145 + #define SLG51000_LDO2_VSEL_ACTUAL 0x2265 146 + #define SLG51000_LDO2_EVENT 0x22c0 147 + #define SLG51000_LDO2_STATUS 0x22c1 148 + #define SLG51000_LDO2_IRQ_MASK 0x22c2 149 + #define SLG51000_LDO3_VSEL 0x2300 150 + #define SLG51000_LDO3_MINV 0x2360 151 + #define SLG51000_LDO3_MAXV 0x2361 152 + #define SLG51000_LDO3_CONF1 0x2364 153 + #define SLG51000_LDO3_CONF2 0x2365 154 + #define SLG51000_LDO3_VSEL_ACTUAL 0x2366 155 + #define SLG51000_LDO3_EVENT 0x23c0 156 + #define SLG51000_LDO3_STATUS 0x23c1 157 + #define SLG51000_LDO3_IRQ_MASK 0x23c2 158 + #define SLG51000_LDO4_VSEL 0x2500 159 + #define SLG51000_LDO4_MINV 0x2560 160 + #define SLG51000_LDO4_MAXV 0x2561 161 + #define SLG51000_LDO4_CONF1 0x2564 162 + #define SLG51000_LDO4_CONF2 0x2565 163 + #define SLG51000_LDO4_VSEL_ACTUAL 0x2566 164 + #define SLG51000_LDO4_EVENT 0x25c0 165 + #define SLG51000_LDO4_STATUS 0x25c1 166 + #define SLG51000_LDO4_IRQ_MASK 0x25c2 167 + #define SLG51000_LDO5_VSEL 0x2700 168 + #define SLG51000_LDO5_MINV 0x2760 169 + #define SLG51000_LDO5_MAXV 0x2761 170 + #define SLG51000_LDO5_TRIM2 0x2763 171 + #define SLG51000_LDO5_CONF1 0x2765 172 + #define SLG51000_LDO5_CONF2 0x2766 173 + #define SLG51000_LDO5_VSEL_ACTUAL 0x2767 174 + #define SLG51000_LDO5_EVENT 0x27c0 175 + #define SLG51000_LDO5_STATUS 0x27c1 176 + #define SLG51000_LDO5_IRQ_MASK 0x27c2 177 + #define SLG51000_LDO6_VSEL 0x2900 178 + #define SLG51000_LDO6_MINV 0x2960 179 + #define SLG51000_LDO6_MAXV 0x2961 180 + #define SLG51000_LDO6_TRIM2 0x2963 181 + #define SLG51000_LDO6_CONF1 0x2965 182 + #define SLG51000_LDO6_CONF2 0x2966 183 + #define SLG51000_LDO6_VSEL_ACTUAL 0x2967 184 + #define SLG51000_LDO6_EVENT 0x29c0 185 + #define SLG51000_LDO6_STATUS 0x29c1 186 + #define SLG51000_LDO6_IRQ_MASK 0x29c2 187 + #define SLG51000_LDO7_VSEL 0x3100 188 + #define SLG51000_LDO7_MINV 0x3160 189 + #define SLG51000_LDO7_MAXV 0x3161 190 + #define SLG51000_LDO7_CONF1 0x3164 191 + #define SLG51000_LDO7_CONF2 0x3165 192 + #define SLG51000_LDO7_VSEL_ACTUAL 0x3166 193 + #define SLG51000_LDO7_EVENT 0x31c0 194 + #define SLG51000_LDO7_STATUS 0x31c1 195 + #define SLG51000_LDO7_IRQ_MASK 0x31c2 196 + #define SLG51000_OTP_EVENT 0x782b 197 + #define SLG51000_OTP_IRQ_MASK 0x782d 198 + #define SLG51000_OTP_LOCK_OTP_PROG 0x78fe 199 + #define SLG51000_OTP_LOCK_CTRL 0x78ff 200 + #define SLG51000_LOCK_GLOBAL_LOCK_CTRL1 0x8000 201 + 202 + /* Register Bit Fields */ 203 + 204 + /* SLG51000_SYSCTL_PATTERN_ID_BYTE0 = 0x1105 */ 205 + #define SLG51000_PATTERN_ID_BYTE0_SHIFT 0 206 + #define SLG51000_PATTERN_ID_BYTE0_MASK (0xff << 0) 207 + 208 + /* SLG51000_SYSCTL_PATTERN_ID_BYTE1 = 0x1106 */ 209 + #define SLG51000_PATTERN_ID_BYTE1_SHIFT 0 210 + #define SLG51000_PATTERN_ID_BYTE1_MASK (0xff << 0) 211 + 212 + /* SLG51000_SYSCTL_PATTERN_ID_BYTE2 = 0x1107 */ 213 + #define SLG51000_PATTERN_ID_BYTE2_SHIFT 0 214 + #define SLG51000_PATTERN_ID_BYTE2_MASK (0xff << 0) 215 + 216 + /* SLG51000_SYSCTL_SYS_CONF_A = 0x1109 */ 217 + #define SLG51000_I2C_ADDRESS_SHIFT 0 218 + #define SLG51000_I2C_ADDRESS_MASK (0x7f << 0) 219 + #define SLG51000_I2C_DISABLE_SHIFT 7 220 + #define SLG51000_I2C_DISABLE_MASK (0x01 << 7) 221 + 222 + /* SLG51000_SYSCTL_SYS_CONF_D = 0x110c */ 223 + #define SLG51000_CS_T_DEB_SHIFT 6 224 + #define SLG51000_CS_T_DEB_MASK (0x03 << 6) 225 + #define SLG51000_I2C_CLR_MODE_SHIFT 5 226 + #define SLG51000_I2C_CLR_MODE_MASK (0x01 << 5) 227 + 228 + /* SLG51000_SYSCTL_MATRIX_CTRL_CONF_A = 0x110d */ 229 + #define SLG51000_RESOURCE_CTRL_SHIFT 0 230 + #define SLG51000_RESOURCE_CTRL_MASK (0xff << 0) 231 + 232 + /* SLG51000_SYSCTL_MATRIX_CTRL_CONF_B = 0x110e */ 233 + #define SLG51000_MATRIX_EVENT_SENSE_SHIFT 0 234 + #define SLG51000_MATRIX_EVENT_SENSE_MASK (0x07 << 0) 235 + 236 + /* SLG51000_SYSCTL_REFGEN_CONF_C = 0x1111 */ 237 + #define SLG51000_REFGEN_SEL_TEMP_WARN_DEBOUNCE_SHIFT 2 238 + #define SLG51000_REFGEN_SEL_TEMP_WARN_DEBOUNCE_MASK (0x03 << 2) 239 + #define SLG51000_REFGEN_SEL_TEMP_WARN_THR_SHIFT 0 240 + #define SLG51000_REFGEN_SEL_TEMP_WARN_THR_MASK (0x03 << 0) 241 + 242 + /* SLG51000_SYSCTL_UVLO_CONF_A = 0x1112 */ 243 + #define SLG51000_VMON_UVLO_SEL_THR_SHIFT 0 244 + #define SLG51000_VMON_UVLO_SEL_THR_MASK (0x1f << 0) 245 + 246 + /* SLG51000_SYSCTL_FAULT_LOG1 = 0x1115 */ 247 + #define SLG51000_FLT_POR_SHIFT 5 248 + #define SLG51000_FLT_POR_MASK (0x01 << 5) 249 + #define SLG51000_FLT_RST_SHIFT 4 250 + #define SLG51000_FLT_RST_MASK (0x01 << 4) 251 + #define SLG51000_FLT_POWER_SEQ_CRASH_REQ_SHIFT 2 252 + #define SLG51000_FLT_POWER_SEQ_CRASH_REQ_MASK (0x01 << 2) 253 + #define SLG51000_FLT_OVER_TEMP_SHIFT 1 254 + #define SLG51000_FLT_OVER_TEMP_MASK (0x01 << 1) 255 + 256 + /* SLG51000_SYSCTL_EVENT = 0x1116 */ 257 + #define SLG51000_EVT_MATRIX_SHIFT 1 258 + #define SLG51000_EVT_MATRIX_MASK (0x01 << 1) 259 + #define SLG51000_EVT_HIGH_TEMP_WARN_SHIFT 0 260 + #define SLG51000_EVT_HIGH_TEMP_WARN_MASK (0x01 << 0) 261 + 262 + /* SLG51000_SYSCTL_STATUS = 0x1117 */ 263 + #define SLG51000_STA_MATRIX_SHIFT 1 264 + #define SLG51000_STA_MATRIX_MASK (0x01 << 1) 265 + #define SLG51000_STA_HIGH_TEMP_WARN_SHIFT 0 266 + #define SLG51000_STA_HIGH_TEMP_WARN_MASK (0x01 << 0) 267 + 268 + /* SLG51000_SYSCTL_IRQ_MASK = 0x1118 */ 269 + #define SLG51000_IRQ_MATRIX_SHIFT 1 270 + #define SLG51000_IRQ_MATRIX_MASK (0x01 << 1) 271 + #define SLG51000_IRQ_HIGH_TEMP_WARN_SHIFT 0 272 + #define SLG51000_IRQ_HIGH_TEMP_WARN_MASK (0x01 << 0) 273 + 274 + /* SLG51000_IO_GPIO1_CONF ~ SLG51000_IO_GPIO5_CONF = 275 + * 0x1500, 0x1501, 0x1502, 0x1503, 0x1504 276 + */ 277 + #define SLG51000_GPIO_DIR_SHIFT 7 278 + #define SLG51000_GPIO_DIR_MASK (0x01 << 7) 279 + #define SLG51000_GPIO_SENS_SHIFT 5 280 + #define SLG51000_GPIO_SENS_MASK (0x03 << 5) 281 + #define SLG51000_GPIO_INVERT_SHIFT 4 282 + #define SLG51000_GPIO_INVERT_MASK (0x01 << 4) 283 + #define SLG51000_GPIO_BYP_SHIFT 3 284 + #define SLG51000_GPIO_BYP_MASK (0x01 << 3) 285 + #define SLG51000_GPIO_T_DEB_SHIFT 1 286 + #define SLG51000_GPIO_T_DEB_MASK (0x03 << 1) 287 + #define SLG51000_GPIO_LEVEL_SHIFT 0 288 + #define SLG51000_GPIO_LEVEL_MASK (0x01 << 0) 289 + 290 + /* SLG51000_IO_GPIO6_CONF = 0x1505 */ 291 + #define SLG51000_GPIO6_SENS_SHIFT 5 292 + #define SLG51000_GPIO6_SENS_MASK (0x03 << 5) 293 + #define SLG51000_GPIO6_INVERT_SHIFT 4 294 + #define SLG51000_GPIO6_INVERT_MASK (0x01 << 4) 295 + #define SLG51000_GPIO6_T_DEB_SHIFT 1 296 + #define SLG51000_GPIO6_T_DEB_MASK (0x03 << 1) 297 + #define SLG51000_GPIO6_LEVEL_SHIFT 0 298 + #define SLG51000_GPIO6_LEVEL_MASK (0x01 << 0) 299 + 300 + /* SLG51000_IO_GPIO_STATUS = 0x1506 */ 301 + #define SLG51000_GPIO6_STATUS_SHIFT 5 302 + #define SLG51000_GPIO6_STATUS_MASK (0x01 << 5) 303 + #define SLG51000_GPIO5_STATUS_SHIFT 4 304 + #define SLG51000_GPIO5_STATUS_MASK (0x01 << 4) 305 + #define SLG51000_GPIO4_STATUS_SHIFT 3 306 + #define SLG51000_GPIO4_STATUS_MASK (0x01 << 3) 307 + #define SLG51000_GPIO3_STATUS_SHIFT 2 308 + #define SLG51000_GPIO3_STATUS_MASK (0x01 << 2) 309 + #define SLG51000_GPIO2_STATUS_SHIFT 1 310 + #define SLG51000_GPIO2_STATUS_MASK (0x01 << 1) 311 + #define SLG51000_GPIO1_STATUS_SHIFT 0 312 + #define SLG51000_GPIO1_STATUS_MASK (0x01 << 0) 313 + 314 + /* SLG51000_LUTARRAY_LUT_VAL_0 ~ SLG51000_LUTARRAY_LUT_VAL_11 315 + * 0x1600, 0x1601, 0x1602, 0x1603, 0x1604, 0x1605, 316 + * 0x1606, 0x1607, 0x1608, 0x1609, 0x160a, 0x160b 317 + */ 318 + #define SLG51000_LUT_VAL_SHIFT 0 319 + #define SLG51000_LUT_VAL_MASK (0xff << 0) 320 + 321 + /* SLG51000_MUXARRAY_INPUT_SEL_0 ~ SLG51000_MUXARRAY_INPUT_SEL_63 322 + * 0x1700, 0x1701, 0x1702, 0x1703, 0x1704, 0x1705, 323 + * 0x1706, 0x1707, 0x1708, 0x1709, 0x170a, 0x170b, 324 + * 0x170c, 0x170d, 0x170e, 0x170f, 0x1710, 0x1711, 325 + * 0x1712, 0x1713, 0x1714, 0x1715, 0x1716, 0x1717, 326 + * 0x1718, 0x1719, 0x171a, 0x171b, 0x171c, 0x171d, 327 + * 0x171e, 0x171f, 0x1720, 0x1721, 0x1722, 0x1723, 328 + * 0x1724, 0x1725, 0x1726, 0x1727, 0x1728, 0x1729, 329 + * 0x173a, 0x173b, 0x173c, 0x173d, 0x173e, 0x173f, 330 + */ 331 + #define SLG51000_INPUT_SEL_SHIFT 0 332 + #define SLG51000_INPUT_SEL_MASK (0x3f << 0) 333 + 334 + /* SLG51000_PWRSEQ_RESOURCE_EN_0 ~ SLG51000_PWRSEQ_RESOURCE_EN_5 335 + * 0x1900, 0x1901, 0x1902, 0x1903, 0x1904, 0x1905 336 + */ 337 + #define SLG51000_RESOURCE_EN_DOWN0_SHIFT 4 338 + #define SLG51000_RESOURCE_EN_DOWN0_MASK (0x07 << 4) 339 + #define SLG51000_RESOURCE_EN_UP0_SHIFT 0 340 + #define SLG51000_RESOURCE_EN_UP0_MASK (0x07 << 0) 341 + 342 + /* SLG51000_PWRSEQ_SLOT_TIME_MIN_UP0 ~ SLG51000_PWRSEQ_SLOT_TIME_MIN_UP5 343 + * 0x1906, 0x1908, 0x190a, 0x190c, 0x190e, 0x1910 344 + */ 345 + #define SLG51000_SLOT_TIME_MIN_UP_SHIFT 0 346 + #define SLG51000_SLOT_TIME_MIN_UP_MASK (0xff << 0) 347 + 348 + /* SLG51000_PWRSEQ_SLOT_TIME_MIN_DOWN0 ~ SLG51000_PWRSEQ_SLOT_TIME_MIN_DOWN5 349 + * 0x1907, 0x1909, 0x190b, 0x190d, 0x190f, 0x1911 350 + */ 351 + #define SLG51000_SLOT_TIME_MIN_DOWN_SHIFT 0 352 + #define SLG51000_SLOT_TIME_MIN_DOWN_MASK (0xff << 0) 353 + 354 + /* SLG51000_PWRSEQ_SLOT_TIME_MAX_CONF_A ~ SLG51000_PWRSEQ_SLOT_TIME_MAX_CONF_C 355 + * 0x1912, 0x1913, 0x1914 356 + */ 357 + #define SLG51000_SLOT_TIME_MAX_DOWN1_SHIFT 6 358 + #define SLG51000_SLOT_TIME_MAX_DOWN1_MASK (0x03 << 6) 359 + #define SLG51000_SLOT_TIME_MAX_UP1_SHIFT 4 360 + #define SLG51000_SLOT_TIME_MAX_UP1_MASK (0x03 << 4) 361 + #define SLG51000_SLOT_TIME_MAX_DOWN0_SHIFT 2 362 + #define SLG51000_SLOT_TIME_MAX_DOWN0_MASK (0x03 << 2) 363 + #define SLG51000_SLOT_TIME_MAX_UP0_SHIFT 0 364 + #define SLG51000_SLOT_TIME_MAX_UP0_MASK (0x03 << 0) 365 + 366 + /* SLG51000_PWRSEQ_INPUT_SENSE_CONF_A = 0x1915 */ 367 + #define SLG51000_TRIG_UP_SENSE_SHIFT 6 368 + #define SLG51000_TRIG_UP_SENSE_MASK (0x01 << 6) 369 + #define SLG51000_UP_EN_SENSE5_SHIFT 5 370 + #define SLG51000_UP_EN_SENSE5_MASK (0x01 << 5) 371 + #define SLG51000_UP_EN_SENSE4_SHIFT 4 372 + #define SLG51000_UP_EN_SENSE4_MASK (0x01 << 4) 373 + #define SLG51000_UP_EN_SENSE3_SHIFT 3 374 + #define SLG51000_UP_EN_SENSE3_MASK (0x01 << 3) 375 + #define SLG51000_UP_EN_SENSE2_SHIFT 2 376 + #define SLG51000_UP_EN_SENSE2_MASK (0x01 << 2) 377 + #define SLG51000_UP_EN_SENSE1_SHIFT 1 378 + #define SLG51000_UP_EN_SENSE1_MASK (0x01 << 1) 379 + #define SLG51000_UP_EN_SENSE0_SHIFT 0 380 + #define SLG51000_UP_EN_SENSE0_MASK (0x01 << 0) 381 + 382 + /* SLG51000_PWRSEQ_INPUT_SENSE_CONF_B = 0x1916 */ 383 + #define SLG51000_CRASH_DETECT_SENSE_SHIFT 7 384 + #define SLG51000_CRASH_DETECT_SENSE_MASK (0x01 << 7) 385 + #define SLG51000_TRIG_DOWN_SENSE_SHIFT 6 386 + #define SLG51000_TRIG_DOWN_SENSE_MASK (0x01 << 6) 387 + #define SLG51000_DOWN_EN_SENSE5_SHIFT 5 388 + #define SLG51000_DOWN_EN_SENSE5_MASK (0x01 << 5) 389 + #define SLG51000_DOWN_EN_SENSE4_SHIFT 4 390 + #define SLG51000_DOWN_EN_SENSE4_MASK (0x01 << 4) 391 + #define SLG51000_DOWN_EN_SENSE3_SHIFT 3 392 + #define SLG51000_DOWN_EN_SENSE3_MASK (0x01 << 3) 393 + #define SLG51000_DOWN_EN_SENSE2_SHIFT 2 394 + #define SLG51000_DOWN_EN_SENSE2_MASK (0x01 << 2) 395 + #define SLG51000_DOWN_EN_SENSE1_SHIFT 1 396 + #define SLG51000_DOWN_EN_SENSE1_MASK (0x01 << 1) 397 + #define SLG51000_DOWN_EN_SENSE0_SHIFT 0 398 + #define SLG51000_DOWN_EN_SENSE0_MASK (0x01 << 0) 399 + 400 + /* SLG51000_LDO1_VSEL ~ SLG51000_LDO7_VSEL = 401 + * 0x2000, 0x2200, 0x2300, 0x2500, 0x2700, 0x2900, 0x3100 402 + */ 403 + #define SLG51000_VSEL_SHIFT 0 404 + #define SLG51000_VSEL_MASK (0xff << 0) 405 + 406 + /* SLG51000_LDO1_MINV ~ SLG51000_LDO7_MINV = 407 + * 0x2060, 0x2260, 0x2360, 0x2560, 0x2760, 0x2960, 0x3160 408 + */ 409 + #define SLG51000_MINV_SHIFT 0 410 + #define SLG51000_MINV_MASK (0xff << 0) 411 + 412 + /* SLG51000_LDO1_MAXV ~ SLG51000_LDO7_MAXV = 413 + * 0x2061, 0x2261, 0x2361, 0x2561, 0x2761, 0x2961, 0x3161 414 + */ 415 + #define SLG51000_MAXV_SHIFT 0 416 + #define SLG51000_MAXV_MASK (0xff << 0) 417 + 418 + /* SLG51000_LDO1_MISC1 = 0x2064, SLG51000_LDO2_MISC1 = 0x2264 */ 419 + #define SLG51000_SEL_VRANGE_SHIFT 0 420 + #define SLG51000_SEL_VRANGE_MASK (0x01 << 0) 421 + 422 + /* SLG51000_LDO1_VSEL_ACTUAL ~ SLG51000_LDO7_VSEL_ACTUAL = 423 + * 0x2065, 0x2265, 0x2366, 0x2566, 0x2767, 0x2967, 0x3166 424 + */ 425 + #define SLG51000_VSEL_ACTUAL_SHIFT 0 426 + #define SLG51000_VSEL_ACTUAL_MASK (0xff << 0) 427 + 428 + /* SLG51000_LDO1_EVENT ~ SLG51000_LDO7_EVENT = 429 + * 0x20c0, 0x22c0, 0x23c0, 0x25c0, 0x27c0, 0x29c0, 0x31c0 430 + */ 431 + #define SLG51000_EVT_ILIM_FLAG_SHIFT 0 432 + #define SLG51000_EVT_ILIM_FLAG_MASK (0x01 << 0) 433 + #define SLG51000_EVT_VOUT_OK_FLAG_SHIFT 1 434 + #define SLG51000_EVT_VOUT_OK_FLAG_MASK (0x01 << 1) 435 + 436 + /* SLG51000_LDO1_STATUS ~ SLG51000_LDO7_STATUS = 437 + * 0x20c1, 0x22c1, 0x23c1, 0x25c1, 0x27c1, 0x29c1, 0x31c1 438 + */ 439 + #define SLG51000_STA_ILIM_FLAG_SHIFT 0 440 + #define SLG51000_STA_ILIM_FLAG_MASK (0x01 << 0) 441 + #define SLG51000_STA_VOUT_OK_FLAG_SHIFT 1 442 + #define SLG51000_STA_VOUT_OK_FLAG_MASK (0x01 << 1) 443 + 444 + /* SLG51000_LDO1_IRQ_MASK ~ SLG51000_LDO7_IRQ_MASK = 445 + * 0x20c2, 0x22c2, 0x23c2, 0x25c2, 0x27c2, 0x29c2, 0x31c2 446 + */ 447 + #define SLG51000_IRQ_ILIM_FLAG_SHIFT 0 448 + #define SLG51000_IRQ_ILIM_FLAG_MASK (0x01 << 0) 449 + 450 + /* SLG51000_LDO3_CONF1 ~ SLG51000_LDO7_CONF1 = 451 + * 0x2364, 0x2564, 0x2765, 0x2965, 0x3164 452 + */ 453 + #define SLG51000_SEL_START_ILIM_SHIFT 0 454 + #define SLG51000_SEL_START_ILIM_MASK (0x7f << 0) 455 + 456 + /* SLG51000_LDO3_CONF2 ~ SLG51000_LDO7_CONF2 = 457 + * 0x2365, 0x2565, 0x2766, 0x2966, 0x3165 458 + */ 459 + #define SLG51000_SEL_FUNC_ILIM_SHIFT 0 460 + #define SLG51000_SEL_FUNC_ILIM_MASK (0x7f << 0) 461 + 462 + /* SLG51000_LDO5_TRIM2 = 0x2763, SLG51000_LDO6_TRIM2 = 0x2963 */ 463 + #define SLG51000_SEL_BYP_SLEW_RATE_SHIFT 2 464 + #define SLG51000_SEL_BYP_SLEW_RATE_MASK (0x03 << 2) 465 + #define SLG51000_SEL_BYP_VGATE_SHIFT 1 466 + #define SLG51000_SEL_BYP_VGATE_MASK (0x01 << 1) 467 + #define SLG51000_SEL_BYP_MODE_SHIFT 0 468 + #define SLG51000_SEL_BYP_MODE_MASK (0x01 << 0) 469 + 470 + /* SLG51000_OTP_EVENT = 0x782b */ 471 + #define SLG51000_EVT_CRC_SHIFT 0 472 + #define SLG51000_EVT_CRC_MASK (0x01 << 0) 473 + 474 + /* SLG51000_OTP_IRQ_MASK = 0x782d */ 475 + #define SLG51000_IRQ_CRC_SHIFT 0 476 + #define SLG51000_IRQ_CRC_MASK (0x01 << 0) 477 + 478 + /* SLG51000_OTP_LOCK_OTP_PROG = 0x78fe */ 479 + #define SLG51000_LOCK_OTP_PROG_SHIFT 0 480 + #define SLG51000_LOCK_OTP_PROG_MASK (0x01 << 0) 481 + 482 + /* SLG51000_OTP_LOCK_CTRL = 0x78ff */ 483 + #define SLG51000_LOCK_DFT_SHIFT 1 484 + #define SLG51000_LOCK_DFT_MASK (0x01 << 1) 485 + #define SLG51000_LOCK_RWT_SHIFT 0 486 + #define SLG51000_LOCK_RWT_MASK (0x01 << 0) 487 + 488 + /* SLG51000_LOCK_GLOBAL_LOCK_CTRL1 = 0x8000 */ 489 + #define SLG51000_LDO7_LOCK_SHIFT 7 490 + #define SLG51000_LDO7_LOCK_MASK (0x01 << 7) 491 + #define SLG51000_LDO6_LOCK_SHIFT 6 492 + #define SLG51000_LDO6_LOCK_MASK (0x01 << 6) 493 + #define SLG51000_LDO5_LOCK_SHIFT 5 494 + #define SLG51000_LDO5_LOCK_MASK (0x01 << 5) 495 + #define SLG51000_LDO4_LOCK_SHIFT 4 496 + #define SLG51000_LDO4_LOCK_MASK (0x01 << 4) 497 + #define SLG51000_LDO3_LOCK_SHIFT 3 498 + #define SLG51000_LDO3_LOCK_MASK (0x01 << 3) 499 + #define SLG51000_LDO2_LOCK_SHIFT 2 500 + #define SLG51000_LDO2_LOCK_MASK (0x01 << 2) 501 + #define SLG51000_LDO1_LOCK_SHIFT 1 502 + #define SLG51000_LDO1_LOCK_MASK (0x01 << 1) 503 + 504 + #endif /* __SLG51000_REGISTERS_H__ */ 505 +
+132
drivers/regulator/stm32-booster.c
··· 1 + // SPDX-License-Identifier: GPL-2.0 2 + // Copyright (C) STMicroelectronics 2019 3 + // Author(s): Fabrice Gasnier <fabrice.gasnier@st.com>. 4 + 5 + #include <linux/mfd/syscon.h> 6 + #include <linux/module.h> 7 + #include <linux/of_device.h> 8 + #include <linux/platform_device.h> 9 + #include <linux/regmap.h> 10 + #include <linux/regulator/driver.h> 11 + #include <linux/regulator/of_regulator.h> 12 + 13 + /* STM32H7 SYSCFG register */ 14 + #define STM32H7_SYSCFG_PMCR 0x04 15 + #define STM32H7_SYSCFG_BOOSTE_MASK BIT(8) 16 + 17 + /* STM32MP1 SYSCFG has set and clear registers */ 18 + #define STM32MP1_SYSCFG_PMCSETR 0x04 19 + #define STM32MP1_SYSCFG_PMCCLRR 0x44 20 + #define STM32MP1_SYSCFG_EN_BOOSTER_MASK BIT(8) 21 + 22 + static const struct regulator_ops stm32h7_booster_ops = { 23 + .list_voltage = regulator_list_voltage_linear, 24 + .enable = regulator_enable_regmap, 25 + .disable = regulator_disable_regmap, 26 + .is_enabled = regulator_is_enabled_regmap, 27 + }; 28 + 29 + static const struct regulator_desc stm32h7_booster_desc = { 30 + .name = "booster", 31 + .supply_name = "vdda", 32 + .n_voltages = 1, 33 + .type = REGULATOR_VOLTAGE, 34 + .min_uV = 3300000, 35 + .fixed_uV = 3300000, 36 + .ramp_delay = 66000, /* up to 50us to stabilize */ 37 + .ops = &stm32h7_booster_ops, 38 + .enable_reg = STM32H7_SYSCFG_PMCR, 39 + .enable_mask = STM32H7_SYSCFG_BOOSTE_MASK, 40 + .owner = THIS_MODULE, 41 + }; 42 + 43 + static int stm32mp1_booster_enable(struct regulator_dev *rdev) 44 + { 45 + return regmap_write(rdev->regmap, STM32MP1_SYSCFG_PMCSETR, 46 + STM32MP1_SYSCFG_EN_BOOSTER_MASK); 47 + } 48 + 49 + static int stm32mp1_booster_disable(struct regulator_dev *rdev) 50 + { 51 + return regmap_write(rdev->regmap, STM32MP1_SYSCFG_PMCCLRR, 52 + STM32MP1_SYSCFG_EN_BOOSTER_MASK); 53 + } 54 + 55 + static const struct regulator_ops stm32mp1_booster_ops = { 56 + .list_voltage = regulator_list_voltage_linear, 57 + .enable = stm32mp1_booster_enable, 58 + .disable = stm32mp1_booster_disable, 59 + .is_enabled = regulator_is_enabled_regmap, 60 + }; 61 + 62 + static const struct regulator_desc stm32mp1_booster_desc = { 63 + .name = "booster", 64 + .supply_name = "vdda", 65 + .n_voltages = 1, 66 + .type = REGULATOR_VOLTAGE, 67 + .min_uV = 3300000, 68 + .fixed_uV = 3300000, 69 + .ramp_delay = 66000, 70 + .ops = &stm32mp1_booster_ops, 71 + .enable_reg = STM32MP1_SYSCFG_PMCSETR, 72 + .enable_mask = STM32MP1_SYSCFG_EN_BOOSTER_MASK, 73 + .owner = THIS_MODULE, 74 + }; 75 + 76 + static int stm32_booster_probe(struct platform_device *pdev) 77 + { 78 + struct device *dev = &pdev->dev; 79 + struct device_node *np = pdev->dev.of_node; 80 + struct regulator_config config = { }; 81 + const struct regulator_desc *desc; 82 + struct regulator_dev *rdev; 83 + struct regmap *regmap; 84 + int ret; 85 + 86 + regmap = syscon_regmap_lookup_by_phandle(np, "st,syscfg"); 87 + if (IS_ERR(regmap)) 88 + return PTR_ERR(regmap); 89 + 90 + desc = (const struct regulator_desc *) 91 + of_match_device(dev->driver->of_match_table, dev)->data; 92 + 93 + config.regmap = regmap; 94 + config.dev = dev; 95 + config.of_node = np; 96 + config.init_data = of_get_regulator_init_data(dev, np, desc); 97 + 98 + rdev = devm_regulator_register(dev, desc, &config); 99 + if (IS_ERR(rdev)) { 100 + ret = PTR_ERR(rdev); 101 + dev_err(dev, "register failed with error %d\n", ret); 102 + return ret; 103 + } 104 + 105 + return 0; 106 + } 107 + 108 + static const struct of_device_id stm32_booster_of_match[] = { 109 + { 110 + .compatible = "st,stm32h7-booster", 111 + .data = (void *)&stm32h7_booster_desc 112 + }, { 113 + .compatible = "st,stm32mp1-booster", 114 + .data = (void *)&stm32mp1_booster_desc 115 + }, { 116 + }, 117 + }; 118 + MODULE_DEVICE_TABLE(of, stm32_booster_of_match); 119 + 120 + static struct platform_driver stm32_booster_driver = { 121 + .probe = stm32_booster_probe, 122 + .driver = { 123 + .name = "stm32-booster", 124 + .of_match_table = of_match_ptr(stm32_booster_of_match), 125 + }, 126 + }; 127 + module_platform_driver(stm32_booster_driver); 128 + 129 + MODULE_LICENSE("GPL v2"); 130 + MODULE_AUTHOR("Fabrice Gasnier <fabrice.gasnier@st.com>"); 131 + MODULE_DESCRIPTION("STMicroelectronics STM32 booster regulator driver"); 132 + MODULE_ALIAS("platform:stm32-booster");
+4 -3
drivers/regulator/tps65090-regulator.c
··· 371 371 "dcdc-ext-control-gpios", 0, 372 372 gflags, 373 373 "tps65090"); 374 - if (IS_ERR(rpdata->gpiod)) 375 - return ERR_CAST(rpdata->gpiod); 376 - if (!rpdata->gpiod) 374 + if (PTR_ERR(rpdata->gpiod) == -ENOENT) { 377 375 dev_err(&pdev->dev, 378 376 "could not find DCDC external control GPIO\n"); 377 + rpdata->gpiod = NULL; 378 + } else if (IS_ERR(rpdata->gpiod)) 379 + return ERR_CAST(rpdata->gpiod); 379 380 } 380 381 381 382 if (of_property_read_u32(tps65090_matches[idx].of_node,
+13 -16
drivers/regulator/wm831x-dcdc.c
··· 15 15 #include <linux/platform_device.h> 16 16 #include <linux/regulator/driver.h> 17 17 #include <linux/regulator/machine.h> 18 - #include <linux/gpio.h> 18 + #include <linux/gpio/consumer.h> 19 19 #include <linux/slab.h> 20 20 21 21 #include <linux/mfd/wm831x/core.h> ··· 50 50 int base; 51 51 struct wm831x *wm831x; 52 52 struct regulator_dev *regulator; 53 - int dvs_gpio; 53 + struct gpio_desc *dvs_gpiod; 54 54 int dvs_gpio_state; 55 55 int on_vsel; 56 56 int dvs_vsel; ··· 217 217 return 0; 218 218 219 219 dcdc->dvs_gpio_state = state; 220 - gpio_set_value(dcdc->dvs_gpio, state); 220 + gpiod_set_value(dcdc->dvs_gpiod, state); 221 221 222 222 /* Should wait for DVS state change to be asserted if we have 223 223 * a GPIO for it, for now assume the device is configured ··· 237 237 int ret; 238 238 239 239 /* If this value is already set then do a GPIO update if we can */ 240 - if (dcdc->dvs_gpio && dcdc->on_vsel == vsel) 240 + if (dcdc->dvs_gpiod && dcdc->on_vsel == vsel) 241 241 return wm831x_buckv_set_dvs(rdev, 0); 242 242 243 - if (dcdc->dvs_gpio && dcdc->dvs_vsel == vsel) 243 + if (dcdc->dvs_gpiod && dcdc->dvs_vsel == vsel) 244 244 return wm831x_buckv_set_dvs(rdev, 1); 245 245 246 246 /* Always set the ON status to the minimum voltage */ ··· 249 249 return ret; 250 250 dcdc->on_vsel = vsel; 251 251 252 - if (!dcdc->dvs_gpio) 252 + if (!dcdc->dvs_gpiod) 253 253 return ret; 254 254 255 255 /* Kick the voltage transition now */ ··· 296 296 { 297 297 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); 298 298 299 - if (dcdc->dvs_gpio && dcdc->dvs_gpio_state) 299 + if (dcdc->dvs_gpiod && dcdc->dvs_gpio_state) 300 300 return dcdc->dvs_vsel; 301 301 else 302 302 return dcdc->on_vsel; ··· 337 337 int ret; 338 338 u16 ctrl; 339 339 340 - if (!pdata || !pdata->dvs_gpio) 340 + if (!pdata) 341 341 return; 342 342 343 343 /* gpiolib won't let us read the GPIO status so pick the higher ··· 345 345 */ 346 346 dcdc->dvs_gpio_state = pdata->dvs_init_state; 347 347 348 - ret = devm_gpio_request_one(&pdev->dev, pdata->dvs_gpio, 349 - dcdc->dvs_gpio_state ? GPIOF_INIT_HIGH : 0, 350 - "DCDC DVS"); 351 - if (ret < 0) { 352 - dev_err(wm831x->dev, "Failed to get %s DVS GPIO: %d\n", 353 - dcdc->name, ret); 348 + dcdc->dvs_gpiod = devm_gpiod_get(&pdev->dev, "dvs", 349 + dcdc->dvs_gpio_state ? GPIOD_OUT_HIGH : GPIOD_OUT_LOW); 350 + if (IS_ERR(dcdc->dvs_gpiod)) { 351 + dev_err(wm831x->dev, "Failed to get %s DVS GPIO: %ld\n", 352 + dcdc->name, PTR_ERR(dcdc->dvs_gpiod)); 354 353 return; 355 354 } 356 - 357 - dcdc->dvs_gpio = pdata->dvs_gpio; 358 355 359 356 switch (pdata->dvs_control_src) { 360 357 case 1:
+3
include/linux/mfd/da9062/registers.h
··· 797 797 #define DA9062AA_BUCK3_SL_A_SHIFT 7 798 798 #define DA9062AA_BUCK3_SL_A_MASK BIT(7) 799 799 800 + /* DA9062AA_VLDO[1-4]_A common */ 801 + #define DA9062AA_VLDO_A_MIN_SEL 2 802 + 800 803 /* DA9062AA_VLDO1_A = 0x0A9 */ 801 804 #define DA9062AA_VLDO1_A_SHIFT 0 802 805 #define DA9062AA_VLDO1_A_MASK 0x3f
-49
include/linux/mfd/da9063/pdata.h
··· 11 11 #ifndef __MFD_DA9063_PDATA_H__ 12 12 #define __MFD_DA9063_PDATA_H__ 13 13 14 - #include <linux/regulator/machine.h> 15 - 16 - /* 17 - * Regulator configuration 18 - */ 19 - /* DA9063 and DA9063L regulator IDs */ 20 - enum { 21 - /* BUCKs */ 22 - DA9063_ID_BCORE1, 23 - DA9063_ID_BCORE2, 24 - DA9063_ID_BPRO, 25 - DA9063_ID_BMEM, 26 - DA9063_ID_BIO, 27 - DA9063_ID_BPERI, 28 - 29 - /* BCORE1 and BCORE2 in merged mode */ 30 - DA9063_ID_BCORES_MERGED, 31 - /* BMEM and BIO in merged mode */ 32 - DA9063_ID_BMEM_BIO_MERGED, 33 - /* When two BUCKs are merged, they cannot be reused separately */ 34 - 35 - /* LDOs on both DA9063 and DA9063L */ 36 - DA9063_ID_LDO3, 37 - DA9063_ID_LDO7, 38 - DA9063_ID_LDO8, 39 - DA9063_ID_LDO9, 40 - DA9063_ID_LDO11, 41 - 42 - /* DA9063-only LDOs */ 43 - DA9063_ID_LDO1, 44 - DA9063_ID_LDO2, 45 - DA9063_ID_LDO4, 46 - DA9063_ID_LDO5, 47 - DA9063_ID_LDO6, 48 - DA9063_ID_LDO10, 49 - }; 50 - 51 - /* Regulators platform data */ 52 - struct da9063_regulator_data { 53 - int id; 54 - struct regulator_init_data *initdata; 55 - }; 56 - 57 - struct da9063_regulators_pdata { 58 - unsigned n_regulators; 59 - struct da9063_regulator_data *regulator_data; 60 - }; 61 - 62 - 63 14 /* 64 15 * RGB LED configuration 65 16 */
+5
include/linux/mfd/samsung/s2mps11.h
··· 190 190 #define S2MPS11_BUCK6_RAMP_EN_SHIFT 0 191 191 #define S2MPS11_PMIC_EN_SHIFT 6 192 192 193 + /* 194 + * Bits for "enable suspend" (On/Off controlled by PWREN) 195 + * are the same as in S2MPS14: S2MPS14_ENABLE_SUSPEND 196 + */ 197 + 193 198 #endif /* __LINUX_MFD_S2MPS11_H */
-1
include/linux/mfd/wm831x/pdata.h
··· 47 47 * I2C or SPI buses. 48 48 */ 49 49 struct wm831x_buckv_pdata { 50 - int dvs_gpio; /** CPU GPIO to use for DVS switching */ 51 50 int dvs_control_src; /** Hardware DVS source to use (1 or 2) */ 52 51 int dvs_init_state; /** DVS state to expect on startup */ 53 52 int dvs_state_gpio; /** CPU GPIO to use for monitoring status */
+6
include/linux/regulator/driver.h
··· 283 283 * @vsel_range_mask: Mask for register bitfield used for range selector 284 284 * @vsel_reg: Register for selector when using regulator_regmap_X_voltage_ 285 285 * @vsel_mask: Mask for register bitfield used for selector 286 + * @vsel_step: Specify the resolution of selector stepping when setting 287 + * voltage. If 0, then no stepping is done (requested selector is 288 + * set directly), if >0 then the regulator API will ramp the 289 + * voltage up/down gradually each time increasing/decreasing the 290 + * selector by the specified step value. 286 291 * @csel_reg: Register for current limit selector using regmap set_current_limit 287 292 * @csel_mask: Mask for register bitfield used for current limit selector 288 293 * @apply_reg: Register for initiate voltage change on the output when ··· 362 357 unsigned int vsel_range_mask; 363 358 unsigned int vsel_reg; 364 359 unsigned int vsel_mask; 360 + unsigned int vsel_step; 365 361 unsigned int csel_reg; 366 362 unsigned int csel_mask; 367 363 unsigned int apply_reg;
-3
include/linux/regulator/max8952.h
··· 105 105 #define MAX8952_NUM_DVS_MODE 4 106 106 107 107 struct max8952_platform_data { 108 - int gpio_vid0; 109 - int gpio_vid1; 110 - 111 108 u32 default_mode; 112 109 u32 dvs_mode[MAX8952_NUM_DVS_MODE]; /* MAX8952_DVS_MODEx_XXXXmV */ 113 110