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Merge tag 'omap-for-v5.2/fixes-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes

Fixes for omap variants for dra7 mmc voltage and boot issues

This series contains dra7 mmc voltage fixes, and fixes to the recent
changes to probe devices with device tree data insteas of legacy
platform data:

- Two fixes for dra7 mmc that needs 1.8V mode disabled as in case of a
reset, the bootrom will try to access the mmc card at 3.3V potentially
damaging the card

- Two regression fixes for am335x d_can. We must allow devices with no
control registers for ti-sysc interconnect target module driver for
at least d_can, and we remove the incorrect control registers for
d_can. And we must configure the osc clock for d_can as otherwise
register access may fail depending on the bootloader version

- Four regression fixes for dra7 variant dts files to tag rtc and usb4
as disabled for dra71x and dra76x. These SoC variants do not have
these devices, and got accidentally enabled when the L4 interconnect
got defined in the dra7-l4.dtsi for the dra7 SoC family

* tag 'omap-for-v5.2/fixes-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: dra71x: Disable usb4_tm target module
ARM: dts: dra71x: Disable rtc target module
ARM: dts: dra76x: Disable usb4_tm target module
ARM: dts: dra76x: Disable rtc target module
ARM: dts: dra76x: Update MMC2_HS200_MANUAL1 iodelay values
ARM: dts: am57xx-idk: Remove support for voltage switching for SD card
bus: ti-sysc: Handle devices with no control registers
ARM: dts: Configure osc clock for d_can on am335x

Signed-off-by: Olof Johansson <olof@lixom.net>

Olof Johansson 6515a2ce 4bded299

+65 -46
+6 -8
arch/arm/boot/dts/am33xx-l4.dtsi
··· 1759 1759 target-module@cc000 { /* 0x481cc000, ap 60 46.0 */ 1760 1760 compatible = "ti,sysc-omap4", "ti,sysc"; 1761 1761 ti,hwmods = "d_can0"; 1762 - reg = <0xcc000 0x4>; 1763 - reg-names = "rev"; 1764 1762 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1765 - clocks = <&l4ls_clkctrl AM3_L4LS_D_CAN0_CLKCTRL 0>; 1766 - clock-names = "fck"; 1763 + clocks = <&l4ls_clkctrl AM3_L4LS_D_CAN0_CLKCTRL 0>, 1764 + <&dcan0_fck>; 1765 + clock-names = "fck", "osc"; 1767 1766 #address-cells = <1>; 1768 1767 #size-cells = <1>; 1769 1768 ranges = <0x0 0xcc000 0x2000>; ··· 1781 1782 target-module@d0000 { /* 0x481d0000, ap 62 42.0 */ 1782 1783 compatible = "ti,sysc-omap4", "ti,sysc"; 1783 1784 ti,hwmods = "d_can1"; 1784 - reg = <0xd0000 0x4>; 1785 - reg-names = "rev"; 1786 1785 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1787 - clocks = <&l4ls_clkctrl AM3_L4LS_D_CAN1_CLKCTRL 0>; 1788 - clock-names = "fck"; 1786 + clocks = <&l4ls_clkctrl AM3_L4LS_D_CAN1_CLKCTRL 0>, 1787 + <&dcan1_fck>; 1788 + clock-names = "fck", "osc"; 1789 1789 #address-cells = <1>; 1790 1790 #size-cells = <1>; 1791 1791 ranges = <0x0 0xd0000 0x2000>;
-4
arch/arm/boot/dts/am437x-l4.dtsi
··· 1575 1575 target-module@cc000 { /* 0x481cc000, ap 50 46.0 */ 1576 1576 compatible = "ti,sysc-omap4", "ti,sysc"; 1577 1577 ti,hwmods = "d_can0"; 1578 - reg = <0xcc000 0x4>; 1579 - reg-names = "rev"; 1580 1578 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1581 1579 clocks = <&l4ls_clkctrl AM4_L4LS_D_CAN0_CLKCTRL 0>; 1582 1580 clock-names = "fck"; ··· 1594 1596 target-module@d0000 { /* 0x481d0000, ap 52 3a.0 */ 1595 1597 compatible = "ti,sysc-omap4", "ti,sysc"; 1596 1598 ti,hwmods = "d_can1"; 1597 - reg = <0xd0000 0x4>; 1598 - reg-names = "rev"; 1599 1599 /* Domains (P, C): per_pwrdm, l4ls_clkdm */ 1600 1600 clocks = <&l4ls_clkctrl AM4_L4LS_D_CAN1_CLKCTRL 0>; 1601 1601 clock-names = "fck";
+1
arch/arm/boot/dts/am57xx-idk-common.dtsi
··· 420 420 vqmmc-supply = <&ldo1_reg>; 421 421 bus-width = <4>; 422 422 cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>; /* gpio 219 */ 423 + no-1-8-v; 423 424 }; 424 425 425 426 &mmc2 {
+1 -1
arch/arm/boot/dts/dra7-l4.dtsi
··· 3543 3543 }; 3544 3544 }; 3545 3545 3546 - target-module@38000 { /* 0x48838000, ap 29 12.0 */ 3546 + rtctarget: target-module@38000 { /* 0x48838000, ap 29 12.0 */ 3547 3547 compatible = "ti,sysc-omap4-simple", "ti,sysc"; 3548 3548 ti,hwmods = "rtcss"; 3549 3549 reg = <0x38074 0x4>,
+1 -1
arch/arm/boot/dts/dra71-evm.dts
··· 6 6 * published by the Free Software Foundation. 7 7 */ 8 8 9 - #include "dra72-evm-common.dtsi" 9 + #include "dra71x.dtsi" 10 10 #include "dra7-mmc-iodelay.dtsi" 11 11 #include "dra72x-mmc-iodelay.dtsi" 12 12 #include <dt-bindings/net/ti-dp83867.h>
+17
arch/arm/boot/dts/dra71x.dtsi
··· 1 + /* 2 + * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ 3 + * 4 + * This program is free software; you can redistribute it and/or modify 5 + * it under the terms of the GNU General Public License version 2 as 6 + * published by the Free Software Foundation. 7 + */ 8 + 9 + #include "dra72-evm-common.dtsi" 10 + 11 + &rtctarget { 12 + status = "disabled"; 13 + }; 14 + 15 + &usb4_tm { 16 + status = "disabled"; 17 + };
+20 -20
arch/arm/boot/dts/dra76x-mmc-iodelay.dtsi
··· 22 22 * 23 23 * Datamanual Revisions: 24 24 * 25 - * DRA76x Silicon Revision 1.0: SPRS993A, Revised July 2017 25 + * DRA76x Silicon Revision 1.0: SPRS993E, Revised December 2018 26 26 * 27 27 */ 28 28 ··· 169 169 /* Corresponds to MMC2_HS200_MANUAL1 in datamanual */ 170 170 mmc2_iodelay_hs200_conf: mmc2_iodelay_hs200_conf { 171 171 pinctrl-pin-array = < 172 - 0x190 A_DELAY_PS(384) G_DELAY_PS(0) /* CFG_GPMC_A19_OEN */ 173 - 0x194 A_DELAY_PS(0) G_DELAY_PS(174) /* CFG_GPMC_A19_OUT */ 174 - 0x1a8 A_DELAY_PS(410) G_DELAY_PS(0) /* CFG_GPMC_A20_OEN */ 175 - 0x1ac A_DELAY_PS(85) G_DELAY_PS(0) /* CFG_GPMC_A20_OUT */ 176 - 0x1b4 A_DELAY_PS(468) G_DELAY_PS(0) /* CFG_GPMC_A21_OEN */ 177 - 0x1b8 A_DELAY_PS(139) G_DELAY_PS(0) /* CFG_GPMC_A21_OUT */ 178 - 0x1c0 A_DELAY_PS(676) G_DELAY_PS(0) /* CFG_GPMC_A22_OEN */ 179 - 0x1c4 A_DELAY_PS(69) G_DELAY_PS(0) /* CFG_GPMC_A22_OUT */ 180 - 0x1d0 A_DELAY_PS(1062) G_DELAY_PS(154) /* CFG_GPMC_A23_OUT */ 181 - 0x1d8 A_DELAY_PS(640) G_DELAY_PS(0) /* CFG_GPMC_A24_OEN */ 182 - 0x1dc A_DELAY_PS(0) G_DELAY_PS(0) /* CFG_GPMC_A24_OUT */ 183 - 0x1e4 A_DELAY_PS(356) G_DELAY_PS(0) /* CFG_GPMC_A25_OEN */ 184 - 0x1e8 A_DELAY_PS(0) G_DELAY_PS(0) /* CFG_GPMC_A25_OUT */ 185 - 0x1f0 A_DELAY_PS(579) G_DELAY_PS(0) /* CFG_GPMC_A26_OEN */ 186 - 0x1f4 A_DELAY_PS(0) G_DELAY_PS(0) /* CFG_GPMC_A26_OUT */ 187 - 0x1fc A_DELAY_PS(435) G_DELAY_PS(0) /* CFG_GPMC_A27_OEN */ 188 - 0x200 A_DELAY_PS(36) G_DELAY_PS(0) /* CFG_GPMC_A27_OUT */ 189 - 0x364 A_DELAY_PS(759) G_DELAY_PS(0) /* CFG_GPMC_CS1_OEN */ 190 - 0x368 A_DELAY_PS(72) G_DELAY_PS(0) /* CFG_GPMC_CS1_OUT */ 172 + 0x190 A_DELAY_PS(384) G_DELAY_PS(0) /* CFG_GPMC_A19_OEN */ 173 + 0x194 A_DELAY_PS(350) G_DELAY_PS(174) /* CFG_GPMC_A19_OUT */ 174 + 0x1a8 A_DELAY_PS(410) G_DELAY_PS(0) /* CFG_GPMC_A20_OEN */ 175 + 0x1ac A_DELAY_PS(335) G_DELAY_PS(0) /* CFG_GPMC_A20_OUT */ 176 + 0x1b4 A_DELAY_PS(468) G_DELAY_PS(0) /* CFG_GPMC_A21_OEN */ 177 + 0x1b8 A_DELAY_PS(339) G_DELAY_PS(0) /* CFG_GPMC_A21_OUT */ 178 + 0x1c0 A_DELAY_PS(676) G_DELAY_PS(0) /* CFG_GPMC_A22_OEN */ 179 + 0x1c4 A_DELAY_PS(219) G_DELAY_PS(0) /* CFG_GPMC_A22_OUT */ 180 + 0x1d0 A_DELAY_PS(1062) G_DELAY_PS(154) /* CFG_GPMC_A23_OUT */ 181 + 0x1d8 A_DELAY_PS(640) G_DELAY_PS(0) /* CFG_GPMC_A24_OEN */ 182 + 0x1dc A_DELAY_PS(150) G_DELAY_PS(0) /* CFG_GPMC_A24_OUT */ 183 + 0x1e4 A_DELAY_PS(356) G_DELAY_PS(0) /* CFG_GPMC_A25_OEN */ 184 + 0x1e8 A_DELAY_PS(150) G_DELAY_PS(0) /* CFG_GPMC_A25_OUT */ 185 + 0x1f0 A_DELAY_PS(579) G_DELAY_PS(0) /* CFG_GPMC_A26_OEN */ 186 + 0x1f4 A_DELAY_PS(200) G_DELAY_PS(0) /* CFG_GPMC_A26_OUT */ 187 + 0x1fc A_DELAY_PS(435) G_DELAY_PS(0) /* CFG_GPMC_A27_OEN */ 188 + 0x200 A_DELAY_PS(236) G_DELAY_PS(0) /* CFG_GPMC_A27_OUT */ 189 + 0x364 A_DELAY_PS(759) G_DELAY_PS(0) /* CFG_GPMC_CS1_OEN */ 190 + 0x368 A_DELAY_PS(372) G_DELAY_PS(0) /* CFG_GPMC_CS1_OUT */ 191 191 >; 192 192 }; 193 193
+8
arch/arm/boot/dts/dra76x.dtsi
··· 81 81 reg = <0x3fc>; 82 82 }; 83 83 }; 84 + 85 + &rtctarget { 86 + status = "disabled"; 87 + }; 88 + 89 + &usb4_tm { 90 + status = "disabled"; 91 + };
+11 -12
drivers/bus/ti-sysc.c
··· 660 660 nr_regs++; 661 661 } 662 662 663 - if (nr_regs < 1) { 664 - dev_err(ddata->dev, "missing registers\n"); 665 - 666 - return -EINVAL; 667 - } 668 - 669 663 if (nr_matches > nr_regs) { 670 664 dev_err(ddata->dev, "overlapping registers: (%i/%i)", 671 665 nr_regs, nr_matches); ··· 685 691 { 686 692 int size; 687 693 688 - size = max3(ddata->offsets[SYSC_REVISION], 689 - ddata->offsets[SYSC_SYSCONFIG], 690 - ddata->offsets[SYSC_SYSSTATUS]); 694 + if (ddata->offsets[SYSC_REVISION] < 0 && 695 + ddata->offsets[SYSC_SYSCONFIG] < 0 && 696 + ddata->offsets[SYSC_SYSSTATUS] < 0) { 697 + size = ddata->module_size; 698 + } else { 699 + size = max3(ddata->offsets[SYSC_REVISION], 700 + ddata->offsets[SYSC_SYSCONFIG], 701 + ddata->offsets[SYSC_SYSSTATUS]); 691 702 692 - if (size < 0 || (size + sizeof(u32)) > ddata->module_size) 693 - return -EINVAL; 703 + if ((size + sizeof(u32)) > ddata->module_size) 704 + return -EINVAL; 705 + } 694 706 695 707 ddata->module_va = devm_ioremap(ddata->dev, 696 708 ddata->module_pa, ··· 1128 1128 SYSC_QUIRK("cpgmac", 0, 0x1200, 0x1208, 0x1204, 0x4edb1902, 1129 1129 0xffff00f0, 0), 1130 1130 SYSC_QUIRK("dcan", 0, 0, -1, -1, 0xffffffff, 0xffffffff, 0), 1131 - SYSC_QUIRK("dcan", 0, 0, -1, -1, 0x00001401, 0xffffffff, 0), 1132 1131 SYSC_QUIRK("dmic", 0, 0, 0x10, -1, 0x50010000, 0xffffffff, 0), 1133 1132 SYSC_QUIRK("dwc3", 0, 0, 0x10, -1, 0x500a0200, 0xffffffff, 0), 1134 1133 SYSC_QUIRK("epwmss", 0, 0, 0x4, -1, 0x47400001, 0xffffffff, 0),