rtc: rzn1: Avoid mixing variables

In the ->set_offset() callback, the 'val' variable is used for two
different purposes at the same time, which is oviously wrong:
- It contains the intermediate value of the SUBU register that must be
written at the end of ->set_offset().
- It is used in the middle of the above calculations to poll the CTL2
register for a specific value.

Let's introduce a 'ctl2' variable just for the readl_poll_timeout()
call and use it there in place of 'var'.

In order to avoid mixing those two variables again, let's rename the
remaining occurences of 'val' into 'subu' and initialize it to 0 to
avoid the uninitialized variable situation reported by Tom Rix and Colin
Ian King already.

Fixes: be4a11cf98af ("rtc: rzn1: Add oscillator offset support")
Reported-by: Tom Rix <[e-mail]>
Reported-by: Colin Ian King <[e-mail]>
Signed-off-by: Miquel Raynal <[e-mail]>
Signed-off-by: Alexandre Belloni <[e-mail]>
Link: https://lore.kernel.org/r/[e-mail]

drivers/rtc/rtc-rzn1.c

···
 	struct rzn1_rtc *rtc = dev_get_drvdata(dev);
 	unsigned int steps;
 	int stepsh, stepsl;
-	u32 val;
+	u32 subu = 0, ctl2;
 	int ret;
 
 	/*
···
 	if (stepsh >= -0x3E && stepsh <= 0x3E) {
 		/* 1017 ppb per step */
 		steps = stepsh;
-		val |= RZN1_RTC_SUBU_DEV;
+		subu |= RZN1_RTC_SUBU_DEV;
 	} else if (stepsl >= -0x3E && stepsl <= 0x3E) {
 		/* 3051 ppb per step */
 		steps = stepsl;
···
 		return 0;
 
 	if (steps > 0) {
-		val |= steps + 1;
+		subu |= steps + 1;
 	} else {
-		val |= RZN1_RTC_SUBU_DECR;
-		val |= (~(-steps - 1)) & 0x3F;
+		subu |= RZN1_RTC_SUBU_DECR;
+		subu |= (~(-steps - 1)) & 0x3F;
 	}
 
-	ret = readl_poll_timeout(rtc->base + RZN1_RTC_CTL2, val,
-				 !(val & RZN1_RTC_CTL2_WUST), 100, 2000000);
+	ret = readl_poll_timeout(rtc->base + RZN1_RTC_CTL2, ctl2,
+				 !(ctl2 & RZN1_RTC_CTL2_WUST), 100, 2000000);
 	if (ret)
 		return ret;
 
-	writel(val, rtc->base + RZN1_RTC_SUBU);
+	writel(subu, rtc->base + RZN1_RTC_SUBU);
 
 	return 0;
 }