[MIPS] SMTC: Synchronize cp0 counters on bootup.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

+1
+1
arch/mips/kernel/smtc.c
··· 476 write_vpe_c0_compare(0); 477 /* Propagate Config7 */ 478 write_vpe_c0_config7(read_c0_config7()); 479 } 480 /* enable multi-threading within VPE */ 481 write_vpe_c0_vpecontrol(read_vpe_c0_vpecontrol() | VPECONTROL_TE);
··· 476 write_vpe_c0_compare(0); 477 /* Propagate Config7 */ 478 write_vpe_c0_config7(read_c0_config7()); 479 + write_vpe_c0_count(read_c0_count()); 480 } 481 /* enable multi-threading within VPE */ 482 write_vpe_c0_vpecontrol(read_vpe_c0_vpecontrol() | VPECONTROL_TE);