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kernel os linux

brcm80211: smac: remove register access macro definitions

The register access macros like R_REG/W_REG/etc. are no longer
needed as the driver uses the BCMA provided functions.

Reviewed-by: Pieter-Paul Giesberts <pieterpg@broadcom.com>
Reviewed-by: Alwin Beukers <alwin@broadcom.com>
Signed-off-by: Arend van Spriel <arend@broadcom.com>
Signed-off-by: Franky Lin <frankyl@broadcom.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>

authored by

Arend van Spriel and committed by
John W. Linville
646e2615 c8086745

-51
-51
drivers/net/wireless/brcm80211/brcmsmac/types.h
··· 250 250 wiphy_err(dev, "%s: " fmt, __func__, ##args); \ 251 251 } while (0) 252 252 253 - /* 254 - * Register access macros. 255 - * 256 - * These macro's take a pointer to the address to read as one of their 257 - * arguments. The macro itself deduces the size of the IO transaction (u8, u16 258 - * or u32). Advantage of this approach in combination with using a struct to 259 - * define the registers in a register block, is that access size and access 260 - * location are defined in only one spot. This reduces the risk of the 261 - * programmer trying to use an unsupported transaction size on a register. 262 - * 263 - */ 264 - 265 - #define R_REG(r) \ 266 - ({ \ 267 - __typeof(*(r)) __osl_v; \ 268 - switch (sizeof(*(r))) { \ 269 - case sizeof(u8): \ 270 - __osl_v = readb((u8 __iomem *)(r)); \ 271 - break; \ 272 - case sizeof(u16): \ 273 - __osl_v = readw((u16 __iomem *)(r)); \ 274 - break; \ 275 - case sizeof(u32): \ 276 - __osl_v = readl((u32 __iomem *)(r)); \ 277 - break; \ 278 - } \ 279 - __osl_v; \ 280 - }) 281 - 282 - #define W_REG(r, v) do { \ 283 - switch (sizeof(*(r))) { \ 284 - case sizeof(u8): \ 285 - writeb((u8)((v) & 0xFF), (u8 __iomem *)(r)); \ 286 - break; \ 287 - case sizeof(u16): \ 288 - writew((u16)((v) & 0xFFFF), (u16 __iomem *)(r)); \ 289 - break; \ 290 - case sizeof(u32): \ 291 - writel((u32)(v), (u32 __iomem *)(r)); \ 292 - break; \ 293 - } \ 294 - } while (0) 295 - 296 253 #ifdef CONFIG_BCM47XX 297 254 /* 298 255 * bcm4716 (which includes 4717 & 4718), plus 4706 on PCIe can reorder 299 256 * transactions. As a fix, a read after write is performed on certain places 300 257 * in the code. Older chips and the newer 5357 family don't require this fix. 301 258 */ 302 - #define W_REG_FLUSH(r, v) ({ W_REG((r), (v)); (void)R_REG(r); }) 303 259 #define bcma_wflush16(c, o, v) \ 304 260 ({ bcma_write16(c, o, v); (void)bcma_read16(c, o); }) 305 261 #else 306 - #define W_REG_FLUSH(r, v) W_REG((r), (v)) 307 262 #define bcma_wflush16(c, o, v) bcma_write16(c, o, v) 308 263 #endif /* CONFIG_BCM47XX */ 309 - 310 - #define AND_REG(r, v) W_REG((r), R_REG(r) & (v)) 311 - #define OR_REG(r, v) W_REG((r), R_REG(r) | (v)) 312 - 313 - #define SET_REG(r, mask, val) \ 314 - W_REG((r), ((R_REG(r) & ~(mask)) | (val))) 315 264 316 265 /* multi-bool data type: set of bools, mbool is true if any is set */ 317 266