Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge remote-tracking branches 'asoc/topic/tas2552', 'asoc/topic/tas5720', 'asoc/topic/tegra', 'asoc/topic/tlv320aic32x4' and 'asoc/topic/tlv320aic3x' into asoc-next

+330 -45
+12 -1
Documentation/devicetree/bindings/sound/tlv320aic32x4.txt
··· 3 3 The tlv320aic32x4 serial control bus communicates through I2C protocols 4 4 5 5 Required properties: 6 - - compatible: Should be "ti,tlv320aic32x4" 6 + - compatible - "string" - One of: 7 + "ti,tlv320aic32x4" TLV320AIC3204 8 + "ti,tlv320aic32x6" TLV320AIC3206, TLV320AIC3256 7 9 - reg: I2C slave address 8 10 - supply-*: Required supply regulators are: 9 11 "iov" - digital IO power supply ··· 20 18 - reset-gpios: Reset-GPIO phandle with args as described in gpio/gpio.txt 21 19 - clocks/clock-names: Clock named 'mclk' for the master clock of the codec. 22 20 See clock/clock-bindings.txt for information about the detailed format. 21 + - aic32x4-gpio-func - <array of 5 int> 22 + - Types are defined in include/sound/tlv320aic32x4.h 23 23 24 24 25 25 Example: ··· 31 27 reg = <0x18>; 32 28 clocks = <&clks 201>; 33 29 clock-names = "mclk"; 30 + aic32x4-gpio-func= < 31 + 0xff /* AIC32X4_MFPX_DEFAULT_VALUE */ 32 + 0xff /* AIC32X4_MFPX_DEFAULT_VALUE */ 33 + 0x04 /* MFP3 AIC32X4_MFP3_GPIO_ENABLED */ 34 + 0xff /* AIC32X4_MFPX_DEFAULT_VALUE */ 35 + 0x08 /* MFP5 AIC32X4_MFP5_GPIO_INPUT */ 36 + >; 34 37 };
+5
Documentation/devicetree/bindings/sound/tlv320aic3x.txt
··· 26 26 3 - MICBIAS output is connected to AVDD, 27 27 If this node is not mentioned or if the value is incorrect, then MicBias 28 28 is powered down. 29 + - ai3x-ocmv - Output Common-Mode Voltage selection: 30 + 0 - 1.35V, 31 + 1 - 1.5V, 32 + 2 - 1.65V, 33 + 3 - 1.8V 29 34 - AVDD-supply, IOVDD-supply, DRVDD-supply, DVDD-supply : power supplies for the 30 35 device as covered in Documentation/devicetree/bindings/regulator/regulator.txt 31 36
+23
include/sound/tlv320aic32x4.h
··· 22 22 #define AIC32X4_MICPGA_ROUTE_LMIC_IN2R_10K 0x00000001 23 23 #define AIC32X4_MICPGA_ROUTE_RMIC_IN1L_10K 0x00000002 24 24 25 + /* GPIO API */ 26 + #define AIC32X4_MFPX_DEFAULT_VALUE 0xff 27 + 28 + #define AIC32X4_MFP1_DIN_DISABLED 0 29 + #define AIC32X4_MFP1_DIN_ENABLED 0x2 30 + #define AIC32X4_MFP1_GPIO_IN 0x4 31 + 32 + #define AIC32X4_MFP2_GPIO_OUT_LOW 0x0 33 + #define AIC32X4_MFP2_GPIO_OUT_HIGH 0x1 34 + 35 + #define AIC32X4_MFP_GPIO_ENABLED 0x4 36 + 37 + #define AIC32X4_MFP5_GPIO_DISABLED 0x0 38 + #define AIC32X4_MFP5_GPIO_INPUT 0x8 39 + #define AIC32X4_MFP5_GPIO_OUTPUT 0xc 40 + #define AIC32X4_MFP5_GPIO_OUT_LOW 0x0 41 + #define AIC32X4_MFP5_GPIO_OUT_HIGH 0x1 42 + 43 + struct aic32x4_setup_data { 44 + unsigned int gpio_func[5]; 45 + }; 46 + 25 47 struct aic32x4_pdata { 48 + struct aic32x4_setup_data *setup; 26 49 u32 power_cfg; 27 50 u32 micpga_routing; 28 51 bool swapdacs;
+7 -4
sound/soc/codecs/tas2552.c
··· 192 192 * pll_clk = (.5 * pll_clkin * J.D) / 2^p 193 193 * Need to fill in J and D here based on incoming freq 194 194 */ 195 - unsigned int d; 195 + unsigned int d, q, t; 196 196 u8 j; 197 197 u8 pll_sel = (tas2552->pll_clk_id << 3) & TAS2552_PLL_SRC_MASK; 198 198 u8 p = snd_soc_read(codec, TAS2552_PLL_CTRL_1); ··· 200 200 p = (p >> 7); 201 201 202 202 recalc: 203 - j = (pll_clk * 2 * (1 << p)) / pll_clkin; 204 - d = (pll_clk * 2 * (1 << p)) % pll_clkin; 205 - d /= (pll_clkin / 10000); 203 + t = (pll_clk * 2) << p; 204 + j = t / pll_clkin; 205 + d = t % pll_clkin; 206 + t = pll_clkin / 10000; 207 + q = d / (t + 1); 208 + d = q + ((9999 - pll_clkin % 10000) * (d / t - q)) / 10000; 206 209 207 210 if (d && (pll_clkin < 512000 || pll_clkin > 9200000)) { 208 211 if (tas2552->pll_clk_id == TAS2552_PLL_CLKIN_BCLK) {
+2
sound/soc/codecs/tlv320aic32x4-i2c.c
··· 47 47 48 48 static const struct i2c_device_id aic32x4_i2c_id[] = { 49 49 { "tlv320aic32x4", 0 }, 50 + { "tlv320aic32x6", 1 }, 50 51 { /* sentinel */ } 51 52 }; 52 53 MODULE_DEVICE_TABLE(i2c, aic32x4_i2c_id); 53 54 54 55 static const struct of_device_id aic32x4_of_id[] = { 55 56 { .compatible = "ti,tlv320aic32x4", }, 57 + { .compatible = "ti,tlv320aic32x6", }, 56 58 { /* senitel */ } 57 59 }; 58 60 MODULE_DEVICE_TABLE(of, aic32x4_of_id);
+2
sound/soc/codecs/tlv320aic32x4-spi.c
··· 48 48 49 49 static const struct spi_device_id aic32x4_spi_id[] = { 50 50 { "tlv320aic32x4", 0 }, 51 + { "tlv320aic32x6", 1 }, 51 52 { /* sentinel */ } 52 53 }; 53 54 MODULE_DEVICE_TABLE(spi, aic32x4_spi_id); 54 55 55 56 static const struct of_device_id aic32x4_of_id[] = { 56 57 { .compatible = "ti,tlv320aic32x4", }, 58 + { .compatible = "ti,tlv320aic32x6", }, 57 59 { /* senitel */ } 58 60 }; 59 61 MODULE_DEVICE_TABLE(of, aic32x4_of_id);
+206
sound/soc/codecs/tlv320aic32x4.c
··· 74 74 struct regulator *supply_iov; 75 75 struct regulator *supply_dv; 76 76 struct regulator *supply_av; 77 + 78 + struct aic32x4_setup_data *setup; 79 + struct device *dev; 80 + }; 81 + 82 + static int aic32x4_get_mfp1_gpio(struct snd_kcontrol *kcontrol, 83 + struct snd_ctl_elem_value *ucontrol) 84 + { 85 + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 86 + u8 val; 87 + 88 + val = snd_soc_read(codec, AIC32X4_DINCTL); 89 + 90 + ucontrol->value.integer.value[0] = (val & 0x01); 91 + 92 + return 0; 93 + }; 94 + 95 + static int aic32x4_set_mfp2_gpio(struct snd_kcontrol *kcontrol, 96 + struct snd_ctl_elem_value *ucontrol) 97 + { 98 + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 99 + u8 val; 100 + u8 gpio_check; 101 + 102 + val = snd_soc_read(codec, AIC32X4_DOUTCTL); 103 + gpio_check = (val & AIC32X4_MFP_GPIO_ENABLED); 104 + if (gpio_check != AIC32X4_MFP_GPIO_ENABLED) { 105 + printk(KERN_ERR "%s: MFP2 is not configure as a GPIO output\n", 106 + __func__); 107 + return -EINVAL; 108 + } 109 + 110 + if (ucontrol->value.integer.value[0] == (val & AIC32X4_MFP2_GPIO_OUT_HIGH)) 111 + return 0; 112 + 113 + if (ucontrol->value.integer.value[0]) 114 + val |= ucontrol->value.integer.value[0]; 115 + else 116 + val &= ~AIC32X4_MFP2_GPIO_OUT_HIGH; 117 + 118 + snd_soc_write(codec, AIC32X4_DOUTCTL, val); 119 + 120 + return 0; 121 + }; 122 + 123 + static int aic32x4_get_mfp3_gpio(struct snd_kcontrol *kcontrol, 124 + struct snd_ctl_elem_value *ucontrol) 125 + { 126 + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 127 + u8 val; 128 + 129 + val = snd_soc_read(codec, AIC32X4_SCLKCTL); 130 + 131 + ucontrol->value.integer.value[0] = (val & 0x01); 132 + 133 + return 0; 134 + }; 135 + 136 + static int aic32x4_set_mfp4_gpio(struct snd_kcontrol *kcontrol, 137 + struct snd_ctl_elem_value *ucontrol) 138 + { 139 + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 140 + u8 val; 141 + u8 gpio_check; 142 + 143 + val = snd_soc_read(codec, AIC32X4_MISOCTL); 144 + gpio_check = (val & AIC32X4_MFP_GPIO_ENABLED); 145 + if (gpio_check != AIC32X4_MFP_GPIO_ENABLED) { 146 + printk(KERN_ERR "%s: MFP4 is not configure as a GPIO output\n", 147 + __func__); 148 + return -EINVAL; 149 + } 150 + 151 + if (ucontrol->value.integer.value[0] == (val & AIC32X4_MFP5_GPIO_OUT_HIGH)) 152 + return 0; 153 + 154 + if (ucontrol->value.integer.value[0]) 155 + val |= ucontrol->value.integer.value[0]; 156 + else 157 + val &= ~AIC32X4_MFP5_GPIO_OUT_HIGH; 158 + 159 + snd_soc_write(codec, AIC32X4_MISOCTL, val); 160 + 161 + return 0; 162 + }; 163 + 164 + static int aic32x4_get_mfp5_gpio(struct snd_kcontrol *kcontrol, 165 + struct snd_ctl_elem_value *ucontrol) 166 + { 167 + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 168 + u8 val; 169 + 170 + val = snd_soc_read(codec, AIC32X4_GPIOCTL); 171 + ucontrol->value.integer.value[0] = ((val & 0x2) >> 1); 172 + 173 + return 0; 174 + }; 175 + 176 + static int aic32x4_set_mfp5_gpio(struct snd_kcontrol *kcontrol, 177 + struct snd_ctl_elem_value *ucontrol) 178 + { 179 + struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 180 + u8 val; 181 + u8 gpio_check; 182 + 183 + val = snd_soc_read(codec, AIC32X4_GPIOCTL); 184 + gpio_check = (val & AIC32X4_MFP5_GPIO_OUTPUT); 185 + if (gpio_check != AIC32X4_MFP5_GPIO_OUTPUT) { 186 + printk(KERN_ERR "%s: MFP5 is not configure as a GPIO output\n", 187 + __func__); 188 + return -EINVAL; 189 + } 190 + 191 + if (ucontrol->value.integer.value[0] == (val & 0x1)) 192 + return 0; 193 + 194 + if (ucontrol->value.integer.value[0]) 195 + val |= ucontrol->value.integer.value[0]; 196 + else 197 + val &= 0xfe; 198 + 199 + snd_soc_write(codec, AIC32X4_GPIOCTL, val); 200 + 201 + return 0; 202 + }; 203 + 204 + static const struct snd_kcontrol_new aic32x4_mfp1[] = { 205 + SOC_SINGLE_BOOL_EXT("MFP1 GPIO", 0, aic32x4_get_mfp1_gpio, NULL), 206 + }; 207 + 208 + static const struct snd_kcontrol_new aic32x4_mfp2[] = { 209 + SOC_SINGLE_BOOL_EXT("MFP2 GPIO", 0, NULL, aic32x4_set_mfp2_gpio), 210 + }; 211 + 212 + static const struct snd_kcontrol_new aic32x4_mfp3[] = { 213 + SOC_SINGLE_BOOL_EXT("MFP3 GPIO", 0, aic32x4_get_mfp3_gpio, NULL), 214 + }; 215 + 216 + static const struct snd_kcontrol_new aic32x4_mfp4[] = { 217 + SOC_SINGLE_BOOL_EXT("MFP4 GPIO", 0, NULL, aic32x4_set_mfp4_gpio), 218 + }; 219 + 220 + static const struct snd_kcontrol_new aic32x4_mfp5[] = { 221 + SOC_SINGLE_BOOL_EXT("MFP5 GPIO", 0, aic32x4_get_mfp5_gpio, 222 + aic32x4_set_mfp5_gpio), 77 223 }; 78 224 79 225 /* 0dB min, 0.5dB steps */ ··· 880 734 .symmetric_rates = 1, 881 735 }; 882 736 737 + static void aic32x4_setup_gpios(struct snd_soc_codec *codec) 738 + { 739 + struct aic32x4_priv *aic32x4 = snd_soc_codec_get_drvdata(codec); 740 + 741 + /* setup GPIO functions */ 742 + /* MFP1 */ 743 + if (aic32x4->setup->gpio_func[0] != AIC32X4_MFPX_DEFAULT_VALUE) { 744 + snd_soc_write(codec, AIC32X4_DINCTL, 745 + aic32x4->setup->gpio_func[0]); 746 + snd_soc_add_codec_controls(codec, aic32x4_mfp1, 747 + ARRAY_SIZE(aic32x4_mfp1)); 748 + } 749 + 750 + /* MFP2 */ 751 + if (aic32x4->setup->gpio_func[1] != AIC32X4_MFPX_DEFAULT_VALUE) { 752 + snd_soc_write(codec, AIC32X4_DOUTCTL, 753 + aic32x4->setup->gpio_func[1]); 754 + snd_soc_add_codec_controls(codec, aic32x4_mfp2, 755 + ARRAY_SIZE(aic32x4_mfp2)); 756 + } 757 + 758 + /* MFP3 */ 759 + if (aic32x4->setup->gpio_func[2] != AIC32X4_MFPX_DEFAULT_VALUE) { 760 + snd_soc_write(codec, AIC32X4_SCLKCTL, 761 + aic32x4->setup->gpio_func[2]); 762 + snd_soc_add_codec_controls(codec, aic32x4_mfp3, 763 + ARRAY_SIZE(aic32x4_mfp3)); 764 + } 765 + 766 + /* MFP4 */ 767 + if (aic32x4->setup->gpio_func[3] != AIC32X4_MFPX_DEFAULT_VALUE) { 768 + snd_soc_write(codec, AIC32X4_MISOCTL, 769 + aic32x4->setup->gpio_func[3]); 770 + snd_soc_add_codec_controls(codec, aic32x4_mfp4, 771 + ARRAY_SIZE(aic32x4_mfp4)); 772 + } 773 + 774 + /* MFP5 */ 775 + if (aic32x4->setup->gpio_func[4] != AIC32X4_MFPX_DEFAULT_VALUE) { 776 + snd_soc_write(codec, AIC32X4_GPIOCTL, 777 + aic32x4->setup->gpio_func[4]); 778 + snd_soc_add_codec_controls(codec, aic32x4_mfp5, 779 + ARRAY_SIZE(aic32x4_mfp5)); 780 + } 781 + } 782 + 883 783 static int aic32x4_codec_probe(struct snd_soc_codec *codec) 884 784 { 885 785 struct aic32x4_priv *aic32x4 = snd_soc_codec_get_drvdata(codec); ··· 937 745 } 938 746 939 747 snd_soc_write(codec, AIC32X4_RESET, 0x01); 748 + 749 + if (aic32x4->setup) 750 + aic32x4_setup_gpios(codec); 940 751 941 752 /* Power platform configuration */ 942 753 if (aic32x4->power_cfg & AIC32X4_PWR_MICBIAS_2075_LDOIN) { ··· 1005 810 static int aic32x4_parse_dt(struct aic32x4_priv *aic32x4, 1006 811 struct device_node *np) 1007 812 { 813 + struct aic32x4_setup_data *aic32x4_setup; 814 + 815 + aic32x4_setup = devm_kzalloc(aic32x4->dev, sizeof(*aic32x4_setup), 816 + GFP_KERNEL); 817 + if (!aic32x4_setup) 818 + return -ENOMEM; 819 + 1008 820 aic32x4->swapdacs = false; 1009 821 aic32x4->micpga_routing = 0; 1010 822 aic32x4->rstn_gpio = of_get_named_gpio(np, "reset-gpios", 0); 1011 823 824 + if (of_property_read_u32_array(np, "aic32x4-gpio-func", 825 + aic32x4_setup->gpio_func, 5) >= 0) 826 + aic32x4->setup = aic32x4_setup; 1012 827 return 0; 1013 828 } 1014 829 ··· 1137 932 if (aic32x4 == NULL) 1138 933 return -ENOMEM; 1139 934 935 + aic32x4->dev = dev; 1140 936 dev_set_drvdata(dev, aic32x4); 1141 937 1142 938 if (pdata) {
+3
sound/soc/codecs/tlv320aic32x4.h
··· 44 44 #define AIC32X4_IFACE4 31 45 45 #define AIC32X4_IFACE5 32 46 46 #define AIC32X4_IFACE6 33 47 + #define AIC32X4_GPIOCTL 52 47 48 #define AIC32X4_DOUTCTL 53 48 49 #define AIC32X4_DINCTL 54 50 + #define AIC32X4_MISOCTL 55 51 + #define AIC32X4_SCLKCTL 56 49 52 #define AIC32X4_DACSPB 60 50 53 #define AIC32X4_ADCSPB 61 51 54 #define AIC32X4_DACSETUP 63
+45
sound/soc/codecs/tlv320aic3x.c
··· 93 93 94 94 /* Selects the micbias voltage */ 95 95 enum aic3x_micbias_voltage micbias_vg; 96 + /* Output Common-Mode Voltage */ 97 + u8 ocmv; 96 98 }; 97 99 98 100 static const struct reg_default aic3x_reg[] = { ··· 1574 1572 break; 1575 1573 } 1576 1574 1575 + /* Output common-mode voltage = 1.5 V */ 1576 + snd_soc_update_bits(codec, HPOUT_SC, HPOUT_SC_OCMV_MASK, 1577 + aic3x->ocmv << HPOUT_SC_OCMV_SHIFT); 1578 + 1577 1579 return 0; 1578 1580 } 1579 1581 ··· 1705 1699 }, 1706 1700 }; 1707 1701 1702 + static void aic3x_configure_ocmv(struct i2c_client *client) 1703 + { 1704 + struct device_node *np = client->dev.of_node; 1705 + struct aic3x_priv *aic3x = i2c_get_clientdata(client); 1706 + u32 value; 1707 + int dvdd, avdd; 1708 + 1709 + if (np && !of_property_read_u32(np, "ai3x-ocmv", &value)) { 1710 + /* OCMV setting is forced by DT */ 1711 + if (value <= 3) { 1712 + aic3x->ocmv = value; 1713 + return; 1714 + } 1715 + } 1716 + 1717 + dvdd = regulator_get_voltage(aic3x->supplies[1].consumer); 1718 + avdd = regulator_get_voltage(aic3x->supplies[2].consumer); 1719 + 1720 + if (avdd > 3600000 || dvdd > 1950000) { 1721 + dev_warn(&client->dev, 1722 + "Too high supply voltage(s) AVDD: %d, DVDD: %d\n", 1723 + avdd, dvdd); 1724 + } else if (avdd == 3600000 && dvdd == 1950000) { 1725 + aic3x->ocmv = HPOUT_SC_OCMV_1_8V; 1726 + } else if (avdd > 3300000 && dvdd > 1800000) { 1727 + aic3x->ocmv = HPOUT_SC_OCMV_1_65V; 1728 + } else if (avdd > 3000000 && dvdd > 1650000) { 1729 + aic3x->ocmv = HPOUT_SC_OCMV_1_5V; 1730 + } else if (avdd >= 2700000 && dvdd >= 1525000) { 1731 + aic3x->ocmv = HPOUT_SC_OCMV_1_35V; 1732 + } else { 1733 + dev_warn(&client->dev, 1734 + "Invalid supply voltage(s) AVDD: %d, DVDD: %d\n", 1735 + avdd, dvdd); 1736 + } 1737 + } 1738 + 1708 1739 /* 1709 1740 * AIC3X 2 wire address can be up to 4 devices with device addresses 1710 1741 * 0x18, 0x19, 0x1A, 0x1B ··· 1858 1815 dev_err(&i2c->dev, "Failed to request supplies: %d\n", ret); 1859 1816 goto err_gpio; 1860 1817 } 1818 + 1819 + aic3x_configure_ocmv(i2c); 1861 1820 1862 1821 if (aic3x->model == AIC3X_MODEL_3007) { 1863 1822 ret = regmap_register_patch(aic3x->regmap, aic3007_class_d,
+8
sound/soc/codecs/tlv320aic3x.h
··· 243 243 #define MICBIAS_LEVEL_SHIFT (6) 244 244 #define MICBIAS_LEVEL_MASK (3 << 6) 245 245 246 + /* HPOUT_SC */ 247 + #define HPOUT_SC_OCMV_MASK (3 << 6) 248 + #define HPOUT_SC_OCMV_SHIFT (6) 249 + #define HPOUT_SC_OCMV_1_35V 0 250 + #define HPOUT_SC_OCMV_1_5V 1 251 + #define HPOUT_SC_OCMV_1_65V 2 252 + #define HPOUT_SC_OCMV_1_8V 3 253 + 246 254 /* headset detection / button API */ 247 255 248 256 /* The AIC3x supports detection of stereo headsets (GND + left + right signal)
+14 -28
sound/soc/tegra/Kconfig
··· 9 9 Say Y or M here if you want support for SoC audio on Tegra. 10 10 11 11 config SND_SOC_TEGRA20_AC97 12 - tristate 13 - depends on SND_SOC_TEGRA && ARCH_TEGRA_2x_SOC 12 + tristate "Tegra20 AC97 interface" 13 + depends on SND_SOC_TEGRA 14 14 select SND_SOC_AC97_BUS 15 15 select SND_SOC_TEGRA20_DAS 16 16 help ··· 19 19 machine drivers to support below. 20 20 21 21 config SND_SOC_TEGRA20_DAS 22 - tristate 23 - depends on SND_SOC_TEGRA && ARCH_TEGRA_2x_SOC 22 + tristate "Tegra20 DAS module" 23 + depends on SND_SOC_TEGRA 24 24 help 25 25 Say Y or M if you want to add support for the Tegra20 DAS module. 26 26 You will also need to select the individual machine drivers to 27 27 support below. 28 28 29 29 config SND_SOC_TEGRA20_I2S 30 - tristate 31 - depends on SND_SOC_TEGRA && ARCH_TEGRA_2x_SOC 30 + tristate "Tegra20 I2S interface" 31 + depends on SND_SOC_TEGRA 32 32 select SND_SOC_TEGRA20_DAS 33 33 help 34 34 Say Y or M if you want to add support for codecs attached to the ··· 36 36 machine drivers to support below. 37 37 38 38 config SND_SOC_TEGRA20_SPDIF 39 - tristate 40 - depends on SND_SOC_TEGRA && ARCH_TEGRA_2x_SOC 39 + tristate "Tegra20 SPDIF interface" 40 + depends on SND_SOC_TEGRA 41 41 default m 42 42 help 43 43 Say Y or M if you want to add support for the Tegra20 SPDIF interface. ··· 45 45 below. 46 46 47 47 config SND_SOC_TEGRA30_AHUB 48 - tristate 49 - depends on SND_SOC_TEGRA && ARCH_TEGRA_3x_SOC 48 + tristate "Tegra30 AHUB module" 49 + depends on SND_SOC_TEGRA 50 50 help 51 - Say Y or M if you want to add support for the Tegra20 AHUB module. 51 + Say Y or M if you want to add support for the Tegra30 AHUB module. 52 52 You will also need to select the individual machine drivers to 53 53 support below. 54 54 55 55 config SND_SOC_TEGRA30_I2S 56 - tristate 57 - depends on SND_SOC_TEGRA && ARCH_TEGRA_3x_SOC 56 + tristate "Tegra30 I2S interface" 57 + depends on SND_SOC_TEGRA 58 58 select SND_SOC_TEGRA30_AHUB 59 59 help 60 60 Say Y or M if you want to add support for codecs attached to the ··· 64 64 config SND_SOC_TEGRA_RT5640 65 65 tristate "SoC Audio support for Tegra boards using an RT5640 codec" 66 66 depends on SND_SOC_TEGRA && I2C && GPIOLIB 67 - select SND_SOC_TEGRA20_I2S if ARCH_TEGRA_2x_SOC 68 - select SND_SOC_TEGRA30_I2S if ARCH_TEGRA_3x_SOC 69 67 select SND_SOC_RT5640 70 68 help 71 69 Say Y or M here if you want to add support for SoC audio on Tegra ··· 72 74 config SND_SOC_TEGRA_WM8753 73 75 tristate "SoC Audio support for Tegra boards using a WM8753 codec" 74 76 depends on SND_SOC_TEGRA && I2C && GPIOLIB 75 - select SND_SOC_TEGRA20_I2S if ARCH_TEGRA_2x_SOC 76 - select SND_SOC_TEGRA30_I2S if ARCH_TEGRA_3x_SOC 77 77 select SND_SOC_WM8753 78 78 help 79 79 Say Y or M here if you want to add support for SoC audio on Tegra ··· 80 84 config SND_SOC_TEGRA_WM8903 81 85 tristate "SoC Audio support for Tegra boards using a WM8903 codec" 82 86 depends on SND_SOC_TEGRA && I2C && GPIOLIB 83 - select SND_SOC_TEGRA20_I2S if ARCH_TEGRA_2x_SOC 84 - select SND_SOC_TEGRA30_I2S if ARCH_TEGRA_3x_SOC 85 87 select SND_SOC_WM8903 86 88 help 87 89 Say Y or M here if you want to add support for SoC audio on Tegra ··· 88 94 89 95 config SND_SOC_TEGRA_WM9712 90 96 tristate "SoC Audio support for Tegra boards using a WM9712 codec" 91 - depends on SND_SOC_TEGRA && ARCH_TEGRA_2x_SOC && GPIOLIB 97 + depends on SND_SOC_TEGRA && GPIOLIB 92 98 select SND_SOC_TEGRA20_AC97 93 99 select SND_SOC_WM9712 94 100 help ··· 98 104 config SND_SOC_TEGRA_TRIMSLICE 99 105 tristate "SoC Audio support for TrimSlice board" 100 106 depends on SND_SOC_TEGRA && I2C 101 - select SND_SOC_TEGRA20_I2S if ARCH_TEGRA_2x_SOC 102 107 select SND_SOC_TLV320AIC23_I2C 103 108 help 104 109 Say Y or M here if you want to add support for SoC audio on the ··· 106 113 config SND_SOC_TEGRA_ALC5632 107 114 tristate "SoC Audio support for Tegra boards using an ALC5632 codec" 108 115 depends on SND_SOC_TEGRA && I2C && GPIOLIB 109 - select SND_SOC_TEGRA20_I2S if ARCH_TEGRA_2x_SOC 110 116 select SND_SOC_ALC5632 111 117 help 112 118 Say Y or M here if you want to add support for SoC audio on the ··· 114 122 config SND_SOC_TEGRA_MAX98090 115 123 tristate "SoC Audio support for Tegra boards using a MAX98090 codec" 116 124 depends on SND_SOC_TEGRA && I2C && GPIOLIB 117 - select SND_SOC_TEGRA20_I2S if ARCH_TEGRA_2x_SOC 118 - select SND_SOC_TEGRA30_I2S if ARCH_TEGRA_3x_SOC 119 125 select SND_SOC_MAX98090 120 126 help 121 127 Say Y or M here if you want to add support for SoC audio on Tegra ··· 122 132 config SND_SOC_TEGRA_RT5677 123 133 tristate "SoC Audio support for Tegra boards using a RT5677 codec" 124 134 depends on SND_SOC_TEGRA && I2C && GPIOLIB 125 - select SND_SOC_TEGRA20_I2S if ARCH_TEGRA_2x_SOC 126 - select SND_SOC_TEGRA30_I2S if ARCH_TEGRA_3x_SOC 127 135 select SND_SOC_RT5677 128 136 help 129 137 Say Y or M here if you want to add support for SoC audio on Tegra ··· 130 142 config SND_SOC_TEGRA_SGTL5000 131 143 tristate "SoC Audio support for Tegra boards using a SGTL5000 codec" 132 144 depends on SND_SOC_TEGRA && I2C && GPIOLIB 133 - select SND_SOC_TEGRA20_I2S if ARCH_TEGRA_2x_SOC 134 - select SND_SOC_TEGRA30_I2S if ARCH_TEGRA_3x_SOC 135 145 select SND_SOC_SGTL5000 136 146 help 137 147 Say Y or M here if you want to add support for SoC audio on Tegra
+2 -2
sound/soc/tegra/tegra30_ahub.c
··· 544 544 soc_data->mod_list_mask)) 545 545 continue; 546 546 547 - rst = reset_control_get(&pdev->dev, 548 - configlink_mods[i].rst_name); 547 + rst = reset_control_get_exclusive(&pdev->dev, 548 + configlink_mods[i].rst_name); 549 549 if (IS_ERR(rst)) { 550 550 dev_err(&pdev->dev, "Can't get reset %s\n", 551 551 configlink_mods[i].rst_name);
+1 -1
sound/soc/tegra/tegra30_i2s.c
··· 275 275 return 0; 276 276 } 277 277 278 - static struct snd_soc_dai_ops tegra30_i2s_dai_ops = { 278 + static const struct snd_soc_dai_ops tegra30_i2s_dai_ops = { 279 279 .set_fmt = tegra30_i2s_set_fmt, 280 280 .hw_params = tegra30_i2s_hw_params, 281 281 .trigger = tegra30_i2s_trigger,
-1
sound/soc/tegra/tegra_alc5632.c
··· 160 160 return -ENOMEM; 161 161 162 162 card->dev = &pdev->dev; 163 - platform_set_drvdata(pdev, card); 164 163 snd_soc_card_set_drvdata(card, alc5632); 165 164 166 165 alc5632->gpio_hp_det = of_get_named_gpio(np, "nvidia,hp-det-gpios", 0);
-1
sound/soc/tegra/tegra_max98090.c
··· 211 211 return -ENOMEM; 212 212 213 213 card->dev = &pdev->dev; 214 - platform_set_drvdata(pdev, card); 215 214 snd_soc_card_set_drvdata(card, machine); 216 215 217 216 machine->gpio_hp_det = of_get_named_gpio(np, "nvidia,hp-det-gpios", 0);
-1
sound/soc/tegra/tegra_rt5640.c
··· 161 161 return -ENOMEM; 162 162 163 163 card->dev = &pdev->dev; 164 - platform_set_drvdata(pdev, card); 165 164 snd_soc_card_set_drvdata(card, machine); 166 165 167 166 machine->gpio_hp_det = of_get_named_gpio_flags(
-1
sound/soc/tegra/tegra_rt5677.c
··· 204 204 return -ENOMEM; 205 205 206 206 card->dev = &pdev->dev; 207 - platform_set_drvdata(pdev, card); 208 207 snd_soc_card_set_drvdata(card, machine); 209 208 210 209 machine->gpio_hp_det = of_get_named_gpio(np, "nvidia,hp-det-gpios", 0);
-1
sound/soc/tegra/tegra_sgtl5000.c
··· 124 124 return -ENOMEM; 125 125 126 126 card->dev = &pdev->dev; 127 - platform_set_drvdata(pdev, card); 128 127 snd_soc_card_set_drvdata(card, machine); 129 128 130 129 ret = snd_soc_of_parse_card_name(card, "nvidia,model");
-1
sound/soc/tegra/tegra_wm8753.c
··· 132 132 return -ENOMEM; 133 133 134 134 card->dev = &pdev->dev; 135 - platform_set_drvdata(pdev, card); 136 135 snd_soc_card_set_drvdata(card, machine); 137 136 138 137 ret = snd_soc_of_parse_card_name(card, "nvidia,model");
-1
sound/soc/tegra/tegra_wm8903.c
··· 246 246 return -ENOMEM; 247 247 248 248 card->dev = &pdev->dev; 249 - platform_set_drvdata(pdev, card); 250 249 snd_soc_card_set_drvdata(card, machine); 251 250 252 251 machine->gpio_spkr_en = of_get_named_gpio(np, "nvidia,spkr-en-gpios",
-1
sound/soc/tegra/tegra_wm9712.c
··· 81 81 return -ENOMEM; 82 82 83 83 card->dev = &pdev->dev; 84 - platform_set_drvdata(pdev, card); 85 84 snd_soc_card_set_drvdata(card, machine); 86 85 87 86 machine->codec = platform_device_alloc("wm9712-codec", -1);
-1
sound/soc/tegra/trimslice.c
··· 127 127 return -ENOMEM; 128 128 129 129 card->dev = &pdev->dev; 130 - platform_set_drvdata(pdev, card); 131 130 snd_soc_card_set_drvdata(card, trimslice); 132 131 133 132 trimslice_tlv320aic23_dai.codec_of_node = of_parse_phandle(np,