drm/i915: don't trigger ironlake vblank interrupt at irq install

Zhenyu noticed that the ironlake vblank enabling patch has one
issue that it will trigger vblank starting from irq postinstall,
this isn't necessary. This patch addresses this issue by only
adding the vblank into DEIER but mask them in DEIMR, so that it
won't trigger vblank interrupt at irq install.

Signed-off-by: Li Peng <peng.li@intel.com>
Acked-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>

authored by Li Peng and committed by Eric Anholt 643ced9b de3f440f

+2 -3
+2 -3
drivers/gpu/drm/i915/i915_irq.c
··· 1022 1022 { 1023 1023 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; 1024 1024 /* enable kind of interrupts always enabled */ 1025 - u32 display_mask = DE_MASTER_IRQ_CONTROL | DE_GSE | DE_PCH_EVENT | 1026 - DE_PIPEA_VBLANK | DE_PIPEB_VBLANK; 1025 + u32 display_mask = DE_MASTER_IRQ_CONTROL | DE_GSE | DE_PCH_EVENT; 1027 1026 u32 render_mask = GT_USER_INTERRUPT; 1028 1027 u32 hotplug_mask = SDE_CRT_HOTPLUG | SDE_PORTB_HOTPLUG | 1029 1028 SDE_PORTC_HOTPLUG | SDE_PORTD_HOTPLUG; 1030 1029 1031 1030 dev_priv->irq_mask_reg = ~display_mask; 1032 - dev_priv->de_irq_enable_reg = display_mask; 1031 + dev_priv->de_irq_enable_reg = display_mask | DE_PIPEA_VBLANK | DE_PIPEB_VBLANK; 1033 1032 1034 1033 /* should always can generate irq */ 1035 1034 I915_WRITE(DEIIR, I915_READ(DEIIR));