[IA64] Fix Altix BTE error return status

The Altix shub2 BTE error detail bits are in a different location
than on shub1. The current code does not take this into account
resulting in all shub2 BTE failures mapping to "unknown".

This patch reads the error detail bits from the proper location,
so the correct BTE failure reason is returned for both shub1
and shub2.

Signed-off-by: Russ Anderson <rja@sgi.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>

authored by Russ Anderson and committed by Tony Luck 64135fa9 09106228

+70 -8
+2 -2
arch/ia64/sn/kernel/bte.c
··· 3 3 * License. See the file "COPYING" in the main directory of this archive 4 4 * for more details. 5 5 * 6 - * Copyright (c) 2000-2006 Silicon Graphics, Inc. All Rights Reserved. 6 + * Copyright (c) 2000-2007 Silicon Graphics, Inc. All Rights Reserved. 7 7 */ 8 8 9 9 #include <linux/module.h> ··· 227 227 BTE_LNSTAT_LOAD(bte), *bte->most_rcnt_na)); 228 228 229 229 if (transfer_stat & IBLS_ERROR) { 230 - bte_status = transfer_stat & ~IBLS_ERROR; 230 + bte_status = BTE_GET_ERROR_STATUS(transfer_stat); 231 231 } else { 232 232 bte_status = BTE_SUCCESS; 233 233 }
+6 -2
arch/ia64/sn/kernel/bte_error.c
··· 3 3 * License. See the file "COPYING" in the main directory of this archive 4 4 * for more details. 5 5 * 6 - * Copyright (c) 2000-2005 Silicon Graphics, Inc. All Rights Reserved. 6 + * Copyright (c) 2000-2007 Silicon Graphics, Inc. All Rights Reserved. 7 7 */ 8 8 9 9 #include <linux/types.h> ··· 148 148 for (i = 0; i < BTES_PER_NODE; i++) { 149 149 bte = &err_nodepda->bte_if[i]; 150 150 status = BTE_LNSTAT_LOAD(bte); 151 - if ((status & IBLS_ERROR) || !(status & IBLS_BUSY)) 151 + if (status & IBLS_ERROR) { 152 + bte->bh_error = BTE_SHUB2_ERROR(status); 153 + continue; 154 + } 155 + if (!(status & IBLS_BUSY)) 152 156 continue; 153 157 mod_timer(recovery_timer, jiffies + (HZ * 5)); 154 158 BTE_PRINTK(("eh:%p:%d Marked Giving up\n", err_nodepda,
+30 -1
include/asm-ia64/sn/bte.h
··· 3 3 * License. See the file "COPYING" in the main directory of this archive 4 4 * for more details. 5 5 * 6 - * Copyright (c) 2000-2006 Silicon Graphics, Inc. All Rights Reserved. 6 + * Copyright (c) 2000-2007 Silicon Graphics, Inc. All Rights Reserved. 7 7 */ 8 8 9 9 ··· 150 150 BTEFAIL_NOTAVAIL, /* BTE not available */ 151 151 } bte_result_t; 152 152 153 + #define BTEFAIL_SH2_RESP_SHORT 0x1 /* bit 000001 */ 154 + #define BTEFAIL_SH2_RESP_LONG 0x2 /* bit 000010 */ 155 + #define BTEFAIL_SH2_RESP_DSP 0x4 /* bit 000100 */ 156 + #define BTEFAIL_SH2_RESP_ACCESS 0x8 /* bit 001000 */ 157 + #define BTEFAIL_SH2_CRB_TO 0x10 /* bit 010000 */ 158 + #define BTEFAIL_SH2_NACK_LIMIT 0x20 /* bit 100000 */ 159 + #define BTEFAIL_SH2_ALL 0x3F /* bit 111111 */ 160 + 161 + #define BTE_ERR_BITS 0x3FUL 162 + #define BTE_ERR_SHIFT 36 163 + #define BTE_ERR_MASK (BTE_ERR_BITS << BTE_ERR_SHIFT) 164 + 165 + #define BTE_ERROR_RETRY(value) \ 166 + (is_shub2() ? (value != BTEFAIL_SH2_CRB_TO) \ 167 + : (value != BTEFAIL_TOUT)) 168 + 169 + /* 170 + * On shub1 BTE_ERR_MASK will always be false, so no need for is_shub2() 171 + */ 172 + #define BTE_SHUB2_ERROR(_status) \ 173 + ((_status & BTE_ERR_MASK) \ 174 + ? (((_status >> BTE_ERR_SHIFT) & BTE_ERR_BITS) | IBLS_ERROR) \ 175 + : _status) 176 + 177 + #define BTE_GET_ERROR_STATUS(_status) \ 178 + (BTE_SHUB2_ERROR(_status) & ~IBLS_ERROR) 179 + 180 + #define BTE_VALID_SH2_ERROR(value) \ 181 + ((value >= BTEFAIL_SH2_RESP_SHORT) && (value <= BTEFAIL_SH2_ALL)) 153 182 154 183 /* 155 184 * Structure defining a bte. An instance of this
+25 -2
include/asm-ia64/sn/xp.h
··· 86 86 BUG_ON(REGION_NUMBER(vdst) != RGN_KERNEL); 87 87 88 88 ret = bte_copy(src, pdst, len, mode, notification); 89 - if (ret != BTE_SUCCESS) { 89 + if ((ret != BTE_SUCCESS) && BTE_ERROR_RETRY(ret)) { 90 90 if (!in_interrupt()) { 91 91 cond_resched(); 92 92 } ··· 244 244 245 245 xpcDisconnected, /* 51: channel disconnected (closed) */ 246 246 247 - xpcUnknownReason /* 52: unknown reason -- must be last in list */ 247 + xpcBteSh2Start, /* 52: BTE CRB timeout */ 248 + 249 + /* 53: 0x1 BTE Error Response Short */ 250 + xpcBteSh2RspShort = xpcBteSh2Start + BTEFAIL_SH2_RESP_SHORT, 251 + 252 + /* 54: 0x2 BTE Error Response Long */ 253 + xpcBteSh2RspLong = xpcBteSh2Start + BTEFAIL_SH2_RESP_LONG, 254 + 255 + /* 56: 0x4 BTE Error Response DSB */ 256 + xpcBteSh2RspDSB = xpcBteSh2Start + BTEFAIL_SH2_RESP_DSP, 257 + 258 + /* 60: 0x8 BTE Error Response Access */ 259 + xpcBteSh2RspAccess = xpcBteSh2Start + BTEFAIL_SH2_RESP_ACCESS, 260 + 261 + /* 68: 0x10 BTE Error CRB timeout */ 262 + xpcBteSh2CRBTO = xpcBteSh2Start + BTEFAIL_SH2_CRB_TO, 263 + 264 + /* 84: 0x20 BTE Error NACK limit */ 265 + xpcBteSh2NACKLimit = xpcBteSh2Start + BTEFAIL_SH2_NACK_LIMIT, 266 + 267 + /* 115: BTE end */ 268 + xpcBteSh2End = xpcBteSh2Start + BTEFAIL_SH2_ALL, 269 + 270 + xpcUnknownReason /* 116: unknown reason -- must be last in list */ 248 271 }; 249 272 250 273
+7 -1
include/asm-ia64/sn/xpc.h
··· 3 3 * License. See the file "COPYING" in the main directory of this archive 4 4 * for more details. 5 5 * 6 - * Copyright (c) 2004-2006 Silicon Graphics, Inc. All Rights Reserved. 6 + * Copyright (c) 2004-2007 Silicon Graphics, Inc. All Rights Reserved. 7 7 */ 8 8 9 9 ··· 1211 1211 static inline enum xpc_retval 1212 1212 xpc_map_bte_errors(bte_result_t error) 1213 1213 { 1214 + if (is_shub2()) { 1215 + if (BTE_VALID_SH2_ERROR(error)) 1216 + return xpcBteSh2Start + error; 1217 + else 1218 + return xpcBteUnmappedError; 1219 + } 1214 1220 switch (error) { 1215 1221 case BTE_SUCCESS: return xpcSuccess; 1216 1222 case BTEFAIL_DIR: return xpcBteDirectoryError;