tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
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drm/amd/display: Drop struct crc_region and reuse struct rect

[Why]
reuse struct rect rather than adding a new struct.

[How]
- Userspace keeps inputting x_start, y_start, x_end, y_end
- We translate data to x, y, width, height in code flow to store
- translate back to x_start, y_start, x_end, y_end before programming HW

Tested-by: Mark Broadworth <mark.broadworth@amd.com>
Reviewed-by: Wayne Lin <Wayne.Lin@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alan Liu <HaoPing.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Alan Liu and committed by
Alex Deucher 62fa035b c0459bdd

+46 -42
+11 -9
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c
··· 89 89 struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc); 90 90 91 91 spin_lock_irq(&drm_dev->event_lock); 92 - acrtc->dm_irq_params.window_param.roi.x_start = 0; 93 - acrtc->dm_irq_params.window_param.roi.y_start = 0; 94 - acrtc->dm_irq_params.window_param.roi.x_end = 0; 95 - acrtc->dm_irq_params.window_param.roi.y_end = 0; 92 + acrtc->dm_irq_params.window_param.x_start = 0; 93 + acrtc->dm_irq_params.window_param.y_start = 0; 94 + acrtc->dm_irq_params.window_param.x_end = 0; 95 + acrtc->dm_irq_params.window_param.y_end = 0; 96 96 acrtc->dm_irq_params.window_param.activated = false; 97 97 acrtc->dm_irq_params.window_param.update_win = false; 98 98 acrtc->dm_irq_params.window_param.skip_frame_cnt = 0; ··· 145 145 dm = crc_fw_wrk->dm; 146 146 147 147 mutex_lock(&dm->dc_lock); 148 - dc_stream_forward_crc_window(dm->dc, &crc_fw_wrk->roi, crc_fw_wrk->stream, crc_fw_wrk->is_stop_cmd); 148 + dc_stream_forward_crc_window(dm->dc, &crc_fw_wrk->rect, crc_fw_wrk->stream, crc_fw_wrk->is_stop_cmd); 149 149 mutex_unlock(&dm->dc_lock); 150 150 151 151 kfree(crc_fw_wrk); ··· 496 496 INIT_WORK(&crc_fw_wrk->forward_roi_work, amdgpu_dm_forward_crc_window); 497 497 crc_fw_wrk->dm = &adev->dm; 498 498 crc_fw_wrk->stream = stream_state; 499 - crc_fw_wrk->roi.x_start = acrtc->dm_irq_params.window_param.roi.x_start; 500 - crc_fw_wrk->roi.y_start = acrtc->dm_irq_params.window_param.roi.y_start; 501 - crc_fw_wrk->roi.x_end = acrtc->dm_irq_params.window_param.roi.x_end; 502 - crc_fw_wrk->roi.y_end = acrtc->dm_irq_params.window_param.roi.y_end; 499 + crc_fw_wrk->rect.x = acrtc->dm_irq_params.window_param.x_start; 500 + crc_fw_wrk->rect.y = acrtc->dm_irq_params.window_param.y_start; 501 + crc_fw_wrk->rect.width = acrtc->dm_irq_params.window_param.x_end - 502 + acrtc->dm_irq_params.window_param.x_start; 503 + crc_fw_wrk->rect.height = acrtc->dm_irq_params.window_param.y_end - 504 + acrtc->dm_irq_params.window_param.y_start; 503 505 schedule_work(&crc_fw_wrk->forward_roi_work); 504 506 505 507 acrtc->dm_irq_params.window_param.update_win = false;
+5 -2
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.h
··· 41 41 42 42 #ifdef CONFIG_DRM_AMD_SECURE_DISPLAY 43 43 struct crc_window_param { 44 - struct crc_region roi; 44 + uint16_t x_start; 45 + uint16_t y_start; 46 + uint16_t x_end; 47 + uint16_t y_end; 45 48 /* CRC windwo is activated or not*/ 46 49 bool activated; 47 50 /* Update crc window during vertical blank or not */ ··· 67 64 struct work_struct forward_roi_work; 68 65 struct amdgpu_display_manager *dm; 69 66 struct dc_stream_state *stream; 70 - struct crc_region roi; 67 + struct rect rect; 71 68 bool is_stop_cmd; 72 69 }; 73 70 #endif
+8 -8
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
··· 3085 3085 struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc); 3086 3086 3087 3087 spin_lock_irq(&drm_dev->event_lock); 3088 - acrtc->dm_irq_params.window_param.roi.x_start = (uint16_t) val; 3088 + acrtc->dm_irq_params.window_param.x_start = (uint16_t) val; 3089 3089 acrtc->dm_irq_params.window_param.update_win = false; 3090 3090 spin_unlock_irq(&drm_dev->event_lock); 3091 3091 ··· 3102 3102 struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc); 3103 3103 3104 3104 spin_lock_irq(&drm_dev->event_lock); 3105 - *val = acrtc->dm_irq_params.window_param.roi.x_start; 3105 + *val = acrtc->dm_irq_params.window_param.x_start; 3106 3106 spin_unlock_irq(&drm_dev->event_lock); 3107 3107 3108 3108 return 0; ··· 3122 3122 struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc); 3123 3123 3124 3124 spin_lock_irq(&drm_dev->event_lock); 3125 - acrtc->dm_irq_params.window_param.roi.y_start = (uint16_t) val; 3125 + acrtc->dm_irq_params.window_param.y_start = (uint16_t) val; 3126 3126 acrtc->dm_irq_params.window_param.update_win = false; 3127 3127 spin_unlock_irq(&drm_dev->event_lock); 3128 3128 ··· 3139 3139 struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc); 3140 3140 3141 3141 spin_lock_irq(&drm_dev->event_lock); 3142 - *val = acrtc->dm_irq_params.window_param.roi.y_start; 3142 + *val = acrtc->dm_irq_params.window_param.y_start; 3143 3143 spin_unlock_irq(&drm_dev->event_lock); 3144 3144 3145 3145 return 0; ··· 3158 3158 struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc); 3159 3159 3160 3160 spin_lock_irq(&drm_dev->event_lock); 3161 - acrtc->dm_irq_params.window_param.roi.x_end = (uint16_t) val; 3161 + acrtc->dm_irq_params.window_param.x_end = (uint16_t) val; 3162 3162 acrtc->dm_irq_params.window_param.update_win = false; 3163 3163 spin_unlock_irq(&drm_dev->event_lock); 3164 3164 ··· 3175 3175 struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc); 3176 3176 3177 3177 spin_lock_irq(&drm_dev->event_lock); 3178 - *val = acrtc->dm_irq_params.window_param.roi.x_end; 3178 + *val = acrtc->dm_irq_params.window_param.x_end; 3179 3179 spin_unlock_irq(&drm_dev->event_lock); 3180 3180 3181 3181 return 0; ··· 3194 3194 struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc); 3195 3195 3196 3196 spin_lock_irq(&drm_dev->event_lock); 3197 - acrtc->dm_irq_params.window_param.roi.y_end = (uint16_t) val; 3197 + acrtc->dm_irq_params.window_param.y_end = (uint16_t) val; 3198 3198 acrtc->dm_irq_params.window_param.update_win = false; 3199 3199 spin_unlock_irq(&drm_dev->event_lock); 3200 3200 ··· 3211 3211 struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc); 3212 3212 3213 3213 spin_lock_irq(&drm_dev->event_lock); 3214 - *val = acrtc->dm_irq_params.window_param.roi.y_end; 3214 + *val = acrtc->dm_irq_params.window_param.y_end; 3215 3215 spin_unlock_irq(&drm_dev->event_lock); 3216 3216 3217 3217 return 0;
+10 -10
drivers/gpu/drm/amd/display/dc/core/dc.c
··· 493 493 #if defined(CONFIG_DRM_AMD_SECURE_DISPLAY) 494 494 static inline void 495 495 dc_stream_forward_dmub_crc_window(struct dc_dmub_srv *dmub_srv, 496 - struct crc_region *roi, struct otg_phy_mux *mux_mapping, bool is_stop) 496 + struct rect *rect, struct otg_phy_mux *mux_mapping, bool is_stop) 497 497 { 498 498 union dmub_rb_cmd cmd = {0}; 499 499 ··· 506 506 } else { 507 507 cmd.secure_display.header.type = DMUB_CMD__SECURE_DISPLAY; 508 508 cmd.secure_display.header.sub_type = DMUB_CMD__SECURE_DISPLAY_CRC_WIN_NOTIFY; 509 - cmd.secure_display.roi_info.x_start = roi->x_start; 510 - cmd.secure_display.roi_info.y_start = roi->y_start; 511 - cmd.secure_display.roi_info.x_end = roi->x_end; 512 - cmd.secure_display.roi_info.y_end = roi->y_end; 509 + cmd.secure_display.roi_info.x_start = rect->x; 510 + cmd.secure_display.roi_info.y_start = rect->y; 511 + cmd.secure_display.roi_info.x_end = rect->x + rect->width; 512 + cmd.secure_display.roi_info.y_end = rect->y + rect->height; 513 513 } 514 514 515 515 dc_dmub_srv_cmd_queue(dmub_srv, &cmd); ··· 518 518 519 519 static inline void 520 520 dc_stream_forward_dmcu_crc_window(struct dmcu *dmcu, 521 - struct crc_region *roi, struct otg_phy_mux *mux_mapping, bool is_stop) 521 + struct rect *rect, struct otg_phy_mux *mux_mapping, bool is_stop) 522 522 { 523 523 if (is_stop) 524 524 dmcu->funcs->stop_crc_win_update(dmcu, mux_mapping); 525 525 else 526 - dmcu->funcs->forward_crc_window(dmcu, roi, mux_mapping); 526 + dmcu->funcs->forward_crc_window(dmcu, rect, mux_mapping); 527 527 } 528 528 529 529 bool 530 530 dc_stream_forward_crc_window(struct dc *dc, 531 - struct crc_region *roi, struct dc_stream_state *stream, bool is_stop) 531 + struct rect *rect, struct dc_stream_state *stream, bool is_stop) 532 532 { 533 533 struct dmcu *dmcu; 534 534 struct dc_dmub_srv *dmub_srv; ··· 554 554 555 555 /* forward to dmub */ 556 556 if (dmub_srv) 557 - dc_stream_forward_dmub_crc_window(dmub_srv, roi, &mux_mapping, is_stop); 557 + dc_stream_forward_dmub_crc_window(dmub_srv, rect, &mux_mapping, is_stop); 558 558 /* forward to dmcu */ 559 559 else if (dmcu && dmcu->funcs->is_dmcu_initialized(dmcu)) 560 - dc_stream_forward_dmcu_crc_window(dmcu, roi, &mux_mapping, is_stop); 560 + dc_stream_forward_dmcu_crc_window(dmcu, rect, &mux_mapping, is_stop); 561 561 else 562 562 return false; 563 563
+1 -1
drivers/gpu/drm/amd/display/dc/dc_stream.h
··· 522 522 523 523 #if defined(CONFIG_DRM_AMD_SECURE_DISPLAY) 524 524 bool dc_stream_forward_crc_window(struct dc *dc, 525 - struct crc_region *roi, 525 + struct rect *rect, 526 526 struct dc_stream_state *stream, 527 527 bool is_stop); 528 528 #endif
-7
drivers/gpu/drm/amd/display/dc/dc_types.h
··· 994 994 }; 995 995 996 996 #if defined(CONFIG_DRM_AMD_SECURE_DISPLAY) 997 - struct crc_region { 998 - uint16_t x_start; 999 - uint16_t y_start; 1000 - uint16_t x_end; 1001 - uint16_t y_end; 1002 - }; 1003 - 1004 997 struct otg_phy_mux { 1005 998 uint8_t phy_output_num; 1006 999 uint8_t otg_output_num;
+10 -4
drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c
··· 927 927 928 928 #if defined(CONFIG_DRM_AMD_SECURE_DISPLAY) 929 929 static void dcn10_forward_crc_window(struct dmcu *dmcu, 930 - struct crc_region *crc_win, 930 + struct rect *rect, 931 931 struct otg_phy_mux *mux_mapping) 932 932 { 933 933 struct dce_dmcu *dmcu_dce = TO_DCE_DMCU(dmcu); 934 934 unsigned int dmcu_max_retry_on_wait_reg_ready = 801; 935 935 unsigned int dmcu_wait_reg_ready_interval = 100; 936 936 unsigned int crc_start = 0, crc_end = 0, otg_phy_mux = 0; 937 + int x_start, y_start, x_end, y_end; 937 938 938 939 /* If microcontroller is not running, do nothing */ 939 940 if (dmcu->dmcu_state != DMCU_RUNNING) 940 941 return; 941 942 942 - if (!crc_win) 943 + if (!rect) 943 944 return; 944 945 945 946 /* waitDMCUReadyForCmd */ ··· 948 947 dmcu_wait_reg_ready_interval, 949 948 dmcu_max_retry_on_wait_reg_ready); 950 949 950 + x_start = rect->x; 951 + y_start = rect->y; 952 + x_end = x_start + rect->width; 953 + y_end = y_start + rect->height; 954 + 951 955 /* build up nitification data */ 952 - crc_start = (((unsigned int) crc_win->x_start) << 16) | crc_win->y_start; 953 - crc_end = (((unsigned int) crc_win->x_end) << 16) | crc_win->y_end; 956 + crc_start = (((unsigned int) x_start) << 16) | y_start; 957 + crc_end = (((unsigned int) x_end) << 16) | y_end; 954 958 otg_phy_mux = 955 959 (((unsigned int) mux_mapping->otg_output_num) << 16) | mux_mapping->phy_output_num; 956 960
+1 -1
drivers/gpu/drm/amd/display/dc/inc/hw/dmcu.h
··· 86 86 bool (*recv_edid_cea_ack)(struct dmcu *dmcu, int *offset); 87 87 #if defined(CONFIG_DRM_AMD_SECURE_DISPLAY) 88 88 void (*forward_crc_window)(struct dmcu *dmcu, 89 - struct crc_region *crc_win, 89 + struct rect *rect, 90 90 struct otg_phy_mux *mux_mapping); 91 91 void (*stop_crc_win_update)(struct dmcu *dmcu, 92 92 struct otg_phy_mux *mux_mapping);