Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

MIPS: kernel: proc: add CPU option reporting

Many MIPS CPUs have optional CPU features which are not activated for
all CPU cores. Print the CPU options, which are implemented in the core,
in /proc/cpuinfo. This makes it possible to see which features are
supported and which are not supported. This should cover all standard
MIPS extensions. Before, it only printed information about the main MIPS
ASEs.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>

Changes from original patch[0]:
- Remove cpu_has_6k_cache and cpu_has_8k_cache due to commit 6ce91ba8589a
("MIPS: Remove cpu_has_6k_cache and cpu_has_8k_cache in cpu_cache_init()")
- Add new options: mac2008_only, ftlbparex, gsexcex, mmid, mm_sysad,
mm_full
- Use seq_puts instead of seq_printf as suggested by checkpatch
- Minor commit message reword

[0]: https://lore.kernel.org/linux-mips/20181223225224.23042-1-hauke@hauke-m.de/

Signed-off-by: Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com>
Acked-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

authored by

Hauke Mehrtens and committed by
Thomas Bogendoerfer
626bfa03 1ad964ae

+122
+122
arch/mips/kernel/proc.c
··· 157 157 seq_printf(m, "micromips kernel\t: %s\n", 158 158 (read_c0_config3() & MIPS_CONF3_ISA_OE) ? "yes" : "no"); 159 159 } 160 + 161 + seq_puts(m, "Options implemented\t:"); 162 + if (cpu_has_tlb) 163 + seq_puts(m, " tlb"); 164 + if (cpu_has_ftlb) 165 + seq_puts(m, " ftlb"); 166 + if (cpu_has_tlbinv) 167 + seq_puts(m, " tlbinv"); 168 + if (cpu_has_segments) 169 + seq_puts(m, " segments"); 170 + if (cpu_has_rixiex) 171 + seq_puts(m, " rixiex"); 172 + if (cpu_has_ldpte) 173 + seq_puts(m, " ldpte"); 174 + if (cpu_has_maar) 175 + seq_puts(m, " maar"); 176 + if (cpu_has_rw_llb) 177 + seq_puts(m, " rw_llb"); 178 + if (cpu_has_4kex) 179 + seq_puts(m, " 4kex"); 180 + if (cpu_has_3k_cache) 181 + seq_puts(m, " 3k_cache"); 182 + if (cpu_has_4k_cache) 183 + seq_puts(m, " 4k_cache"); 184 + if (cpu_has_tx39_cache) 185 + seq_puts(m, " tx39_cache"); 186 + if (cpu_has_octeon_cache) 187 + seq_puts(m, " octeon_cache"); 188 + if (cpu_has_fpu) 189 + seq_puts(m, " fpu"); 190 + if (cpu_has_32fpr) 191 + seq_puts(m, " 32fpr"); 192 + if (cpu_has_cache_cdex_p) 193 + seq_puts(m, " cache_cdex_p"); 194 + if (cpu_has_cache_cdex_s) 195 + seq_puts(m, " cache_cdex_s"); 196 + if (cpu_has_prefetch) 197 + seq_puts(m, " prefetch"); 198 + if (cpu_has_mcheck) 199 + seq_puts(m, " mcheck"); 200 + if (cpu_has_ejtag) 201 + seq_puts(m, " ejtag"); 202 + if (cpu_has_llsc) 203 + seq_puts(m, " llsc"); 204 + if (cpu_has_guestctl0ext) 205 + seq_puts(m, " guestctl0ext"); 206 + if (cpu_has_guestctl1) 207 + seq_puts(m, " guestctl1"); 208 + if (cpu_has_guestctl2) 209 + seq_puts(m, " guestctl2"); 210 + if (cpu_has_guestid) 211 + seq_puts(m, " guestid"); 212 + if (cpu_has_drg) 213 + seq_puts(m, " drg"); 214 + if (cpu_has_rixi) 215 + seq_puts(m, " rixi"); 216 + if (cpu_has_lpa) 217 + seq_puts(m, " lpa"); 218 + if (cpu_has_mvh) 219 + seq_puts(m, " mvh"); 220 + if (cpu_has_vtag_icache) 221 + seq_puts(m, " vtag_icache"); 222 + if (cpu_has_dc_aliases) 223 + seq_puts(m, " dc_aliases"); 224 + if (cpu_has_ic_fills_f_dc) 225 + seq_puts(m, " ic_fills_f_dc"); 226 + if (cpu_has_pindexed_dcache) 227 + seq_puts(m, " pindexed_dcache"); 228 + if (cpu_has_userlocal) 229 + seq_puts(m, " userlocal"); 230 + if (cpu_has_nofpuex) 231 + seq_puts(m, " nofpuex"); 232 + if (cpu_has_vint) 233 + seq_puts(m, " vint"); 234 + if (cpu_has_veic) 235 + seq_puts(m, " veic"); 236 + if (cpu_has_inclusive_pcaches) 237 + seq_puts(m, " inclusive_pcaches"); 238 + if (cpu_has_perf_cntr_intr_bit) 239 + seq_puts(m, " perf_cntr_intr_bit"); 240 + if (cpu_has_ufr) 241 + seq_puts(m, " ufr"); 242 + if (cpu_has_fre) 243 + seq_puts(m, " fre"); 244 + if (cpu_has_cdmm) 245 + seq_puts(m, " cdmm"); 246 + if (cpu_has_small_pages) 247 + seq_puts(m, " small_pages"); 248 + if (cpu_has_nan_legacy) 249 + seq_puts(m, " nan_legacy"); 250 + if (cpu_has_nan_2008) 251 + seq_puts(m, " nan_2008"); 252 + if (cpu_has_ebase_wg) 253 + seq_puts(m, " ebase_wg"); 254 + if (cpu_has_badinstr) 255 + seq_puts(m, " badinstr"); 256 + if (cpu_has_badinstrp) 257 + seq_puts(m, " badinstrp"); 258 + if (cpu_has_contextconfig) 259 + seq_puts(m, " contextconfig"); 260 + if (cpu_has_perf) 261 + seq_puts(m, " perf"); 262 + if (cpu_has_mac2008_only) 263 + seq_puts(m, " mac2008_only"); 264 + if (cpu_has_ftlbparex) 265 + seq_puts(m, " ftlbparex"); 266 + if (cpu_has_gsexcex) 267 + seq_puts(m, " gsexcex"); 268 + if (cpu_has_shared_ftlb_ram) 269 + seq_puts(m, " shared_ftlb_ram"); 270 + if (cpu_has_shared_ftlb_entries) 271 + seq_puts(m, " shared_ftlb_entries"); 272 + if (cpu_has_mipsmt_pertccounters) 273 + seq_puts(m, " mipsmt_pertccounters"); 274 + if (cpu_has_mmid) 275 + seq_puts(m, " mmid"); 276 + if (cpu_has_mm_sysad) 277 + seq_puts(m, " mm_sysad"); 278 + if (cpu_has_mm_full) 279 + seq_puts(m, " mm_full"); 280 + seq_puts(m, "\n"); 281 + 160 282 seq_printf(m, "shadow register sets\t: %d\n", 161 283 cpu_data[n].srsets); 162 284 seq_printf(m, "kscratch registers\t: %d\n",