Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

soc: amlogic: clk-measure: Add support for SM1

Add the clk-measurer clocks IDs for the Amlogic SM1 SoC family.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>

authored by

Neil Armstrong and committed by
Kevin Hilman
62369971 b555cafb

+134
+134
drivers/soc/amlogic/meson-clk-measure.c
··· 357 357 CLK_MSR_ID(122, "audio_pdm_dclk"), 358 358 }; 359 359 360 + static struct meson_msr_id clk_msr_sm1[CLK_MSR_MAX] = { 361 + CLK_MSR_ID(0, "ring_osc_out_ee_0"), 362 + CLK_MSR_ID(1, "ring_osc_out_ee_1"), 363 + CLK_MSR_ID(2, "ring_osc_out_ee_2"), 364 + CLK_MSR_ID(3, "ring_osc_out_ee_3"), 365 + CLK_MSR_ID(4, "gp0_pll"), 366 + CLK_MSR_ID(5, "gp1_pll"), 367 + CLK_MSR_ID(6, "enci"), 368 + CLK_MSR_ID(7, "clk81"), 369 + CLK_MSR_ID(8, "encp"), 370 + CLK_MSR_ID(9, "encl"), 371 + CLK_MSR_ID(10, "vdac"), 372 + CLK_MSR_ID(11, "eth_tx"), 373 + CLK_MSR_ID(12, "hifi_pll"), 374 + CLK_MSR_ID(13, "mod_tcon"), 375 + CLK_MSR_ID(14, "fec_0"), 376 + CLK_MSR_ID(15, "fec_1"), 377 + CLK_MSR_ID(16, "fec_2"), 378 + CLK_MSR_ID(17, "sys_pll_div16"), 379 + CLK_MSR_ID(18, "sys_cpu_div16"), 380 + CLK_MSR_ID(19, "lcd_an_ph2"), 381 + CLK_MSR_ID(20, "rtc_osc_out"), 382 + CLK_MSR_ID(21, "lcd_an_ph3"), 383 + CLK_MSR_ID(22, "eth_phy_ref"), 384 + CLK_MSR_ID(23, "mpll_50m"), 385 + CLK_MSR_ID(24, "eth_125m"), 386 + CLK_MSR_ID(25, "eth_rmii"), 387 + CLK_MSR_ID(26, "sc_int"), 388 + CLK_MSR_ID(27, "in_mac"), 389 + CLK_MSR_ID(28, "sar_adc"), 390 + CLK_MSR_ID(29, "pcie_inp"), 391 + CLK_MSR_ID(30, "pcie_inn"), 392 + CLK_MSR_ID(31, "mpll_test_out"), 393 + CLK_MSR_ID(32, "vdec"), 394 + CLK_MSR_ID(34, "eth_mpll_50m"), 395 + CLK_MSR_ID(35, "mali"), 396 + CLK_MSR_ID(36, "hdmi_tx_pixel"), 397 + CLK_MSR_ID(37, "cdac"), 398 + CLK_MSR_ID(38, "vdin_meas"), 399 + CLK_MSR_ID(39, "bt656"), 400 + CLK_MSR_ID(40, "arm_ring_osc_out_4"), 401 + CLK_MSR_ID(41, "eth_rx_or_rmii"), 402 + CLK_MSR_ID(42, "mp0_out"), 403 + CLK_MSR_ID(43, "fclk_div5"), 404 + CLK_MSR_ID(44, "pwm_b"), 405 + CLK_MSR_ID(45, "pwm_a"), 406 + CLK_MSR_ID(46, "vpu"), 407 + CLK_MSR_ID(47, "ddr_dpll_pt"), 408 + CLK_MSR_ID(48, "mp1_out"), 409 + CLK_MSR_ID(49, "mp2_out"), 410 + CLK_MSR_ID(50, "mp3_out"), 411 + CLK_MSR_ID(51, "sd_emmc_c"), 412 + CLK_MSR_ID(52, "sd_emmc_b"), 413 + CLK_MSR_ID(53, "sd_emmc_a"), 414 + CLK_MSR_ID(54, "vpu_clkc"), 415 + CLK_MSR_ID(55, "vid_pll_div_out"), 416 + CLK_MSR_ID(56, "wave420l_a"), 417 + CLK_MSR_ID(57, "wave420l_c"), 418 + CLK_MSR_ID(58, "wave420l_b"), 419 + CLK_MSR_ID(59, "hcodec"), 420 + CLK_MSR_ID(60, "arm_ring_osc_out_5"), 421 + CLK_MSR_ID(61, "gpio_msr"), 422 + CLK_MSR_ID(62, "hevcb"), 423 + CLK_MSR_ID(63, "dsi_meas"), 424 + CLK_MSR_ID(64, "spicc_1"), 425 + CLK_MSR_ID(65, "spicc_0"), 426 + CLK_MSR_ID(66, "vid_lock"), 427 + CLK_MSR_ID(67, "dsi_phy"), 428 + CLK_MSR_ID(68, "hdcp22_esm"), 429 + CLK_MSR_ID(69, "hdcp22_skp"), 430 + CLK_MSR_ID(70, "pwm_f"), 431 + CLK_MSR_ID(71, "pwm_e"), 432 + CLK_MSR_ID(72, "pwm_d"), 433 + CLK_MSR_ID(73, "pwm_c"), 434 + CLK_MSR_ID(74, "arm_ring_osc_out_6"), 435 + CLK_MSR_ID(75, "hevcf"), 436 + CLK_MSR_ID(76, "arm_ring_osc_out_7"), 437 + CLK_MSR_ID(77, "rng_ring_osc_0"), 438 + CLK_MSR_ID(78, "rng_ring_osc_1"), 439 + CLK_MSR_ID(79, "rng_ring_osc_2"), 440 + CLK_MSR_ID(80, "rng_ring_osc_3"), 441 + CLK_MSR_ID(81, "vapb"), 442 + CLK_MSR_ID(82, "ge2d"), 443 + CLK_MSR_ID(83, "co_rx"), 444 + CLK_MSR_ID(84, "co_tx"), 445 + CLK_MSR_ID(85, "arm_ring_osc_out_8"), 446 + CLK_MSR_ID(86, "arm_ring_osc_out_9"), 447 + CLK_MSR_ID(87, "mipi_dsi_phy"), 448 + CLK_MSR_ID(88, "cis2_adapt"), 449 + CLK_MSR_ID(89, "hdmi_todig"), 450 + CLK_MSR_ID(90, "hdmitx_sys"), 451 + CLK_MSR_ID(91, "nna_core"), 452 + CLK_MSR_ID(92, "nna_axi"), 453 + CLK_MSR_ID(93, "vad"), 454 + CLK_MSR_ID(94, "eth_phy_rx"), 455 + CLK_MSR_ID(95, "eth_phy_pll"), 456 + CLK_MSR_ID(96, "vpu_b"), 457 + CLK_MSR_ID(97, "cpu_b_tmp"), 458 + CLK_MSR_ID(98, "ts"), 459 + CLK_MSR_ID(99, "arm_ring_osc_out_10"), 460 + CLK_MSR_ID(100, "arm_ring_osc_out_11"), 461 + CLK_MSR_ID(101, "arm_ring_osc_out_12"), 462 + CLK_MSR_ID(102, "arm_ring_osc_out_13"), 463 + CLK_MSR_ID(103, "arm_ring_osc_out_14"), 464 + CLK_MSR_ID(104, "arm_ring_osc_out_15"), 465 + CLK_MSR_ID(105, "arm_ring_osc_out_16"), 466 + CLK_MSR_ID(106, "ephy_test"), 467 + CLK_MSR_ID(107, "au_dac_g128x"), 468 + CLK_MSR_ID(108, "audio_locker_out"), 469 + CLK_MSR_ID(109, "audio_locker_in"), 470 + CLK_MSR_ID(110, "audio_tdmout_c_sclk"), 471 + CLK_MSR_ID(111, "audio_tdmout_b_sclk"), 472 + CLK_MSR_ID(112, "audio_tdmout_a_sclk"), 473 + CLK_MSR_ID(113, "audio_tdmin_lb_sclk"), 474 + CLK_MSR_ID(114, "audio_tdmin_c_sclk"), 475 + CLK_MSR_ID(115, "audio_tdmin_b_sclk"), 476 + CLK_MSR_ID(116, "audio_tdmin_a_sclk"), 477 + CLK_MSR_ID(117, "audio_resample"), 478 + CLK_MSR_ID(118, "audio_pdm_sys"), 479 + CLK_MSR_ID(119, "audio_spdifout_b"), 480 + CLK_MSR_ID(120, "audio_spdifout"), 481 + CLK_MSR_ID(121, "audio_spdifin"), 482 + CLK_MSR_ID(122, "audio_pdm_dclk"), 483 + CLK_MSR_ID(123, "audio_resampled"), 484 + CLK_MSR_ID(124, "earcrx_pll"), 485 + CLK_MSR_ID(125, "earcrx_pll_test"), 486 + CLK_MSR_ID(126, "csi_phy0"), 487 + CLK_MSR_ID(127, "csi2_data"), 488 + }; 489 + 360 490 static int meson_measure_id(struct meson_msr_id *clk_msr_id, 361 491 unsigned int duration) 362 492 { ··· 674 544 { 675 545 .compatible = "amlogic,meson-g12a-clk-measure", 676 546 .data = (void *)clk_msr_g12a, 547 + }, 548 + { 549 + .compatible = "amlogic,meson-sm1-clk-measure", 550 + .data = (void *)clk_msr_sm1, 677 551 }, 678 552 { /* sentinel */ } 679 553 };