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clk: renesas: r8a77995: Add missing CPEX clock

The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Feb 28, 2018) added
the CPEX clock on R-Car D3. This clock can be selected as a clock
source for CMT1 (Compare Match Timer Type 1).

Add the missing clock to the DT bindings header, and implement support
for it in the clock driver.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Stephen Boyd <sboyd@kernel.org>

+3 -1
+2 -1
drivers/clk/renesas/r8a77995-cpg-mssr.c
··· 22 22 23 23 enum clk_ids { 24 24 /* Core Clock Outputs exported to DT */ 25 - LAST_DT_CORE_CLK = R8A77995_CLK_CP, 25 + LAST_DT_CORE_CLK = R8A77995_CLK_CPEX, 26 26 27 27 /* External Input Clocks */ 28 28 CLK_EXTAL, ··· 92 92 93 93 DEF_FIXED("cl", R8A77995_CLK_CL, CLK_PLL1, 48, 1), 94 94 DEF_FIXED("cp", R8A77995_CLK_CP, CLK_EXTAL, 2, 1), 95 + DEF_FIXED("cpex", R8A77995_CLK_CPEX, CLK_EXTAL, 4, 1), 95 96 96 97 DEF_DIV6_RO("osc", R8A77995_CLK_OSC, CLK_EXTAL, CPG_RCKCR, 8), 97 98
+1
include/dt-bindings/clock/r8a77995-cpg-mssr.h
··· 49 49 #define R8A77995_CLK_LV0 38 50 50 #define R8A77995_CLK_LV1 39 51 51 #define R8A77995_CLK_CP 40 52 + #define R8A77995_CLK_CPEX 41 52 53 53 54 #endif /* __DT_BINDINGS_CLOCK_R8A77995_CPG_MSSR_H__ */