Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

ARM: dts: kirkwood: Add DTS for Zyxel NSA325

Add a new DTS file to support the Zyxel NSA325(v2) dual bay
NAS device, based on the NSA320 DTS files.

The only difference to the NSA320 device is GPIO47.
This en/disables the power for the hdd in slot2, currently
fixed to on.

[gregory.clement@free-electrons.com: fix comment format]
Signed-off-by: Hans Ulli Kroll <ulli.kroll@googlemail.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>

authored by

Hans Ulli Kroll and committed by
Gregory CLEMENT
61521e39 4c945e85

+239
+1
arch/arm/boot/dts/Makefile
··· 200 200 kirkwood-ns2mini.dtb \ 201 201 kirkwood-nsa310.dtb \ 202 202 kirkwood-nsa310a.dtb \ 203 + kirkwood-nsa325.dtb \ 203 204 kirkwood-openblocks_a6.dtb \ 204 205 kirkwood-openblocks_a7.dtb \ 205 206 kirkwood-openrd-base.dtb \
+238
arch/arm/boot/dts/kirkwood-nsa325.dts
··· 1 + /* Device tree file for the Zyxel NSA 325 NAS box. 2 + * 3 + * Copyright (c) 2015, Hans Ulli Kroll <ulli.kroll@googlemail.com> 4 + * 5 + * This program is free software; you can redistribute it and/or 6 + * modify it under the terms of the GNU General Public License 7 + * as published by the Free Software Foundation; either version 8 + * 2 of the License, or (at your option) any later version. 9 + * 10 + * Based upon the board setup file created by Peter Schildmann 11 + */ 12 + 13 + /dts-v1/; 14 + 15 + #include "kirkwood-nsa3x0-common.dtsi" 16 + 17 + / { 18 + model = "ZyXEL NSA325"; 19 + compatible = "zyxel,nsa325", "marvell,kirkwood-88f6282", "marvell,kirkwood"; 20 + 21 + memory { 22 + device_type = "memory"; 23 + reg = <0x00000000 0x20000000>; 24 + }; 25 + 26 + chosen { 27 + bootargs = "console=ttyS0,115200"; 28 + stdout-path = &uart0; 29 + }; 30 + 31 + mbus { 32 + pcie-controller { 33 + status = "okay"; 34 + 35 + pcie@1,0 { 36 + status = "okay"; 37 + }; 38 + }; 39 + }; 40 + 41 + ocp@f1000000 { 42 + pinctrl: pin-controller@10000 { 43 + pinctrl-names = "default"; 44 + 45 + pmx_led_hdd2_green: pmx-led-hdd2-green { 46 + marvell,pins = "mpp12"; 47 + marvell,function = "gpio"; 48 + }; 49 + 50 + pmx_led_hdd2_red: pmx-led-hdd2-red { 51 + marvell,pins = "mpp13"; 52 + marvell,function = "gpio"; 53 + }; 54 + 55 + pmx_mcu_data: pmx-mcu-data { 56 + marvell,pins = "mpp14"; 57 + marvell,function = "gpio"; 58 + }; 59 + 60 + pmx_led_usb_green: pmx-led-usb-green { 61 + marvell,pins = "mpp15"; 62 + marvell,function = "gpio"; 63 + }; 64 + 65 + pmx_mcu_clk: pmx-mcu-clk { 66 + marvell,pins = "mpp16"; 67 + marvell,function = "gpio"; 68 + }; 69 + 70 + pmx_mcu_act: pmx-mcu-act { 71 + marvell,pins = "mpp17"; 72 + marvell,function = "gpio"; 73 + }; 74 + 75 + pmx_led_sys_green: pmx-led-sys-green { 76 + marvell,pins = "mpp28"; 77 + marvell,function = "gpio"; 78 + }; 79 + 80 + pmx_led_sys_orange: pmx-led-sys-orange { 81 + marvell,pins = "mpp29"; 82 + marvell,function = "gpio"; 83 + }; 84 + 85 + pmx_led_hdd1_green: pmx-led-hdd1-green { 86 + marvell,pins = "mpp41"; 87 + marvell,function = "gpio"; 88 + }; 89 + 90 + pmx_led_hdd1_red: pmx-led-hdd1-red { 91 + marvell,pins = "mpp42"; 92 + marvell,function = "gpio"; 93 + }; 94 + 95 + pmx_htp: pmx-htp { 96 + marvell,pins = "mpp43"; 97 + marvell,function = "gpio"; 98 + }; 99 + 100 + /* 101 + * Buzzer needs to be switched at around 1kHz so is 102 + * not compatible with the gpio-beeper driver. 103 + */ 104 + pmx_buzzer: pmx-buzzer { 105 + marvell,pins = "mpp44"; 106 + marvell,function = "gpio"; 107 + }; 108 + 109 + pmx_vid_b1: pmx-vid-b1 { 110 + marvell,pins = "mpp45"; 111 + marvell,function = "gpio"; 112 + }; 113 + 114 + pmx_power_resume_data: pmx-power-resume-data { 115 + marvell,pins = "mpp47"; 116 + marvell,function = "gpio"; 117 + }; 118 + 119 + pmx_power_resume_clk: pmx-power-resume-clk { 120 + marvell,pins = "mpp49"; 121 + marvell,function = "gpio"; 122 + }; 123 + 124 + pmx_pwr_sata1: pmx-pwr-sata1 { 125 + marvell,pins = "mpp47"; 126 + marvell,function = "gpio"; 127 + }; 128 + }; 129 + 130 + /* This board uses the pcf8563 RTC instead of the SoC RTC */ 131 + rtc@10300 { 132 + status = "disabled"; 133 + }; 134 + 135 + i2c@11000 { 136 + status = "okay"; 137 + 138 + pcf8563: pcf8563@51 { 139 + compatible = "nxp,pcf8563"; 140 + reg = <0x51>; 141 + }; 142 + }; 143 + }; 144 + 145 + regulators { 146 + compatible = "simple-bus"; 147 + #address-cells = <1>; 148 + #size-cells = <0>; 149 + pinctrl-0 = <&pmx_pwr_sata1>; 150 + pinctrl-names = "default"; 151 + 152 + usb0_power: regulator@1 { 153 + enable-active-high; 154 + }; 155 + 156 + sata1_power: regulator@2 { 157 + compatible = "regulator-fixed"; 158 + reg = <2>; 159 + regulator-name = "SATA1 Power"; 160 + regulator-min-microvolt = <5000000>; 161 + regulator-max-microvolt = <5000000>; 162 + regulator-always-on; 163 + regulator-boot-on; 164 + enable-active-high; 165 + gpio = <&gpio1 15 GPIO_ACTIVE_HIGH>; 166 + }; 167 + }; 168 + 169 + gpio-leds { 170 + compatible = "gpio-leds"; 171 + pinctrl-0 = <&pmx_led_hdd2_green &pmx_led_hdd2_red 172 + &pmx_led_usb_green 173 + &pmx_led_sys_green &pmx_led_sys_orange 174 + &pmx_led_copy_green &pmx_led_copy_red 175 + &pmx_led_hdd1_green &pmx_led_hdd1_red>; 176 + pinctrl-names = "default"; 177 + 178 + green-sys { 179 + label = "nsa325:green:sys"; 180 + gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>; 181 + }; 182 + orange-sys { 183 + label = "nsa325:orange:sys"; 184 + gpios = <&gpio0 29 GPIO_ACTIVE_HIGH>; 185 + }; 186 + green-hdd1 { 187 + label = "nsa325:green:hdd1"; 188 + gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>; 189 + }; 190 + red-hdd1 { 191 + label = "nsa325:red:hdd1"; 192 + gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>; 193 + }; 194 + green-hdd2 { 195 + label = "nsa325:green:hdd2"; 196 + gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; 197 + }; 198 + red-hdd2 { 199 + label = "nsa325:red:hdd2"; 200 + gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>; 201 + }; 202 + green-usb { 203 + label = "nsa325:green:usb"; 204 + gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>; 205 + }; 206 + green-copy { 207 + label = "nsa325:green:copy"; 208 + gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; 209 + }; 210 + red-copy { 211 + label = "nsa325:red:copy"; 212 + gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>; 213 + }; 214 + 215 + /* The following pins are currently not assigned to a driver, 216 + some of them should be configured as inputs. 217 + pinctrl-0 = <&pmx_mcu_data &pmx_mcu_clk &pmx_mcu_act 218 + &pmx_htp &pmx_vid_b1 219 + &pmx_power_resume_data &pmx_power_resume_clk>; */ 220 + }; 221 + 222 + 223 + }; 224 + 225 + &mdio { 226 + status = "okay"; 227 + ethphy0: ethernet-phy@1 { 228 + reg = <1>; 229 + }; 230 + }; 231 + 232 + &eth0 { 233 + status = "okay"; 234 + ethernet0-port@0 { 235 + phy-handle = <&ethphy0>; 236 + }; 237 + }; 238 +