···1276127612771277 data->vrm = vid_which_vrm();12781278 superio_enter(sio_data->sioreg);12791279- /* Set VID input sensibility if needed. In theory the BIOS should12801280- have set it, but in practice it's not always the case. */12811281- en_vrm10 = superio_inb(sio_data->sioreg, SIO_REG_EN_VRM10);12821282- if ((en_vrm10 & 0x08) && data->vrm != 100) {12831283- dev_warn(dev, "Setting VID input voltage to TTL\n");12841284- superio_outb(sio_data->sioreg, SIO_REG_EN_VRM10,12851285- en_vrm10 & ~0x08);12861286- } else if (!(en_vrm10 & 0x08) && data->vrm == 100) {12871287- dev_warn(dev, "Setting VID input voltage to VRM10\n");12881288- superio_outb(sio_data->sioreg, SIO_REG_EN_VRM10,12891289- en_vrm10 | 0x08);12901290- }12911279 /* Read VID value */12921280 superio_select(sio_data->sioreg, W83627EHF_LD_HWM);12931293- if (superio_inb(sio_data->sioreg, SIO_REG_VID_CTRL) & 0x80)12811281+ if (superio_inb(sio_data->sioreg, SIO_REG_VID_CTRL) & 0x80) {12821282+ /* Set VID input sensibility if needed. In theory the BIOS12831283+ should have set it, but in practice it's not always the12841284+ case. We only do it for the W83627EHF/EHG because the12851285+ W83627DHG is more complex in this respect. */12861286+ if (sio_data->kind == w83627ehf) {12871287+ en_vrm10 = superio_inb(sio_data->sioreg,12881288+ SIO_REG_EN_VRM10);12891289+ if ((en_vrm10 & 0x08) && data->vrm == 90) {12901290+ dev_warn(dev, "Setting VID input voltage to "12911291+ "TTL\n");12921292+ superio_outb(sio_data->sioreg, SIO_REG_EN_VRM10,12931293+ en_vrm10 & ~0x08);12941294+ } else if (!(en_vrm10 & 0x08) && data->vrm == 100) {12951295+ dev_warn(dev, "Setting VID input voltage to "12961296+ "VRM10\n");12971297+ superio_outb(sio_data->sioreg, SIO_REG_EN_VRM10,12981298+ en_vrm10 | 0x08);12991299+ }13001300+ }13011301+12941302 data->vid = superio_inb(sio_data->sioreg, SIO_REG_VID_DATA) & 0x3f;12951295- else {13031303+ } else {12961304 dev_info(dev, "VID pins in output mode, CPU VID not "12971305 "available\n");12981306 data->vid = 0x3f;