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Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
media: Add MIPI CCI register access helper functions
The CSI2 specification specifies a standard method to access camera sensor
registers called "Camera Control Interface (CCI)".
This uses either 8 or 16 bit (big-endian wire order) register addresses
and supports 8, 16, 24 or 32 bit (big-endian wire order) register widths.
Currently a lot of Linux camera sensor drivers all have their own custom
helpers for this, often copy and pasted from other drivers.
Add a set of generic helpers for this so that all sensor drivers can
switch to a single common implementation.
These helpers take an extra optional "int *err" function parameter,
this can be used to chain a bunch of register accesses together with
only a single error check at the end, rather than needing to error
check each individual register access. The first failing call will
set the contents of err to a non 0 value and all other calls will
then become no-ops.
Link: https://lore.kernel.org/linux-media/59aefa7f-7bf9-6736-6040-39551329cd0a@redhat.com/
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Tested-by: Tommaso Merciai <tomm.merciai@gmail.com>
Reviewed-by: Tommaso Merciai <tomm.merciai@gmail.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
authored by
Hans de Goede
and committed by
Mauro Carvalho Chehab
613cbb91
35a29918
+307
+5
Documentation/driver-api/media/v4l2-cci.rst
+5
Documentation/driver-api/media/v4l2-cci.rst
+1
Documentation/driver-api/media/v4l2-core.rst
+1
Documentation/driver-api/media/v4l2-core.rst
+9
drivers/media/v4l2-core/Kconfig
+9
drivers/media/v4l2-core/Kconfig
+1
drivers/media/v4l2-core/Makefile
+1
drivers/media/v4l2-core/Makefile
+166
drivers/media/v4l2-core/v4l2-cci.c
+166
drivers/media/v4l2-core/v4l2-cci.c
···
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// SPDX-License-Identifier: GPL-2.0
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/*
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* MIPI Camera Control Interface (CCI) register access helpers.
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*
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* Copyright (C) 2023 Hans de Goede <hansg@kernel.org>
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*/
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#include <linux/bitfield.h>
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#include <linux/delay.h>
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#include <linux/dev_printk.h>
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#include <linux/module.h>
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#include <linux/regmap.h>
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#include <linux/types.h>
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#include <asm/unaligned.h>
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#include <media/v4l2-cci.h>
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int cci_read(struct regmap *map, u32 reg, u64 *val, int *err)
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{
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unsigned int len;
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u8 buf[8];
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int ret;
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+
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if (err && *err)
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return *err;
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len = FIELD_GET(CCI_REG_WIDTH_MASK, reg);
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reg = FIELD_GET(CCI_REG_ADDR_MASK, reg);
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ret = regmap_bulk_read(map, reg, buf, len);
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if (ret) {
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dev_err(regmap_get_device(map), "Error reading reg 0x%4x: %d\n",
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reg, ret);
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goto out;
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}
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switch (len) {
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case 1:
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*val = buf[0];
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break;
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case 2:
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*val = get_unaligned_be16(buf);
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break;
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case 3:
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*val = get_unaligned_be24(buf);
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break;
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case 4:
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*val = get_unaligned_be32(buf);
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break;
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case 8:
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*val = get_unaligned_be64(buf);
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break;
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default:
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dev_err(regmap_get_device(map), "Error invalid reg-width %u for reg 0x%04x\n",
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len, reg);
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ret = -EINVAL;
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break;
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}
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out:
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if (ret && err)
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*err = ret;
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return ret;
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}
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EXPORT_SYMBOL_GPL(cci_read);
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int cci_write(struct regmap *map, u32 reg, u64 val, int *err)
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{
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unsigned int len;
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u8 buf[8];
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int ret;
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if (err && *err)
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return *err;
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len = FIELD_GET(CCI_REG_WIDTH_MASK, reg);
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reg = FIELD_GET(CCI_REG_ADDR_MASK, reg);
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switch (len) {
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case 1:
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buf[0] = val;
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break;
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case 2:
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put_unaligned_be16(val, buf);
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break;
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case 3:
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put_unaligned_be24(val, buf);
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break;
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case 4:
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put_unaligned_be32(val, buf);
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break;
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case 8:
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put_unaligned_be64(val, buf);
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break;
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default:
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dev_err(regmap_get_device(map), "Error invalid reg-width %u for reg 0x%04x\n",
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len, reg);
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ret = -EINVAL;
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goto out;
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}
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ret = regmap_bulk_write(map, reg, buf, len);
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if (ret)
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dev_err(regmap_get_device(map), "Error writing reg 0x%4x: %d\n",
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reg, ret);
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out:
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if (ret && err)
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*err = ret;
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return ret;
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}
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EXPORT_SYMBOL_GPL(cci_write);
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int cci_update_bits(struct regmap *map, u32 reg, u64 mask, u64 val, int *err)
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{
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u64 readval;
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int ret;
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ret = cci_read(map, reg, &readval, err);
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if (ret)
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return ret;
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val = (readval & ~mask) | (val & mask);
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return cci_write(map, reg, val, err);
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}
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EXPORT_SYMBOL_GPL(cci_update_bits);
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int cci_multi_reg_write(struct regmap *map, const struct cci_reg_sequence *regs,
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unsigned int num_regs, int *err)
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{
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unsigned int i;
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int ret;
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for (i = 0; i < num_regs; i++) {
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ret = cci_write(map, regs[i].reg, regs[i].val, err);
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if (ret)
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return ret;
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}
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return 0;
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}
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EXPORT_SYMBOL_GPL(cci_multi_reg_write);
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#if IS_ENABLED(CONFIG_V4L2_CCI_I2C)
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struct regmap *devm_cci_regmap_init_i2c(struct i2c_client *client,
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int reg_addr_bits)
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{
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struct regmap_config config = {
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.reg_bits = reg_addr_bits,
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.val_bits = 8,
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.reg_format_endian = REGMAP_ENDIAN_BIG,
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.disable_locking = true,
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};
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return devm_regmap_init_i2c(client, &config);
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}
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EXPORT_SYMBOL_GPL(devm_cci_regmap_init_i2c);
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#endif
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Hans de Goede <hansg@kernel.org>");
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MODULE_DESCRIPTION("MIPI Camera Control Interface (CCI) support");
+125
include/media/v4l2-cci.h
+125
include/media/v4l2-cci.h
···
1
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* MIPI Camera Control Interface (CCI) register access helpers.
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*
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* Copyright (C) 2023 Hans de Goede <hansg@kernel.org>
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*/
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#ifndef _V4L2_CCI_H
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#define _V4L2_CCI_H
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#include <linux/types.h>
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struct i2c_client;
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struct regmap;
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/**
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* struct cci_reg_sequence - An individual write from a sequence of CCI writes
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*
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* @reg: Register address, use CCI_REG#() macros to encode reg width
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* @val: Register value
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*
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* Register/value pairs for sequences of writes.
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*/
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struct cci_reg_sequence {
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u32 reg;
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u64 val;
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};
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/*
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* Macros to define register address with the register width encoded
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* into the higher bits.
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*/
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#define CCI_REG_ADDR_MASK GENMASK(15, 0)
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#define CCI_REG_WIDTH_SHIFT 16
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#define CCI_REG_WIDTH_MASK GENMASK(19, 16)
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#define CCI_REG8(x) ((1 << CCI_REG_WIDTH_SHIFT) | (x))
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#define CCI_REG16(x) ((2 << CCI_REG_WIDTH_SHIFT) | (x))
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#define CCI_REG24(x) ((3 << CCI_REG_WIDTH_SHIFT) | (x))
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#define CCI_REG32(x) ((4 << CCI_REG_WIDTH_SHIFT) | (x))
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#define CCI_REG64(x) ((8 << CCI_REG_WIDTH_SHIFT) | (x))
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/**
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* cci_read() - Read a value from a single CCI register
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*
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* @map: Register map to read from
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* @reg: Register address to read, use CCI_REG#() macros to encode reg width
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* @val: Pointer to store read value
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* @err: Optional pointer to store errors, if a previous error is set
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* then the read will be skipped
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*
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* Return: %0 on success or a negative error code on failure.
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*/
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int cci_read(struct regmap *map, u32 reg, u64 *val, int *err);
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/**
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* cci_write() - Write a value to a single CCI register
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*
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* @map: Register map to write to
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* @reg: Register address to write, use CCI_REG#() macros to encode reg width
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* @val: Value to be written
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* @err: Optional pointer to store errors, if a previous error is set
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* then the write will be skipped
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*
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* Return: %0 on success or a negative error code on failure.
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*/
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int cci_write(struct regmap *map, u32 reg, u64 val, int *err);
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/**
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* cci_update_bits() - Perform a read/modify/write cycle on
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* a single CCI register
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*
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* @map: Register map to update
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* @reg: Register address to update, use CCI_REG#() macros to encode reg width
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* @mask: Bitmask to change
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* @val: New value for bitmask
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* @err: Optional pointer to store errors, if a previous error is set
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* then the update will be skipped
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*
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* Note this uses read-modify-write to update the bits, atomicity with regards
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* to other cci_*() register access functions is NOT guaranteed.
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*
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* Return: %0 on success or a negative error code on failure.
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*/
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int cci_update_bits(struct regmap *map, u32 reg, u64 mask, u64 val, int *err);
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/**
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* cci_multi_reg_write() - Write multiple registers to the device
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*
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* @map: Register map to write to
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* @regs: Array of structures containing register-address, -value pairs to be
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* written, register-addresses use CCI_REG#() macros to encode reg width
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* @num_regs: Number of registers to write
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* @err: Optional pointer to store errors, if a previous error is set
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* then the write will be skipped
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*
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* Write multiple registers to the device where the set of register, value
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* pairs are supplied in any order, possibly not all in a single range.
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*
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* Use of the CCI_REG#() macros to encode reg width is mandatory.
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*
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* For raw lists of register-address, -value pairs with only 8 bit
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* wide writes regmap_multi_reg_write() can be used instead.
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*
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* Return: %0 on success or a negative error code on failure.
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*/
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int cci_multi_reg_write(struct regmap *map, const struct cci_reg_sequence *regs,
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unsigned int num_regs, int *err);
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#if IS_ENABLED(CONFIG_V4L2_CCI_I2C)
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/**
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* devm_cci_regmap_init_i2c() - Create regmap to use with cci_*() register
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* access functions
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*
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* @client: i2c_client to create the regmap for
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* @reg_addr_bits: register address width to use (8 or 16)
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*
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* Note the memory for the created regmap is devm() managed, tied to the client.
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*
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* Return: %0 on success or a negative error code on failure.
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*/
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struct regmap *devm_cci_regmap_init_i2c(struct i2c_client *client,
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int reg_addr_bits);
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#endif
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#endif