tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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Merge tag 'omap-for-v3.9/multiplatform-enable-signed-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/multiplatform

From Tony Lindgren:
The last dependency for enabling multiplatform support for omap2+ is now
finally gone with commit 62e4d357 (ARM: 7609/1: disable errata work-arounds
which access secure registers) that was preventing booting omap4.

Note that make uImage will no longer work properly because of unspecified
load address, so uImage needs to be created manually with:

$ mkimage -A arm -O linux -T kernel -C none -a 0x80008000 -e 0x80008000 \
-n "Linux" -d zImage-omap2plus uImage-omap2plus

You can also boot minimal vexpress configuration using qemu with:

$ qemu-system-arm -machine vexpress-a9 -m 1024 -net nic -net user -serial stdio \
-append "console=ttyAMA0,115200n8 rw root=/dev/mmcblk0p2 rootwait" \
-kernel zImage-omap2plus -initrd initrd.img -sd rootfs.img

Please note that some custom defconfigs now need to be updated to include
the following options:

CONFIG_ARCH_MULTIPLATFORM=y
CONFIG_ARCH_MULTI_V7=y
CONFIG_ARCH_OMAP2PLUS=y

And possibly also:

CONFIG_ARCH_MULTI_V6=y

Updating is needed at least for RMK's minimal allnoconfig files.

And if you need DEBUG_LL for earlyprintk, you now have to select the
debug port manually with Kconfig.

* tag 'omap-for-v3.9/multiplatform-enable-signed-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: Remove now obsolete uncompress.h and debug-macro.S
ARM: OMAP2+: Add minimal support for booting vexpress
ARM: OMAP2+: Enable ARCH_MULTIPLATFORM support
ARM: OMAP2+: Disable code that currently does not work with multiplaform
ARM: OMAP2+: Add multiplatform debug_ll support
ARM: OMAP: Fix dmaengine init for multiplatform
ARM: OMAP: Fix i2c cmdline initcall for multiplatform
ARM: OMAP2+: Use omap initcalls
ARM: OMAP2+: Limit omap initcalls to omap only on multiplatform kernels

Signed-off-by: Olof Johansson <olof@lixom.net>

Olof Johansson 61301332 9931faca

+314 -370
+10 -3
arch/arm/Kconfig
··· 937 937 help 938 938 Support for TI's DaVinci platform. 939 939 940 - config ARCH_OMAP 941 - bool "TI OMAP" 940 + config ARCH_OMAP1 941 + bool "TI OMAP1" 942 942 depends on MMU 943 943 select ARCH_HAS_CPUFREQ 944 944 select ARCH_HAS_HOLES_MEMORYMODEL 945 + select ARCH_OMAP 945 946 select ARCH_REQUIRE_GPIOLIB 947 + select CLKDEV_LOOKUP 946 948 select CLKSRC_MMIO 947 949 select GENERIC_CLOCKEVENTS 950 + select GENERIC_IRQ_CHIP 948 951 select HAVE_CLK 952 + select HAVE_IDE 953 + select IRQ_DOMAIN 954 + select NEED_MACH_IO_H if PCCARD 955 + select NEED_MACH_MEMORY_H 949 956 help 950 - Support for TI's OMAP platform (OMAP1/2/3/4). 957 + Support for older TI OMAP1 (omap7xx, omap15xx or omap16xx) 951 958 952 959 config ARCH_VT8500_SINGLE 953 960 bool "VIA/WonderMedia 85xx"
+56
arch/arm/Kconfig.debug
··· 291 291 Say Y here if you want kernel low-level debugging support 292 292 on MVEBU based platforms. 293 293 294 + config DEBUG_OMAP2PLUS_UART 295 + bool "Kernel low-level debugging messages via OMAP2PLUS UART" 296 + depends on ARCH_OMAP2PLUS 297 + help 298 + Say Y here if you want kernel low-level debugging support 299 + on OMAP2PLUS based platforms. 300 + 294 301 config DEBUG_PICOXCELL_UART 295 302 depends on ARCH_PICOXCELL 296 303 bool "Use PicoXcell UART for low-level debug" ··· 468 461 469 462 choice 470 463 prompt "Low-level debug console UART" 464 + depends on DEBUG_OMAP2PLUS_UART 465 + 466 + config DEBUG_OMAP2UART1 467 + bool "OMAP2/3/4 UART1 (omap2/3 sdp boards and some omap3 boards)" 468 + help 469 + This covers at least h4, 2430sdp, 3430sdp, 3630sdp, 470 + omap3 torpedo and 3530 lv som. 471 + 472 + config DEBUG_OMAP2UART2 473 + bool "OMAP2/3/4 UART2" 474 + 475 + config DEBUG_OMAP2UART3 476 + bool "OMAP2 UART3 (n8x0)" 477 + 478 + config DEBUG_OMAP3UART3 479 + bool "OMAP3 UART3 (most omap3 boards)" 480 + help 481 + This covers at least cm_t3x, beagle, crane, devkit8000, 482 + igep00x0, ldp, n900, n9(50), pandora, overo, touchbook, 483 + and 3517evm. 484 + 485 + config DEBUG_OMAP4UART3 486 + bool "OMAP4/5 UART3 (omap4 blaze, panda, omap5 sevm)" 487 + 488 + config DEBUG_OMAP3UART4 489 + bool "OMAP36XX UART4" 490 + 491 + config DEBUG_OMAP4UART4 492 + bool "OMAP4/5 UART4" 493 + 494 + config DEBUG_TI81XXUART1 495 + bool "TI81XX UART1 (ti8148evm)" 496 + 497 + config DEBUG_TI81XXUART2 498 + bool "TI81XX UART2" 499 + 500 + config DEBUG_TI81XXUART3 501 + bool "TI81XX UART3 (ti8168evm)" 502 + 503 + config DEBUG_AM33XXUART1 504 + bool "AM33XX UART1" 505 + 506 + config DEBUG_ZOOM_UART 507 + bool "Zoom2/3 UART" 508 + endchoice 509 + 510 + choice 511 + prompt "Low-level debug console UART" 471 512 depends on DEBUG_LL && DEBUG_TEGRA_UART 472 513 473 514 config TEGRA_DEBUG_UART_AUTO_ODMDATA ··· 556 501 DEBUG_IMX6Q_UART 557 502 default "debug/highbank.S" if DEBUG_HIGHBANK_UART 558 503 default "debug/mvebu.S" if DEBUG_MVEBU_UART 504 + default "debug/omap2plus.S" if DEBUG_OMAP2PLUS_UART 559 505 default "debug/picoxcell.S" if DEBUG_PICOXCELL_UART 560 506 default "debug/socfpga.S" if DEBUG_SOCFPGA_UART 561 507 default "debug/sunxi.S" if DEBUG_SUNXI_UART0 || DEBUG_SUNXI_UART1
+5 -1
arch/arm/configs/omap2plus_defconfig
··· 20 20 CONFIG_MODVERSIONS=y 21 21 CONFIG_MODULE_SRCVERSION_ALL=y 22 22 # CONFIG_BLK_DEV_BSG is not set 23 - CONFIG_ARCH_OMAP=y 23 + CONFIG_ARCH_OMAP2PLUS=y 24 24 CONFIG_OMAP_RESET_CLOCKS=y 25 25 CONFIG_OMAP_MUX_DEBUG=y 26 + CONFIG_ARCH_VEXPRESS_CA9X4=y 26 27 CONFIG_ARM_THUMBEE=y 27 28 CONFIG_ARM_ERRATA_411920=y 28 29 CONFIG_NO_HZ=y ··· 122 121 CONFIG_SERIAL_8250_SHARE_IRQ=y 123 122 CONFIG_SERIAL_8250_DETECT_IRQ=y 124 123 CONFIG_SERIAL_8250_RSA=y 124 + CONFIG_SERIAL_AMBA_PL011=y 125 + CONFIG_SERIAL_AMBA_PL011_CONSOLE=y 125 126 CONFIG_HW_RANDOM=y 126 127 CONFIG_I2C_CHARDEV=y 127 128 CONFIG_SPI=y ··· 197 194 CONFIG_MMC=y 198 195 CONFIG_MMC_UNSAFE_RESUME=y 199 196 CONFIG_SDIO_UART=y 197 + CONFIG_MMC_ARMMMCI=y 200 198 CONFIG_MMC_OMAP=y 201 199 CONFIG_MMC_OMAP_HS=y 202 200 CONFIG_RTC_CLASS=y
+16 -2
arch/arm/mach-omap1/dma.c
··· 24 24 #include <linux/init.h> 25 25 #include <linux/device.h> 26 26 #include <linux/io.h> 27 - 27 + #include <linux/dma-mapping.h> 28 28 #include <linux/omap-dma.h> 29 29 #include <mach/tc.h> 30 30 ··· 270 270 return errata; 271 271 } 272 272 273 + static const struct platform_device_info omap_dma_dev_info = { 274 + .name = "omap-dma-engine", 275 + .id = -1, 276 + .dma_mask = DMA_BIT_MASK(32), 277 + }; 278 + 273 279 static int __init omap1_system_dma_init(void) 274 280 { 275 281 struct omap_system_dma_plat_info *p; 276 282 struct omap_dma_dev_attr *d; 277 - struct platform_device *pdev; 283 + struct platform_device *pdev, *dma_pdev; 278 284 int ret; 279 285 280 286 pdev = platform_device_alloc("omap_dma_system", 0); ··· 386 380 dma_common_ch_start = CPC; 387 381 dma_common_ch_end = COLOR; 388 382 383 + dma_pdev = platform_device_register_full(&omap_dma_dev_info); 384 + if (IS_ERR(dma_pdev)) { 385 + ret = PTR_ERR(dma_pdev); 386 + goto exit_release_pdev; 387 + } 388 + 389 389 return ret; 390 390 391 + exit_release_pdev: 392 + platform_device_del(pdev); 391 393 exit_release_chan: 392 394 kfree(d->chan); 393 395 exit_release_d:
+6
arch/arm/mach-omap1/i2c.c
··· 91 91 92 92 return platform_device_register(pdev); 93 93 } 94 + 95 + static int __init omap_i2c_cmdline(void) 96 + { 97 + return omap_register_i2c_bus_cmdline(); 98 + } 99 + subsys_initcall(omap_i2c_cmdline);
+24 -1
arch/arm/mach-omap2/Kconfig
··· 1 + config ARCH_OMAP 2 + bool 3 + 4 + config ARCH_OMAP2PLUS 5 + bool "TI OMAP2/3/4/5 SoCs with device tree support" if (ARCH_MULTI_V6 || ARCH_MULTI_V7) 6 + select ARCH_HAS_CPUFREQ 7 + select ARCH_HAS_HOLES_MEMORYMODEL 8 + select ARCH_OMAP 9 + select ARCH_REQUIRE_GPIOLIB 10 + select CLKDEV_LOOKUP 11 + select CLKSRC_MMIO 12 + select GENERIC_CLOCKEVENTS 13 + select GENERIC_IRQ_CHIP 14 + select HAVE_CLK 15 + select OMAP_DM_TIMER 16 + select PINCTRL 17 + select PROC_DEVICETREE if PROC_FS 18 + select SPARSE_IRQ 19 + select USE_OF 20 + help 21 + Systems based on OMAP2, OMAP3, OMAP4 or OMAP5 22 + 23 + 1 24 if ARCH_OMAP2PLUS 2 25 3 26 menu "TI OMAP2/3/4 Specific Features" ··· 420 397 421 398 config OMAP4_ERRATA_I688 422 399 bool "OMAP4 errata: Async Bridge Corruption" 423 - depends on ARCH_OMAP4 400 + depends on ARCH_OMAP4 && !ARCH_MULTIPLATFORM 424 401 select ARCH_HAS_BARRIERS 425 402 help 426 403 If a data is stalled inside asynchronous bridge because of back
+3
arch/arm/mach-omap2/Makefile
··· 2 2 # Makefile for the linux kernel. 3 3 # 4 4 5 + ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include \ 6 + -I$(srctree)/arch/arm/plat-omap/include 7 + 5 8 # Common support 6 9 obj-y := id.o io.o control.o mux.o devices.o fb.o serial.o gpmc.o timer.o pm.o \ 7 10 common.o gpio.o dma.o wd_timer.o display.o i2c.o hdq1w.o omap_hwmod.o \
+1 -1
arch/arm/mach-omap2/board-omap3beagle.c
··· 494 494 } 495 495 return 0; 496 496 } 497 - device_initcall(beagle_opp_init); 497 + omap_device_initcall(beagle_opp_init); 498 498 499 499 static void __init omap3_beagle_init(void) 500 500 {
+2 -1
arch/arm/mach-omap2/board-rx51-video.c
··· 18 18 #include <video/omapdss.h> 19 19 #include <linux/platform_data/spi-omap2-mcspi.h> 20 20 21 + #include "soc.h" 21 22 #include "board-rx51.h" 22 23 23 24 #include "mux.h" ··· 86 85 return 0; 87 86 } 88 87 89 - subsys_initcall(rx51_video_init); 88 + omap_subsys_initcall(rx51_video_init); 90 89 #endif /* defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE) */
+1 -1
arch/arm/mach-omap2/clock2xxx.c
··· 52 52 return ret; 53 53 } 54 54 55 - arch_initcall(omap2xxx_clk_arch_init); 55 + omap_arch_initcall(omap2xxx_clk_arch_init); 56 56 57 57
+1 -1
arch/arm/mach-omap2/clock3xxx.c
··· 94 94 return ret; 95 95 } 96 96 97 - arch_initcall(omap3xxx_clk_arch_init); 97 + omap_arch_initcall(omap3xxx_clk_arch_init); 98 98 99 99
+3 -3
arch/arm/mach-omap2/devices.c
··· 68 68 69 69 return IS_ERR(pdev) ? PTR_ERR(pdev) : 0; 70 70 } 71 - postcore_initcall(omap3_l3_init); 71 + omap_postcore_initcall(omap3_l3_init); 72 72 73 73 static int __init omap4_l3_init(void) 74 74 { ··· 103 103 104 104 return IS_ERR(pdev) ? PTR_ERR(pdev) : 0; 105 105 } 106 - postcore_initcall(omap4_l3_init); 106 + omap_postcore_initcall(omap4_l3_init); 107 107 108 108 #if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE) 109 109 ··· 734 734 735 735 return 0; 736 736 } 737 - arch_initcall(omap2_init_devices); 737 + omap_arch_initcall(omap2_init_devices);
+20 -3
arch/arm/mach-omap2/dma.c
··· 27 27 #include <linux/module.h> 28 28 #include <linux/init.h> 29 29 #include <linux/device.h> 30 - 30 + #include <linux/dma-mapping.h> 31 31 #include <linux/omap-dma.h> 32 32 33 33 #include "soc.h" ··· 288 288 return 0; 289 289 } 290 290 291 + static const struct platform_device_info omap_dma_dev_info = { 292 + .name = "omap-dma-engine", 293 + .id = -1, 294 + .dma_mask = DMA_BIT_MASK(32), 295 + }; 296 + 291 297 static int __init omap2_system_dma_init(void) 292 298 { 293 - return omap_hwmod_for_each_by_class("dma", 299 + struct platform_device *pdev; 300 + int res; 301 + 302 + res = omap_hwmod_for_each_by_class("dma", 294 303 omap2_system_dma_init_dev, NULL); 304 + if (res) 305 + return res; 306 + 307 + pdev = platform_device_register_full(&omap_dma_dev_info); 308 + if (IS_ERR(pdev)) 309 + return PTR_ERR(pdev); 310 + 311 + return res; 295 312 } 296 - arch_initcall(omap2_system_dma_init); 313 + omap_arch_initcall(omap2_system_dma_init);
+1 -1
arch/arm/mach-omap2/drm.c
··· 62 62 63 63 } 64 64 65 - arch_initcall(omap_init_drm); 65 + omap_arch_initcall(omap_init_drm); 66 66 67 67 #endif
+1 -1
arch/arm/mach-omap2/emu.c
··· 47 47 return 0; 48 48 } 49 49 50 - subsys_initcall(emu_init); 50 + omap_subsys_initcall(emu_init);
+2 -2
arch/arm/mach-omap2/fb.c
··· 89 89 return 0; 90 90 } 91 91 92 - arch_initcall(omap_init_vrfb); 92 + omap_arch_initcall(omap_init_vrfb); 93 93 #endif 94 94 95 95 #if defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE) ··· 113 113 return platform_device_register(&omap_fb_device); 114 114 } 115 115 116 - arch_initcall(omap_init_fb); 116 + omap_arch_initcall(omap_init_fb); 117 117 118 118 #endif
+3 -2
arch/arm/mach-omap2/gpio.c
··· 23 23 #include <linux/of.h> 24 24 #include <linux/platform_data/gpio-omap.h> 25 25 26 + #include "soc.h" 26 27 #include "omap_hwmod.h" 27 28 #include "omap_device.h" 28 29 #include "omap-pm.h" ··· 148 147 /* 149 148 * gpio_init needs to be done before 150 149 * machine_init functions access gpio APIs. 151 - * Hence gpio_init is a postcore_initcall. 150 + * Hence gpio_init is a omap_postcore_initcall. 152 151 */ 153 152 static int __init omap2_gpio_init(void) 154 153 { ··· 158 157 159 158 return omap_hwmod_for_each_by_class("gpio", omap2_gpio_dev_init, NULL); 160 159 } 161 - postcore_initcall(omap2_gpio_init); 160 + omap_postcore_initcall(omap2_gpio_init);
+2 -2
arch/arm/mach-omap2/gpmc.c
··· 1205 1205 1206 1206 } 1207 1207 1208 - postcore_initcall(gpmc_init); 1208 + omap_postcore_initcall(gpmc_init); 1209 1209 module_exit(gpmc_exit); 1210 1210 1211 1211 static int __init omap_gpmc_init(void) ··· 1225 1225 1226 1226 return IS_ERR(pdev) ? PTR_ERR(pdev) : 0; 1227 1227 } 1228 - postcore_initcall(omap_gpmc_init); 1228 + omap_postcore_initcall(omap_gpmc_init); 1229 1229 1230 1230 static irqreturn_t gpmc_handle_irq(int irq, void *dev) 1231 1231 {
+2 -1
arch/arm/mach-omap2/hdq1w.c
··· 27 27 #include <linux/err.h> 28 28 #include <linux/platform_device.h> 29 29 30 + #include "soc.h" 30 31 #include "omap_hwmod.h" 31 32 #include "omap_device.h" 32 33 #include "hdq1w.h" ··· 94 93 95 94 return 0; 96 95 } 97 - arch_initcall(omap_init_hdq); 96 + omap_arch_initcall(omap_init_hdq);
+1 -1
arch/arm/mach-omap2/hwspinlock.c
··· 57 57 return retval; 58 58 } 59 59 /* early board code might need to reserve specific hwspinlock instances */ 60 - postcore_initcall(hwspinlocks_init); 60 + omap_postcore_initcall(hwspinlocks_init);
+5
arch/arm/mach-omap2/i2c.c
··· 185 185 return PTR_RET(pdev); 186 186 } 187 187 188 + static int __init omap_i2c_cmdline(void) 189 + { 190 + return omap_register_i2c_bus_cmdline(); 191 + } 192 + omap_subsys_initcall(omap_i2c_cmdline);
+81 -56
arch/arm/mach-omap2/include/mach/debug-macro.S arch/arm/include/debug/omap2plus.S
··· 1 - /* arch/arm/mach-omap2/include/mach/debug-macro.S 2 - * 1 + /* 3 2 * Debugging macro include header 4 3 * 5 4 * Copyright (C) 1994-1999 Russell King ··· 12 13 13 14 #include <linux/serial_reg.h> 14 15 15 - #include <mach/serial.h> 16 + /* OMAP2 serial ports */ 17 + #define OMAP2_UART1_BASE 0x4806a000 18 + #define OMAP2_UART2_BASE 0x4806c000 19 + #define OMAP2_UART3_BASE 0x4806e000 20 + 21 + /* OMAP3 serial ports */ 22 + #define OMAP3_UART1_BASE OMAP2_UART1_BASE 23 + #define OMAP3_UART2_BASE OMAP2_UART2_BASE 24 + #define OMAP3_UART3_BASE 0x49020000 25 + #define OMAP3_UART4_BASE 0x49042000 /* Only on 36xx */ 26 + #define OMAP3_UART4_AM35XX_BASE 0x4809E000 /* Only on AM35xx */ 27 + 28 + /* OMAP4 serial ports */ 29 + #define OMAP4_UART1_BASE OMAP2_UART1_BASE 30 + #define OMAP4_UART2_BASE OMAP2_UART2_BASE 31 + #define OMAP4_UART3_BASE 0x48020000 32 + #define OMAP4_UART4_BASE 0x4806e000 33 + 34 + /* TI81XX serial ports */ 35 + #define TI81XX_UART1_BASE 0x48020000 36 + #define TI81XX_UART2_BASE 0x48022000 37 + #define TI81XX_UART3_BASE 0x48024000 38 + 39 + /* AM3505/3517 UART4 */ 40 + #define AM35XX_UART4_BASE 0x4809E000 /* Only on AM3505/3517 */ 41 + 42 + /* AM33XX serial port */ 43 + #define AM33XX_UART1_BASE 0x44E09000 44 + 45 + /* OMAP5 serial ports */ 46 + #define OMAP5_UART1_BASE OMAP2_UART1_BASE 47 + #define OMAP5_UART2_BASE OMAP2_UART2_BASE 48 + #define OMAP5_UART3_BASE OMAP4_UART3_BASE 49 + #define OMAP5_UART4_BASE OMAP4_UART4_BASE 50 + #define OMAP5_UART5_BASE 0x48066000 51 + #define OMAP5_UART6_BASE 0x48068000 52 + 53 + /* External port on Zoom2/3 */ 54 + #define ZOOM_UART_BASE 0x10000000 55 + #define ZOOM_UART_VIRT 0xfa400000 56 + 57 + #define OMAP_PORT_SHIFT 2 58 + #define ZOOM_PORT_SHIFT 1 16 59 17 60 #define UART_OFFSET(addr) ((addr) & 0x00ffffff) 18 61 ··· 64 23 omap_uart_lsr: .word 0 65 24 .popsection 66 25 67 - /* 68 - * Note that this code won't work if the bootloader passes 69 - * a wrong machine ID number in r1. To debug, just hardcode 70 - * the desired UART phys and virt addresses temporarily into 71 - * the omap_uart_phys and omap_uart_virt above. 72 - */ 73 26 .macro addruart, rp, rv, tmp 74 27 75 28 /* Use omap_uart_phys/virt if already configured */ ··· 78 43 cmpne \rv, #0 79 44 bne 100f @ already configured 80 45 81 - /* Check the debug UART configuration set in uncompress.h */ 82 - mov \rp, pc 83 - ldr \rv, =OMAP_UART_INFO_OFS 84 - and \rp, \rp, #0xff000000 85 - ldr \rp, [\rp, \rv] 86 - 87 - /* Select the UART to use based on the UART1 scratchpad value */ 88 - cmp \rp, #0 @ no port configured? 89 - beq 21f @ if none, try to use UART1 90 - cmp \rp, #OMAP2UART1 @ OMAP2/3/4UART1 91 - beq 21f @ configure OMAP2/3/4UART1 92 - cmp \rp, #OMAP2UART2 @ OMAP2/3/4UART2 93 - beq 22f @ configure OMAP2/3/4UART2 94 - cmp \rp, #OMAP2UART3 @ only on 24xx 95 - beq 23f @ configure OMAP2UART3 96 - cmp \rp, #OMAP3UART3 @ only on 34xx 97 - beq 33f @ configure OMAP3UART3 98 - cmp \rp, #OMAP4UART3 @ only on 44xx/54xx 99 - beq 43f @ configure OMAP4/5UART3 100 - cmp \rp, #OMAP3UART4 @ only on 36xx 101 - beq 34f @ configure OMAP3UART4 102 - cmp \rp, #OMAP4UART4 @ only on 44xx/54xx 103 - beq 44f @ configure OMAP4/5UART4 104 - cmp \rp, #TI81XXUART1 @ ti81Xx UART offsets different 105 - beq 81f @ configure UART1 106 - cmp \rp, #TI81XXUART2 @ ti81Xx UART offsets different 107 - beq 82f @ configure UART2 108 - cmp \rp, #TI81XXUART3 @ ti81Xx UART offsets different 109 - beq 83f @ configure UART3 110 - cmp \rp, #AM33XXUART1 @ AM33XX UART offsets different 111 - beq 84f @ configure UART1 112 - cmp \rp, #ZOOM_UART @ only on zoom2/3 113 - beq 95f @ configure ZOOM_UART 114 - 115 46 /* Configure the UART offset from the phys/virt base */ 116 - 21: mov \rp, #UART_OFFSET(OMAP2_UART1_BASE) @ omap2/3/4 47 + #ifdef CONFIG_DEBUG_OMAP2UART1 48 + mov \rp, #UART_OFFSET(OMAP2_UART1_BASE) @ omap2/3/4 117 49 b 98f 118 - 22: mov \rp, #UART_OFFSET(OMAP2_UART2_BASE) @ omap2/3/4 50 + #endif 51 + #ifdef CONFIG_DEBUG_OMAP2UART2 52 + mov \rp, #UART_OFFSET(OMAP2_UART2_BASE) @ omap2/3/4 119 53 b 98f 120 - 23: mov \rp, #UART_OFFSET(OMAP2_UART3_BASE) 54 + #endif 55 + #ifdef CONFIG_DEBUG_OMAP2UART3 56 + mov \rp, #UART_OFFSET(OMAP2_UART3_BASE) 121 57 b 98f 122 - 33: mov \rp, #UART_OFFSET(OMAP3_UART1_BASE) 58 + #endif 59 + #ifdef CONFIG_DEBUG_OMAP3UART3 60 + mov \rp, #UART_OFFSET(OMAP3_UART1_BASE) 123 61 add \rp, \rp, #0x00fb0000 124 62 add \rp, \rp, #0x00006000 @ OMAP3_UART3_BASE 125 63 b 98f 126 - 34: mov \rp, #UART_OFFSET(OMAP3_UART1_BASE) 64 + #endif 65 + #ifdef CONFIG_DEBUG_OMAP4UART3 66 + mov \rp, #UART_OFFSET(OMAP4_UART3_BASE) 67 + b 98f 68 + #endif 69 + #ifdef CONFIG_DEBUG_OMAP3UART4 70 + mov \rp, #UART_OFFSET(OMAP3_UART1_BASE) 127 71 add \rp, \rp, #0x00fb0000 128 72 add \rp, \rp, #0x00028000 @ OMAP3_UART4_BASE 129 73 b 98f 130 - 43: mov \rp, #UART_OFFSET(OMAP4_UART3_BASE) 74 + #endif 75 + #ifdef CONFIG_DEBUG_OMAP4UART4 76 + mov \rp, #UART_OFFSET(OMAP4_UART4_BASE) 131 77 b 98f 132 - 44: mov \rp, #UART_OFFSET(OMAP4_UART4_BASE) 78 + #endif 79 + #ifdef CONFIG_DEBUG_TI81XXUART1 80 + mov \rp, #UART_OFFSET(TI81XX_UART1_BASE) 133 81 b 98f 134 - 81: mov \rp, #UART_OFFSET(TI81XX_UART1_BASE) 82 + #endif 83 + #ifdef CONFIG_DEBUG_TI81XXUART2 84 + mov \rp, #UART_OFFSET(TI81XX_UART2_BASE) 135 85 b 98f 136 - 82: mov \rp, #UART_OFFSET(TI81XX_UART2_BASE) 86 + #endif 87 + #ifdef CONFIG_DEBUG_TI81XXUART3 88 + mov \rp, #UART_OFFSET(TI81XX_UART3_BASE) 137 89 b 98f 138 - 83: mov \rp, #UART_OFFSET(TI81XX_UART3_BASE) 139 - b 98f 140 - 84: ldr \rp, =AM33XX_UART1_BASE 90 + #endif 91 + #ifdef CONFIG_DEBUG_AM33XXUART1 92 + ldr \rp, =AM33XX_UART1_BASE 141 93 and \rp, \rp, #0x00ffffff 142 94 b 97f 143 - 95: ldr \rp, =ZOOM_UART_BASE 95 + #endif 96 + #ifdef CONFIG_DEBUG_ZOOM_UART 97 + ldr \rp, =ZOOM_UART_BASE 144 98 str \rp, [\tmp, #0] @ omap_uart_phys 145 99 ldr \rp, =ZOOM_UART_VIRT 146 100 str \rp, [\tmp, #4] @ omap_uart_virt 147 101 mov \rp, #(UART_LSR << ZOOM_PORT_SHIFT) 148 102 str \rp, [\tmp, #8] @ omap_uart_lsr 103 + #endif 149 104 b 10b 150 105 151 106 /* AM33XX: Store both phys and virt address for the uart */
-37
arch/arm/mach-omap2/include/mach/serial.h
··· 8 8 * GNU General Public License for more details. 9 9 */ 10 10 11 - /* 12 - * Memory entry used for the DEBUG_LL UART configuration, relative to 13 - * start of RAM. See also uncompress.h and debug-macro.S. 14 - * 15 - * Note that using a memory location for storing the UART configuration 16 - * has at least two limitations: 17 - * 18 - * 1. Kernel uncompress code cannot overlap OMAP_UART_INFO as the 19 - * uncompress code could then partially overwrite itself 20 - * 2. We assume printascii is called at least once before paging_init, 21 - * and addruart has a chance to read OMAP_UART_INFO 22 - */ 23 - #define OMAP_UART_INFO_OFS 0x3ffc 24 - 25 11 /* OMAP2 serial ports */ 26 12 #define OMAP2_UART1_BASE 0x4806a000 27 13 #define OMAP2_UART2_BASE 0x4806c000 ··· 53 67 #define ZOOM_PORT_SHIFT 1 54 68 55 69 #define OMAP24XX_BASE_BAUD (48000000/16) 56 - 57 - /* 58 - * DEBUG_LL port encoding stored into the UART1 scratchpad register by 59 - * decomp_setup in uncompress.h 60 - */ 61 - #define OMAP2UART1 21 62 - #define OMAP2UART2 22 63 - #define OMAP2UART3 23 64 - #define OMAP3UART1 OMAP2UART1 65 - #define OMAP3UART2 OMAP2UART2 66 - #define OMAP3UART3 33 67 - #define OMAP3UART4 34 /* Only on 36xx */ 68 - #define OMAP4UART1 OMAP2UART1 69 - #define OMAP4UART2 OMAP2UART2 70 - #define OMAP4UART3 43 71 - #define OMAP4UART4 44 72 - #define TI81XXUART1 81 73 - #define TI81XXUART2 82 74 - #define TI81XXUART3 83 75 - #define AM33XXUART1 84 76 - #define OMAP5UART3 OMAP4UART3 77 - #define OMAP5UART4 OMAP4UART4 78 - #define ZOOM_UART 95 /* Only on zoom2/3 */ 79 70 80 71 #ifndef __ASSEMBLER__ 81 72
-176
arch/arm/mach-omap2/include/mach/uncompress.h
··· 1 - /* 2 - * arch/arm/plat-omap/include/mach/uncompress.h 3 - * 4 - * Serial port stubs for kernel decompress status messages 5 - * 6 - * Initially based on: 7 - * linux-2.4.15-rmk1-dsplinux1.6/arch/arm/plat-omap/include/mach1510/uncompress.h 8 - * Copyright (C) 2000 RidgeRun, Inc. 9 - * Author: Greg Lonnon <glonnon@ridgerun.com> 10 - * 11 - * Rewritten by: 12 - * Author: <source@mvista.com> 13 - * 2004 (c) MontaVista Software, Inc. 14 - * 15 - * This file is licensed under the terms of the GNU General Public License 16 - * version 2. This program is licensed "as is" without any warranty of any 17 - * kind, whether express or implied. 18 - */ 19 - 20 - #include <linux/types.h> 21 - #include <linux/serial_reg.h> 22 - 23 - #include <asm/memory.h> 24 - #include <asm/mach-types.h> 25 - 26 - #include <mach/serial.h> 27 - 28 - #define MDR1_MODE_MASK 0x07 29 - 30 - volatile u8 *uart_base; 31 - int uart_shift; 32 - 33 - /* 34 - * Store the DEBUG_LL uart number into memory. 35 - * See also debug-macro.S, and serial.c for related code. 36 - */ 37 - static void set_omap_uart_info(unsigned char port) 38 - { 39 - /* 40 - * Get address of some.bss variable and round it down 41 - * a la CONFIG_AUTO_ZRELADDR. 42 - */ 43 - u32 ram_start = (u32)&uart_shift & 0xf8000000; 44 - u32 *uart_info = (u32 *)(ram_start + OMAP_UART_INFO_OFS); 45 - *uart_info = port; 46 - } 47 - 48 - static void putc(int c) 49 - { 50 - if (!uart_base) 51 - return; 52 - 53 - /* Check for UART 16x mode */ 54 - if ((uart_base[UART_OMAP_MDR1 << uart_shift] & MDR1_MODE_MASK) != 0) 55 - return; 56 - 57 - while (!(uart_base[UART_LSR << uart_shift] & UART_LSR_THRE)) 58 - barrier(); 59 - uart_base[UART_TX << uart_shift] = c; 60 - } 61 - 62 - static inline void flush(void) 63 - { 64 - } 65 - 66 - /* 67 - * Macros to configure UART1 and debug UART 68 - */ 69 - #define _DEBUG_LL_ENTRY(mach, dbg_uart, dbg_shft, dbg_id) \ 70 - if (machine_is_##mach()) { \ 71 - uart_base = (volatile u8 *)(dbg_uart); \ 72 - uart_shift = (dbg_shft); \ 73 - port = (dbg_id); \ 74 - set_omap_uart_info(port); \ 75 - break; \ 76 - } 77 - 78 - #define DEBUG_LL_OMAP2(p, mach) \ 79 - _DEBUG_LL_ENTRY(mach, OMAP2_UART##p##_BASE, OMAP_PORT_SHIFT, \ 80 - OMAP2UART##p) 81 - 82 - #define DEBUG_LL_OMAP3(p, mach) \ 83 - _DEBUG_LL_ENTRY(mach, OMAP3_UART##p##_BASE, OMAP_PORT_SHIFT, \ 84 - OMAP3UART##p) 85 - 86 - #define DEBUG_LL_OMAP4(p, mach) \ 87 - _DEBUG_LL_ENTRY(mach, OMAP4_UART##p##_BASE, OMAP_PORT_SHIFT, \ 88 - OMAP4UART##p) 89 - 90 - #define DEBUG_LL_OMAP5(p, mach) \ 91 - _DEBUG_LL_ENTRY(mach, OMAP5_UART##p##_BASE, OMAP_PORT_SHIFT, \ 92 - OMAP5UART##p) 93 - /* Zoom2/3 shift is different for UART1 and external port */ 94 - #define DEBUG_LL_ZOOM(mach) \ 95 - _DEBUG_LL_ENTRY(mach, ZOOM_UART_BASE, ZOOM_PORT_SHIFT, ZOOM_UART) 96 - 97 - #define DEBUG_LL_TI81XX(p, mach) \ 98 - _DEBUG_LL_ENTRY(mach, TI81XX_UART##p##_BASE, OMAP_PORT_SHIFT, \ 99 - TI81XXUART##p) 100 - 101 - #define DEBUG_LL_AM33XX(p, mach) \ 102 - _DEBUG_LL_ENTRY(mach, AM33XX_UART##p##_BASE, OMAP_PORT_SHIFT, \ 103 - AM33XXUART##p) 104 - 105 - static inline void arch_decomp_setup(void) 106 - { 107 - int port = 0; 108 - 109 - /* 110 - * Initialize the port based on the machine ID from the bootloader. 111 - * Note that we're using macros here instead of switch statement 112 - * as machine_is functions are optimized out for the boards that 113 - * are not selected. 114 - */ 115 - do { 116 - /* omap2 based boards using UART1 */ 117 - DEBUG_LL_OMAP2(1, omap_2430sdp); 118 - DEBUG_LL_OMAP2(1, omap_apollon); 119 - DEBUG_LL_OMAP2(1, omap_h4); 120 - 121 - /* omap2 based boards using UART3 */ 122 - DEBUG_LL_OMAP2(3, nokia_n800); 123 - DEBUG_LL_OMAP2(3, nokia_n810); 124 - DEBUG_LL_OMAP2(3, nokia_n810_wimax); 125 - 126 - /* omap3 based boards using UART1 */ 127 - DEBUG_LL_OMAP2(1, omap3evm); 128 - DEBUG_LL_OMAP3(1, omap_3430sdp); 129 - DEBUG_LL_OMAP3(1, omap_3630sdp); 130 - DEBUG_LL_OMAP3(1, omap3530_lv_som); 131 - DEBUG_LL_OMAP3(1, omap3_torpedo); 132 - 133 - /* omap3 based boards using UART3 */ 134 - DEBUG_LL_OMAP3(3, cm_t35); 135 - DEBUG_LL_OMAP3(3, cm_t3517); 136 - DEBUG_LL_OMAP3(3, cm_t3730); 137 - DEBUG_LL_OMAP3(3, craneboard); 138 - DEBUG_LL_OMAP3(3, devkit8000); 139 - DEBUG_LL_OMAP3(3, igep0020); 140 - DEBUG_LL_OMAP3(3, igep0030); 141 - DEBUG_LL_OMAP3(3, nokia_rm680); 142 - DEBUG_LL_OMAP3(3, nokia_rm696); 143 - DEBUG_LL_OMAP3(3, nokia_rx51); 144 - DEBUG_LL_OMAP3(3, omap3517evm); 145 - DEBUG_LL_OMAP3(3, omap3_beagle); 146 - DEBUG_LL_OMAP3(3, omap3_pandora); 147 - DEBUG_LL_OMAP3(3, omap_ldp); 148 - DEBUG_LL_OMAP3(3, overo); 149 - DEBUG_LL_OMAP3(3, touchbook); 150 - 151 - /* omap4 based boards using UART3 */ 152 - DEBUG_LL_OMAP4(3, omap_4430sdp); 153 - DEBUG_LL_OMAP4(3, omap4_panda); 154 - 155 - /* omap5 based boards using UART3 */ 156 - DEBUG_LL_OMAP5(3, omap5_sevm); 157 - 158 - /* zoom2/3 external uart */ 159 - DEBUG_LL_ZOOM(omap_zoom2); 160 - DEBUG_LL_ZOOM(omap_zoom3); 161 - 162 - /* TI8168 base boards using UART3 */ 163 - DEBUG_LL_TI81XX(3, ti8168evm); 164 - 165 - /* TI8148 base boards using UART1 */ 166 - DEBUG_LL_TI81XX(1, ti8148evm); 167 - 168 - /* AM33XX base boards using UART1 */ 169 - DEBUG_LL_AM33XX(1, am335xevm); 170 - } while (0); 171 - } 172 - 173 - /* 174 - * nothing to do 175 - */ 176 - #define arch_decomp_wdog()
+2 -1
arch/arm/mach-omap2/mcbsp.c
··· 23 23 24 24 #include <linux/omap-dma.h> 25 25 26 + #include "soc.h" 26 27 #include "omap_device.h" 27 28 28 29 /* ··· 119 118 120 119 return 0; 121 120 } 122 - arch_initcall(omap2_mcbsp_init); 121 + omap_arch_initcall(omap2_mcbsp_init);
+1 -1
arch/arm/mach-omap2/omap-iommu.c
··· 61 61 return omap_hwmod_for_each_by_class("mmu", omap_iommu_dev_init, NULL); 62 62 } 63 63 /* must be ready before omap3isp is probed */ 64 - subsys_initcall(omap_iommu_init); 64 + omap_subsys_initcall(omap_iommu_init); 65 65 66 66 static void __exit omap_iommu_exit(void) 67 67 {
+2 -1
arch/arm/mach-omap2/omap2-restart.c
··· 13 13 #include <linux/clk.h> 14 14 #include <linux/io.h> 15 15 16 + #include "soc.h" 16 17 #include "common.h" 17 18 #include "prm2xxx.h" 18 19 ··· 63 62 64 63 return 0; 65 64 } 66 - core_initcall(omap2xxx_common_look_up_clks_for_reset); 65 + omap_core_initcall(omap2xxx_common_look_up_clks_for_reset);
+2 -2
arch/arm/mach-omap2/omap4-common.c
··· 225 225 226 226 return 0; 227 227 } 228 - early_initcall(omap_l2_cache_init); 228 + omap_early_initcall(omap_l2_cache_init); 229 229 #endif 230 230 231 231 void __iomem *omap4_get_sar_ram_base(void) ··· 253 253 254 254 return 0; 255 255 } 256 - early_initcall(omap4_sar_ram_init); 256 + omap_early_initcall(omap4_sar_ram_init); 257 257 258 258 static struct of_device_id irq_match[] __initdata = { 259 259 { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
+3 -2
arch/arm/mach-omap2/omap_device.c
··· 89 89 #include <linux/of.h> 90 90 #include <linux/notifier.h> 91 91 92 + #include "soc.h" 92 93 #include "omap_device.h" 93 94 #include "omap_hwmod.h" 94 95 ··· 1260 1259 bus_register_notifier(&platform_bus_type, &platform_nb); 1261 1260 return 0; 1262 1261 } 1263 - core_initcall(omap_device_init); 1262 + omap_core_initcall(omap_device_init); 1264 1263 1265 1264 /** 1266 1265 * omap_device_late_idle - idle devices without drivers ··· 1298 1297 bus_for_each_dev(&platform_bus_type, NULL, NULL, omap_device_late_idle); 1299 1298 return 0; 1300 1299 } 1301 - late_initcall(omap_device_late_init); 1300 + omap_late_initcall(omap_device_late_init);
+1 -1
arch/arm/mach-omap2/omap_hwmod.c
··· 3303 3303 3304 3304 return 0; 3305 3305 } 3306 - core_initcall(omap_hwmod_setup_all); 3306 + omap_core_initcall(omap_hwmod_setup_all); 3307 3307 3308 3308 /** 3309 3309 * omap_hwmod_enable - enable an omap_hwmod
+1 -1
arch/arm/mach-omap2/omap_phy_internal.c
··· 63 63 64 64 return 0; 65 65 } 66 - early_initcall(omap4430_phy_power_down); 66 + omap_early_initcall(omap4430_phy_power_down); 67 67 68 68 void am35x_musb_reset(void) 69 69 {
+1 -1
arch/arm/mach-omap2/opp3xxx_data.c
··· 168 168 169 169 return r; 170 170 } 171 - device_initcall(omap3_opp_init); 171 + omap_device_initcall(omap3_opp_init);
+1 -1
arch/arm/mach-omap2/opp4xxx_data.c
··· 177 177 ARRAY_SIZE(omap446x_opp_def_list)); 178 178 return r; 179 179 } 180 - device_initcall(omap4_opp_init); 180 + omap_device_initcall(omap4_opp_init);
+1 -1
arch/arm/mach-omap2/pm-debug.c
··· 279 279 280 280 return 0; 281 281 } 282 - arch_initcall(pm_dbg_init); 282 + omap_arch_initcall(pm_dbg_init); 283 283 284 284 #endif
+1 -1
arch/arm/mach-omap2/pm.c
··· 336 336 337 337 return 0; 338 338 } 339 - postcore_initcall(omap2_common_pm_init); 339 + omap_postcore_initcall(omap2_common_pm_init); 340 340 341 341 int __init omap2_common_pm_late_init(void) 342 342 {
+1 -1
arch/arm/mach-omap2/pmu.c
··· 89 89 90 90 return omap2_init_pmu(oh_num, oh_names); 91 91 } 92 - subsys_initcall(omap_init_pmu); 92 + omap_subsys_initcall(omap_init_pmu);
+1 -1
arch/arm/mach-omap2/prm3xxx.c
··· 427 427 428 428 return ret; 429 429 } 430 - subsys_initcall(omap3xxx_prm_late_init); 430 + omap_subsys_initcall(omap3xxx_prm_late_init); 431 431 432 432 static void __exit omap3xxx_prm_exit(void) 433 433 {
+1 -1
arch/arm/mach-omap2/prm44xx.c
··· 665 665 666 666 return omap_prcm_register_chain_handler(&omap4_prcm_irq_setup); 667 667 } 668 - subsys_initcall(omap44xx_prm_late_init); 668 + omap_subsys_initcall(omap44xx_prm_late_init); 669 669 670 670 static void __exit omap44xx_prm_exit(void) 671 671 {
+1 -1
arch/arm/mach-omap2/serial.c
··· 254 254 255 255 return 0; 256 256 } 257 - core_initcall(omap_serial_early_init); 257 + omap_core_initcall(omap_serial_early_init); 258 258 259 259 /** 260 260 * omap_serial_init_port() - initialize single serial port
+1 -1
arch/arm/mach-omap2/smartreflex-class3.c
··· 58 58 pr_info("SmartReflex Class3 initialized\n"); 59 59 return sr_register_class(&class3_data); 60 60 } 61 - late_initcall(sr_class3_init); 61 + omap_late_initcall(sr_class3_init);
+29
arch/arm/mach-omap2/soc.h
··· 42 42 #undef MULTI_OMAP2 43 43 #undef OMAP_NAME 44 44 45 + #ifdef CONFIG_ARCH_MULTIPLATFORM 46 + #define MULTI_OMAP2 47 + #endif 45 48 #ifdef CONFIG_SOC_OMAP2420 46 49 # ifdef OMAP_NAME 47 50 # undef MULTI_OMAP2 ··· 114 111 * CPU class bits (15xx, 16xx, 24xx, 34xx...) [07:00] 115 112 */ 116 113 unsigned int omap_rev(void); 114 + 115 + static inline int soc_is_omap(void) 116 + { 117 + return omap_rev() != 0; 118 + } 117 119 118 120 /* 119 121 * Get the CPU revision for OMAP devices ··· 472 464 } \ 473 465 474 466 OMAP4_HAS_FEATURE(perf_silicon, PERF_SILICON) 467 + 468 + /* 469 + * We need to make sure omap initcalls don't run when 470 + * multiplatform kernels are booted on other SoCs. 471 + */ 472 + #define omap_initcall(level, fn) \ 473 + static int __init __used __##fn(void) \ 474 + { \ 475 + if (!soc_is_omap()) \ 476 + return 0; \ 477 + return fn(); \ 478 + } \ 479 + level(__##fn); 480 + 481 + #define omap_early_initcall(fn) omap_initcall(early_initcall, fn) 482 + #define omap_core_initcall(fn) omap_initcall(core_initcall, fn) 483 + #define omap_postcore_initcall(fn) omap_initcall(postcore_initcall, fn) 484 + #define omap_arch_initcall(fn) omap_initcall(arch_initcall, fn) 485 + #define omap_subsys_initcall(fn) omap_initcall(subsys_initcall, fn) 486 + #define omap_device_initcall(fn) omap_initcall(device_initcall, fn) 487 + #define omap_late_initcall(fn) omap_initcall(late_initcall, fn) 475 488 476 489 #endif /* __ASSEMBLY__ */ 477 490
+1 -1
arch/arm/mach-omap2/timer.c
··· 742 742 743 743 return 0; 744 744 } 745 - arch_initcall(omap2_dm_timer_init); 745 + omap_arch_initcall(omap2_dm_timer_init); 746 746 747 747 /** 748 748 * omap2_override_clocksource - clocksource override with user configuration
+1 -1
arch/arm/mach-omap2/wd_timer.c
··· 130 130 dev_name, oh->name); 131 131 return 0; 132 132 } 133 - subsys_initcall(omap_init_wdt); 133 + omap_subsys_initcall(omap_init_wdt);
+1 -31
arch/arm/plat-omap/Kconfig
··· 5 5 config ARCH_OMAP_OTG 6 6 bool 7 7 8 - choice 9 - prompt "OMAP System Type" 10 - default ARCH_OMAP2PLUS 11 - 12 - config ARCH_OMAP1 13 - bool "TI OMAP1" 14 - select CLKDEV_LOOKUP 15 - select CLKSRC_MMIO 16 - select GENERIC_IRQ_CHIP 17 - select HAVE_IDE 18 - select IRQ_DOMAIN 19 - select NEED_MACH_IO_H if PCCARD 20 - select NEED_MACH_MEMORY_H 21 - help 22 - "Systems based on omap7xx, omap15xx or omap16xx" 23 - 24 - config ARCH_OMAP2PLUS 25 - bool "TI OMAP2/3/4" 26 - select CLKDEV_LOOKUP 27 - select GENERIC_IRQ_CHIP 28 - select OMAP_DM_TIMER 29 - select PINCTRL 30 - select PROC_DEVICETREE if PROC_FS 31 - select SPARSE_IRQ 32 - select USE_OF 33 - help 34 - "Systems based on OMAP2, OMAP3, OMAP4 or OMAP5" 35 - 36 - endchoice 37 - 38 8 comment "OMAP Feature Selections" 39 9 40 10 config OMAP_DEBUG_DEVICES ··· 88 118 89 119 config OMAP_MBOX_FWK 90 120 tristate "Mailbox framework support" 91 - depends on ARCH_OMAP 121 + depends on ARCH_OMAP && !ARCH_MULTIPLATFORM 92 122 help 93 123 Say Y here if you want to use OMAP Mailbox framework support for 94 124 DSP, IVA1.0 and IVA2 in OMAP1/2/3.
+2
arch/arm/plat-omap/Makefile
··· 2 2 # Makefile for the linux kernel. 3 3 # 4 4 5 + ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/arch/arm/plat-omap/include 6 + 5 7 # Common support 6 8 obj-y := sram.o dma.o counter_32k.o 7 9 obj-m :=
+1 -2
arch/arm/plat-omap/i2c.c
··· 68 68 * Register busses defined in command line but that are not registered with 69 69 * omap_register_i2c_bus from board initialization code. 70 70 */ 71 - static int __init omap_register_i2c_bus_cmdline(void) 71 + int __init omap_register_i2c_bus_cmdline(void) 72 72 { 73 73 int i, err = 0; 74 74 ··· 83 83 out: 84 84 return err; 85 85 } 86 - subsys_initcall(omap_register_i2c_bus_cmdline); 87 86 88 87 /** 89 88 * omap_register_i2c_bus - register I2C bus with device descriptors
+6
arch/arm/plat-omap/include/plat/i2c.h
··· 32 32 extern int omap_register_i2c_bus(int bus_id, u32 clkrate, 33 33 struct i2c_board_info const *info, 34 34 unsigned len); 35 + extern int omap_register_i2c_bus_cmdline(void); 35 36 #else 36 37 static inline int omap_register_i2c_bus(int bus_id, u32 clkrate, 37 38 struct i2c_board_info const *info, 38 39 unsigned len) 40 + { 41 + return 0; 42 + } 43 + 44 + static inline int omap_register_i2c_bus_cmdline(void) 39 45 { 40 46 return 0; 41 47 }
+3
drivers/crypto/omap-sham.c
··· 38 38 #include <crypto/internal/hash.h> 39 39 40 40 #include <linux/omap-dma.h> 41 + 42 + #ifdef CONFIG_ARCH_OMAP1 41 43 #include <mach/irqs.h> 44 + #endif 42 45 43 46 #define SHA_REG_DIGEST(x) (0x00 + ((x) * 0x04)) 44 47 #define SHA_REG_DIN(x) (0x1C + ((x) * 0x04))
+1 -19
drivers/dma/omap-dma.c
··· 661 661 } 662 662 EXPORT_SYMBOL_GPL(omap_dma_filter_fn); 663 663 664 - static struct platform_device *pdev; 665 - 666 - static const struct platform_device_info omap_dma_dev_info = { 667 - .name = "omap-dma-engine", 668 - .id = -1, 669 - .dma_mask = DMA_BIT_MASK(32), 670 - }; 671 - 672 664 static int omap_dma_init(void) 673 665 { 674 - int rc = platform_driver_register(&omap_dma_driver); 675 - 676 - if (rc == 0) { 677 - pdev = platform_device_register_full(&omap_dma_dev_info); 678 - if (IS_ERR(pdev)) { 679 - platform_driver_unregister(&omap_dma_driver); 680 - rc = PTR_ERR(pdev); 681 - } 682 - } 683 - return rc; 666 + return platform_driver_register(&omap_dma_driver); 684 667 } 685 668 subsys_initcall(omap_dma_init); 686 669 687 670 static void __exit omap_dma_exit(void) 688 671 { 689 - platform_device_unregister(pdev); 690 672 platform_driver_unregister(&omap_dma_driver); 691 673 } 692 674 module_exit(omap_dma_exit);
+1 -1
drivers/media/rc/Kconfig
··· 291 291 292 292 config IR_RX51 293 293 tristate "Nokia N900 IR transmitter diode" 294 - depends on OMAP_DM_TIMER && LIRC 294 + depends on OMAP_DM_TIMER && LIRC && !ARCH_MULTIPLATFORM 295 295 ---help--- 296 296 Say Y or M here if you want to enable support for the IR 297 297 transmitter diode built in the Nokia N900 (RX51) device.
+1 -1
drivers/staging/tidspbridge/Kconfig
··· 4 4 5 5 menuconfig TIDSPBRIDGE 6 6 tristate "DSP Bridge driver" 7 - depends on ARCH_OMAP3 7 + depends on ARCH_OMAP3 && !ARCH_MULTIPLATFORM 8 8 select OMAP_MBOX_FWK 9 9 help 10 10 DSP/BIOS Bridge is designed for platforms that contain a GPP and