drm/i915: Fix a mismerge of the IGD patch (new .find_pll hooks missed)

Signed-off-by: Shaohua Li <shaohua.li@intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>

authored by Shaohua Li and committed by Eric Anholt 6115707b 6911a9b8

+2
+2
drivers/gpu/drm/i915/intel_display.c
··· 367 367 .p1 = { .min = I9XX_P1_MIN, .max = I9XX_P1_MAX }, 368 368 .p2 = { .dot_limit = I9XX_P2_SDVO_DAC_SLOW_LIMIT, 369 369 .p2_slow = I9XX_P2_SDVO_DAC_SLOW, .p2_fast = I9XX_P2_SDVO_DAC_FAST }, 370 + .find_pll = intel_find_best_PLL, 370 371 }, 371 372 { /* INTEL_LIMIT_IGD_LVDS */ 372 373 .dot = { .min = I9XX_DOT_MIN, .max = I9XX_DOT_MAX }, ··· 381 380 /* IGD only supports single-channel mode. */ 382 381 .p2 = { .dot_limit = I9XX_P2_LVDS_SLOW_LIMIT, 383 382 .p2_slow = I9XX_P2_LVDS_SLOW, .p2_fast = I9XX_P2_LVDS_SLOW }, 383 + .find_pll = intel_find_best_PLL, 384 384 }, 385 385 386 386 };