MIPS: asm: asm-eva: Introduce kernel load/store variants

Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git

kernel os linux

Introduce new macros for kernel load/store variants which will be
used to perform regular kernel space load/store operations in EVA
mode.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: <stable@vger.kernel.org> # v3.15+
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9500/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

authored by

Markos Chandras and committed by

Ralf Baechle 11 years ago 60cd7e08 872cd4c2

+93 -44

1 changed file

expand all

arch

mips

include

asm

asm-eva.h

+93 -44

arch/mips/include/asm/asm-eva.h

··· 11 11 #define __ASM_ASM_EVA_H 12 12 13 13 #ifndef __ASSEMBLY__ 14 + 15 + /* Kernel variants */ 16 + 17 + #define kernel_cache(op, base) "cache " op ", " base "\n" 18 + #define kernel_ll(reg, addr) "ll " reg ", " addr "\n" 19 + #define kernel_sc(reg, addr) "sc " reg ", " addr "\n" 20 + #define kernel_lw(reg, addr) "lw " reg ", " addr "\n" 21 + #define kernel_lwl(reg, addr) "lwl " reg ", " addr "\n" 22 + #define kernel_lwr(reg, addr) "lwr " reg ", " addr "\n" 23 + #define kernel_lh(reg, addr) "lh " reg ", " addr "\n" 24 + #define kernel_lb(reg, addr) "lb " reg ", " addr "\n" 25 + #define kernel_lbu(reg, addr) "lbu " reg ", " addr "\n" 26 + #define kernel_sw(reg, addr) "sw " reg ", " addr "\n" 27 + #define kernel_swl(reg, addr) "swl " reg ", " addr "\n" 28 + #define kernel_swr(reg, addr) "swr " reg ", " addr "\n" 29 + #define kernel_sh(reg, addr) "sh " reg ", " addr "\n" 30 + #define kernel_sb(reg, addr) "sb " reg ", " addr "\n" 31 + 32 + #ifdef CONFIG_32BIT 33 + /* 34 + * No 'sd' or 'ld' instructions in 32-bit but the code will 35 + * do the correct thing 36 + */ 37 + #define kernel_sd(reg, addr) user_sw(reg, addr) 38 + #define kernel_ld(reg, addr) user_lw(reg, addr) 39 + #else 40 + #define kernel_sd(reg, addr) "sd " reg", " addr "\n" 41 + #define kernel_ld(reg, addr) "ld " reg", " addr "\n" 42 + #endif /* CONFIG_32BIT */ 43 + 14 44 #ifdef CONFIG_EVA 15 45 16 46 #define __BUILD_EVA_INSN(insn, reg, addr) \ ··· 71 41 72 42 #else 73 43 74 - #define user_cache(op, base) "cache " op ", " base "\n" 75 - #define user_ll(reg, addr) "ll " reg ", " addr "\n" 76 - #define user_sc(reg, addr) "sc " reg ", " addr "\n" 77 - #define user_lw(reg, addr) "lw " reg ", " addr "\n" 78 - #define user_lwl(reg, addr) "lwl " reg ", " addr "\n" 79 - #define user_lwr(reg, addr) "lwr " reg ", " addr "\n" 80 - #define user_lh(reg, addr) "lh " reg ", " addr "\n" 81 - #define user_lb(reg, addr) "lb " reg ", " addr "\n" 82 - #define user_lbu(reg, addr) "lbu " reg ", " addr "\n" 83 - #define user_sw(reg, addr) "sw " reg ", " addr "\n" 84 - #define user_swl(reg, addr) "swl " reg ", " addr "\n" 85 - #define user_swr(reg, addr) "swr " reg ", " addr "\n" 86 - #define user_sh(reg, addr) "sh " reg ", " addr "\n" 87 - #define user_sb(reg, addr) "sb " reg ", " addr "\n" 44 + #define user_cache(op, base) kernel_cache(op, base) 45 + #define user_ll(reg, addr) kernel_ll(reg, addr) 46 + #define user_sc(reg, addr) kernel_sc(reg, addr) 47 + #define user_lw(reg, addr) kernel_lw(reg, addr) 48 + #define user_lwl(reg, addr) kernel_lwl(reg, addr) 49 + #define user_lwr(reg, addr) kernel_lwr(reg, addr) 50 + #define user_lh(reg, addr) kernel_lh(reg, addr) 51 + #define user_lb(reg, addr) kernel_lb(reg, addr) 52 + #define user_lbu(reg, addr) kernel_lbu(reg, addr) 53 + #define user_sw(reg, addr) kernel_sw(reg, addr) 54 + #define user_swl(reg, addr) kernel_swl(reg, addr) 55 + #define user_swr(reg, addr) kernel_swr(reg, addr) 56 + #define user_sh(reg, addr) kernel_sh(reg, addr) 57 + #define user_sb(reg, addr) kernel_sb(reg, addr) 58 + 59 + #ifdef CONFIG_32BIT 60 + #define user_sd(reg, addr) kernel_sw(reg, addr) 61 + #define user_ld(reg, addr) kernel_lw(reg, addr) 62 + #else 63 + #define user_sd(reg, addr) kernel_sd(reg, addr) 64 + #define user_ld(reg, addr) kernel_ld(reg, addr) 65 + #endif /* CONFIG_32BIT */ 66 + 67 + #endif /* CONFIG_EVA */ 68 + 69 + #else /* __ASSEMBLY__ */ 70 + 71 + #define kernel_cache(op, base) cache op, base 72 + #define kernel_ll(reg, addr) ll reg, addr 73 + #define kernel_sc(reg, addr) sc reg, addr 74 + #define kernel_lw(reg, addr) lw reg, addr 75 + #define kernel_lwl(reg, addr) lwl reg, addr 76 + #define kernel_lwr(reg, addr) lwr reg, addr 77 + #define kernel_lh(reg, addr) lh reg, addr 78 + #define kernel_lb(reg, addr) lb reg, addr 79 + #define kernel_lbu(reg, addr) lbu reg, addr 80 + #define kernel_sw(reg, addr) sw reg, addr 81 + #define kernel_swl(reg, addr) swl reg, addr 82 + #define kernel_swr(reg, addr) swr reg, addr 83 + #define kernel_sh(reg, addr) sh reg, addr 84 + #define kernel_sb(reg, addr) sb reg, addr 88 85 89 86 #ifdef CONFIG_32BIT 90 87 /* 91 88 * No 'sd' or 'ld' instructions in 32-bit but the code will 92 89 * do the correct thing 93 90 */ 94 - #define user_sd(reg, addr) user_sw(reg, addr) 95 - #define user_ld(reg, addr) user_lw(reg, addr) 91 + #define kernel_sd(reg, addr) user_sw(reg, addr) 92 + #define kernel_ld(reg, addr) user_lw(reg, addr) 96 93 #else 97 - #define user_sd(reg, addr) "sd " reg", " addr "\n" 98 - #define user_ld(reg, addr) "ld " reg", " addr "\n" 94 + #define kernel_sd(reg, addr) sd reg, addr 95 + #define kernel_ld(reg, addr) ld reg, addr 99 96 #endif /* CONFIG_32BIT */ 100 - 101 - #endif /* CONFIG_EVA */ 102 - 103 - #else /* __ASSEMBLY__ */ 104 97 105 98 #ifdef CONFIG_EVA 106 99 ··· 154 101 #define user_sd(reg, addr) user_sw(reg, addr) 155 102 #else 156 103 157 - #define user_cache(op, base) cache op, base 158 - #define user_ll(reg, addr) ll reg, addr 159 - #define user_sc(reg, addr) sc reg, addr 160 - #define user_lw(reg, addr) lw reg, addr 161 - #define user_lwl(reg, addr) lwl reg, addr 162 - #define user_lwr(reg, addr) lwr reg, addr 163 - #define user_lh(reg, addr) lh reg, addr 164 - #define user_lb(reg, addr) lb reg, addr 165 - #define user_lbu(reg, addr) lbu reg, addr 166 - #define user_sw(reg, addr) sw reg, addr 167 - #define user_swl(reg, addr) swl reg, addr 168 - #define user_swr(reg, addr) swr reg, addr 169 - #define user_sh(reg, addr) sh reg, addr 170 - #define user_sb(reg, addr) sb reg, addr 104 + #define user_cache(op, base) kernel_cache(op, base) 105 + #define user_ll(reg, addr) kernel_ll(reg, addr) 106 + #define user_sc(reg, addr) kernel_sc(reg, addr) 107 + #define user_lw(reg, addr) kernel_lw(reg, addr) 108 + #define user_lwl(reg, addr) kernel_lwl(reg, addr) 109 + #define user_lwr(reg, addr) kernel_lwr(reg, addr) 110 + #define user_lh(reg, addr) kernel_lh(reg, addr) 111 + #define user_lb(reg, addr) kernel_lb(reg, addr) 112 + #define user_lbu(reg, addr) kernel_lbu(reg, addr) 113 + #define user_sw(reg, addr) kernel_sw(reg, addr) 114 + #define user_swl(reg, addr) kernel_swl(reg, addr) 115 + #define user_swr(reg, addr) kernel_swr(reg, addr) 116 + #define user_sh(reg, addr) kernel_sh(reg, addr) 117 + #define user_sb(reg, addr) kernel_sb(reg, addr) 171 118 172 119 #ifdef CONFIG_32BIT 173 - /* 174 - * No 'sd' or 'ld' instructions in 32-bit but the code will 175 - * do the correct thing 176 - */ 177 - #define user_sd(reg, addr) user_sw(reg, addr) 178 - #define user_ld(reg, addr) user_lw(reg, addr) 120 + #define user_sd(reg, addr) kernel_sw(reg, addr) 121 + #define user_ld(reg, addr) kernel_lw(reg, addr) 179 122 #else 180 - #define user_sd(reg, addr) sd reg, addr 181 - #define user_ld(reg, addr) ld reg, addr 123 + #define user_sd(reg, addr) kernel_sd(reg, addr) 124 + #define user_ld(reg, addr) kernel_sd(reg, addr) 182 125 #endif /* CONFIG_32BIT */ 183 126 184 127 #endif /* CONFIG_EVA */