ASoC: tlv320aic32x4: Fix MICPGA input configuration

Currently the Negative Terminal Input Routing Configuration is only set
when there is a special routing configuration. If we don't use one of
the inputs IN1 or IN2 as negative terminal input, the PGA and recording
does not work.

This patch adds a route from CM1L/CM1R to the PGA as negative input by
default. With this configuration the PGA can amplify all input signals
and line-in/mic works again.

Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Signed-off-by: Mark Brown <broonie@linaro.org>

authored by Markus Pargmann and committed by Mark Brown 609e6025 b44aa40f

+8 -4
+6 -4
sound/soc/codecs/tlv320aic32x4.c
··· 618 snd_soc_write(codec, AIC32X4_CMMODE, tmp_reg); 619 620 /* Mic PGA routing */ 621 - if (aic32x4->micpga_routing & AIC32X4_MICPGA_ROUTE_LMIC_IN2R_10K) { 622 snd_soc_write(codec, AIC32X4_LMICPGANIN, AIC32X4_LMICPGANIN_IN2R_10K); 623 - } 624 - if (aic32x4->micpga_routing & AIC32X4_MICPGA_ROUTE_RMIC_IN1L_10K) { 625 snd_soc_write(codec, AIC32X4_RMICPGANIN, AIC32X4_RMICPGANIN_IN1L_10K); 626 - } 627 628 aic32x4_set_bias_level(codec, SND_SOC_BIAS_STANDBY); 629
··· 618 snd_soc_write(codec, AIC32X4_CMMODE, tmp_reg); 619 620 /* Mic PGA routing */ 621 + if (aic32x4->micpga_routing & AIC32X4_MICPGA_ROUTE_LMIC_IN2R_10K) 622 snd_soc_write(codec, AIC32X4_LMICPGANIN, AIC32X4_LMICPGANIN_IN2R_10K); 623 + else 624 + snd_soc_write(codec, AIC32X4_LMICPGANIN, AIC32X4_LMICPGANIN_CM1L_10K); 625 + if (aic32x4->micpga_routing & AIC32X4_MICPGA_ROUTE_RMIC_IN1L_10K) 626 snd_soc_write(codec, AIC32X4_RMICPGANIN, AIC32X4_RMICPGANIN_IN1L_10K); 627 + else 628 + snd_soc_write(codec, AIC32X4_RMICPGANIN, AIC32X4_RMICPGANIN_CM1R_10K); 629 630 aic32x4_set_bias_level(codec, SND_SOC_BIAS_STANDBY); 631
+2
sound/soc/codecs/tlv320aic32x4.h
··· 120 #define AIC32X4_MICBIAS_2075V 0x60 121 122 #define AIC32X4_LMICPGANIN_IN2R_10K 0x10 123 #define AIC32X4_RMICPGANIN_IN1L_10K 0x10 124 125 #define AIC32X4_LMICPGAVOL_NOGAIN 0x80 126 #define AIC32X4_RMICPGAVOL_NOGAIN 0x80
··· 120 #define AIC32X4_MICBIAS_2075V 0x60 121 122 #define AIC32X4_LMICPGANIN_IN2R_10K 0x10 123 + #define AIC32X4_LMICPGANIN_CM1L_10K 0x40 124 #define AIC32X4_RMICPGANIN_IN1L_10K 0x10 125 + #define AIC32X4_RMICPGANIN_CM1R_10K 0x40 126 127 #define AIC32X4_LMICPGAVOL_NOGAIN 0x80 128 #define AIC32X4_RMICPGAVOL_NOGAIN 0x80